mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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d5723b9bc3
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12662 3c298f89-4303-0410-b956-a3cf2f4a3e73
186 lines
4.7 KiB
C
186 lines
4.7 KiB
C
/*
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* ADM5120 specific board support for LZMA decompressor
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*
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* Copyright (C) 2007-2008 OpenWrt.org
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* Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "config.h"
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#include <stddef.h>
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#define READREG(r) *(volatile unsigned int *)(r)
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#define WRITEREG(r,v) *(volatile unsigned int *)(r) = v
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/*
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* INTC definitions
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*/
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#define INTC_BASE 0xB2200000
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/* INTC registers */
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#define INTC_REG_IRQ_DISABLE 0x0C
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/*
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* UART definitions
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*/
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#define UART0_BASE 0xB2600000
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#define UART1_BASE 0xB2800000
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/* UART registers */
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#define UART_REG_DATA 0x00 /* Data register */
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#define UART_REG_ECR 0x04 /* Error Clear register */
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#define UART_REG_LCRH 0x08 /* Line Control High register */
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#define UART_REG_LCRM 0x0C /* Line Control Middle register */
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#define UART_REG_LCRL 0x10 /* Line Control Low register */
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#define UART_REG_CTRL 0x14 /* Control register */
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#define UART_REG_FLAG 0x18 /* Flag register */
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/* Control register bits */
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#define UART_CTRL_EN ( 1 << 0 ) /* UART enable */
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/* Line Control High register bits */
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#define UART_LCRH_FEN ( 1 << 4 ) /* FIFO enable */
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/* Flag register bits */
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#define UART_FLAG_CTS ( 1 << 0 )
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#define UART_FLAG_DSR ( 1 << 1 )
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#define UART_FLAG_DCD ( 1 << 2 )
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#define UART_FLAG_BUSY ( 1 << 3 )
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#define UART_FLAG_RXFE ( 1 << 4 ) /* RX FIFO empty */
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#define UART_FLAG_TXFF ( 1 << 5 ) /* TX FIFO full */
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#define UART_FLAG_RXFF ( 1 << 6 ) /* RX FIFO full */
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#define UART_FLAG_TXFE ( 1 << 7 ) /* TX FIFO empty */
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/*
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* SWITCH definitions
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*/
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#define SWITCH_BASE 0xB2000000
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#define SWITCH_REG_CPUP_CONF 0x0024
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#define SWITCH_REG_PORT_CONF0 0x0028
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#define SWITCH_REG_GPIO_CONF0 0x00B8
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#define SWITCH_REG_GPIO_CONF2 0x00BC
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#define SWITCH_REG_PORT0_LED 0x0100
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#define SWITCH_REG_PORT1_LED 0x0104
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#define SWITCH_REG_PORT2_LED 0x0108
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#define SWITCH_REG_PORT3_LED 0x010C
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#define SWITCH_REG_PORT4_LED 0x0110
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#define SWITCH_PORTS_HW 0x3F /* Hardware Ports */
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/* CPUP_CONF register bits */
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#define CPUP_CONF_DCPUP ( 1 << 0 ) /* Disable CPU port */
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/* PORT_CONF0 register bits */
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#define PORT_CONF0_DP_SHIFT 0 /* disable port shift*/
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/*
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* UART routines
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*/
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#if defined(CONFIG_USE_UART0)
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# define UART_READ(r) READREG(UART0_BASE+(r))
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# define UART_WRITE(r,v) WRITEREG(UART0_BASE+(r),(v))
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#else
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# define UART_READ(r) READREG(UART1_BASE+(r))
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# define UART_WRITE(r,v) WRITEREG(UART1_BASE+(r),(v))
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#endif
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static void uart_init(void)
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{
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#if 0
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unsigned int t;
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/* disable uart */
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UART_WRITE(UART_REG_CTRL, 0);
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/* keep current baud rate */
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t = UART_READ(UART_REG_LCRM);
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UART_WRITE(UART_REG_LCRM, t);
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t = UART_READ(UART_REG_LCRL);
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UART_WRITE(UART_REG_LCRL, t);
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/* keep data, stop, and parity bits, but disable FIFO */
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t = UART_READ(UART_REG_LCRH);
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t &= ~(UART_LCRH_FEN);
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UART_WRITE(UART_REG_LCRH, t );
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/* clear error bits */
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UART_WRITE(UART_REG_ECR, 0xFF);
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/* enable uart, and disable interrupts */
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UART_WRITE(UART_REG_CTRL, UART_CTRL_EN);
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#endif
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}
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/*
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* INTC routines
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*/
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#define INTC_READ(r) READREG(INTC_BASE+(r))
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#define INTC_WRITE(r,v) WRITEREG(INTC_BASE+(r),v)
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static void intc_init(void)
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{
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INTC_WRITE(INTC_REG_IRQ_DISABLE, 0xFFFFFFFF);
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}
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/*
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* SWITCH routines
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*/
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#define SWITCH_READ(r) READREG(SWITCH_BASE+(r))
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#define SWITCH_WRITE(r,v) WRITEREG(SWITCH_BASE+(r),v)
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static void switch_init(void)
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{
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/* disable PHYS ports */
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SWITCH_WRITE(SWITCH_REG_PORT_CONF0,
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(SWITCH_PORTS_HW << PORT_CONF0_DP_SHIFT));
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/* disable CPU port */
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SWITCH_WRITE(SWITCH_REG_CPUP_CONF, CPUP_CONF_DCPUP);
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/* disable GPIO lines */
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SWITCH_WRITE(SWITCH_REG_GPIO_CONF0, 0);
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SWITCH_WRITE(SWITCH_REG_GPIO_CONF2, 0);
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/* disable LED lines */
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SWITCH_WRITE(SWITCH_REG_PORT0_LED, 0);
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SWITCH_WRITE(SWITCH_REG_PORT1_LED, 0);
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SWITCH_WRITE(SWITCH_REG_PORT2_LED, 0);
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SWITCH_WRITE(SWITCH_REG_PORT3_LED, 0);
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SWITCH_WRITE(SWITCH_REG_PORT4_LED, 0);
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}
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void board_putc(int ch)
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{
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while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0);
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UART_WRITE(UART_REG_DATA, ch);
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while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0);
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}
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void board_init(void)
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{
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intc_init();
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switch_init();
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uart_init();
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}
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