mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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e2133d3ce6
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8137 3c298f89-4303-0410-b956-a3cf2f4a3e73
221 lines
6.6 KiB
C
221 lines
6.6 KiB
C
#ifndef _AMAZON_MEI_H
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#define _AMAZON_MEI_H
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/////////////////////////////////////////////////////////////////////////////////////////////////////////////
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#include "amazon_mei_app.h"
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#define AMAZON_MEI_DEBUG_ON
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#define AMAZON_MEI_CMV_EXTRA
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#define AMAZON_MEI_MAJOR 106
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/*
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** Define where in ME Processor's memory map the Stratify chip lives
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*/
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#define MEI_SPACE_ACCESS 0xB0100C00
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#define MAXSWAPSIZE 8 * 1024 //8k *(32bits)
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//#define AMAZON_ADSL_IMAGESIZE 16*1024 // 16k * (32bits)
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// Mailboxes
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#define MSG_LENGTH 16 // x16 bits
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#define YES_REPLY 1
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#define NO_REPLY 0
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#define CMV_TIMEOUT 100 //jiffies
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#define MIB_INTERVAL 10000 //msec
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/*** Bit definitions ***/
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#define FALSE 0
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#define TRUE 1
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#define BIT0 1<<0
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#define BIT1 1<<1
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#define BIT2 1<<2
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#define BIT3 1<<3
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#define BIT4 1<<4
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#define BIT5 1<<5
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#define BIT6 1<<6
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#define BIT7 1<<7
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#define BIT8 1<<8
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#define BIT9 1<<9
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#define BIT10 1<<10
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#define BIT11 1<<11
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#define BIT12 1<<12
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#define BIT13 1<<13
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#define BIT14 1<<14
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#define BIT15 1<<15
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#define BIT16 1<<16
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#define BIT17 1<<17
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#define BIT18 1<<18
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#define BIT19 1<<19
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#define BIT20 1<<20
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#define BIT21 1<<21
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#define BIT22 1<<22
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#define BIT23 1<<23
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#define BIT24 1<<24
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#define BIT25 1<<25
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#define BIT26 1<<26
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#define BIT27 1<<27
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#define BIT28 1<<28
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#define BIT29 1<<29
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#define BIT30 1<<30
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#define BIT31 1<<31
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/*** Register address offsets, relative to MEI_SPACE_ADDRESS ***/
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#define MEI_DATA_XFR (0x0000 + MEI_SPACE_ACCESS)
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#define MEI_VERSION (0x0200 + MEI_SPACE_ACCESS)
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#define ARC_GP_STAT (0x0204 + MEI_SPACE_ACCESS)
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#define MEI_XFR_ADDR (0x020C + MEI_SPACE_ACCESS)
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#define MEI_TO_ARC_INT (0x021C + MEI_SPACE_ACCESS)
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#define ARC_TO_MEI_INT (0x0220 + MEI_SPACE_ACCESS)
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#define ARC_TO_MEI_INT_MASK (0x0224 + MEI_SPACE_ACCESS)
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#define MEI_DEBUG_WAD (0x0228 + MEI_SPACE_ACCESS)
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#define MEI_DEBUG_RAD (0x022C + MEI_SPACE_ACCESS)
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#define MEI_DEBUG_DATA (0x0230 + MEI_SPACE_ACCESS)
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#define MEI_DEBUG_DEC (0x0234 + MEI_SPACE_ACCESS)
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#define MEI_CONTROL (0x0238 + MEI_SPACE_ACCESS)
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#define AT_CELLRDY_BC0 (0x023C + MEI_SPACE_ACCESS)
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#define AT_CELLRDY_BC1 (0x0240 + MEI_SPACE_ACCESS)
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#define AR_CELLRDY_BC0 (0x0244 + MEI_SPACE_ACCESS)
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#define AR_CELLRDY_BC1 (0x0248 + MEI_SPACE_ACCESS)
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#define AAI_ACCESS (0x024C + MEI_SPACE_ACCESS)
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#define AAITXCB0 (0x0300 + MEI_SPACE_ACCESS)
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#define AAITXCB1 (0x0304 + MEI_SPACE_ACCESS)
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#define AAIRXCB0 (0x0308 + MEI_SPACE_ACCESS)
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#define AAIRXCB1 (0x030C + MEI_SPACE_ACCESS)
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// MEI_TO_ARC_INTERRUPT Register definitions
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#define MEI_TO_ARC_INT1 BIT3
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#define MEI_TO_ARC_INT0 BIT2
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#define MEI_TO_ARC_CS_DONE BIT1
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#define MEI_TO_ARC_MSGAV BIT0
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// ARC_TO_MEI_INTERRUPT Register definitions
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#define ARC_TO_MEI_INT1 BIT8
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#define ARC_TO_MEI_INT0 BIT7
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#define ARC_TO_MEI_CS_REQ BIT6
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#define ARC_TO_MEI_DBG_DONE BIT5
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#define ARC_TO_MEI_MSGACK BIT4
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#define ARC_TO_MEI_NO_ACCESS BIT3
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#define ARC_TO_MEI_CHECK_AAITX BIT2
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#define ARC_TO_MEI_CHECK_AAIRX BIT1
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#define ARC_TO_MEI_MSGAV BIT0
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// ARC_TO_MEI_INTERRUPT_MASK Register definitions
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#define GP_INT1_EN BIT8
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#define GP_INT0_EN BIT7
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#define CS_REQ_EN BIT6
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#define DBG_DONE_EN BIT5
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#define MSGACK_EN BIT4
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#define NO_ACC_EN BIT3
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#define AAITX_EN BIT2
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#define AAIRX_EN BIT1
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#define MSGAV_EN BIT0
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// MEI_CONTROL Register definitions
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#define INT_LEVEL BIT2
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#define SOFT_RESET BIT1
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#define HOST_MSTR BIT0
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// MEI_DEBUG_DECODE Register definitions
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#define MEI_DEBUG_DEC_MASK (0x3)
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#define MEI_DEBUG_DEC_AUX_MASK (0x0)
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#define MEI_DEBUG_DEC_DMP1_MASK (0x1)
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#define MEI_DEBUG_DEC_DMP2_MASK (0x2)
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#define MEI_DEBUG_DEC_CORE_MASK (0x3)
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// ARC_TO_MEI_MAILBOX[11] is a special location used to indicate
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// page swap requests.
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#define MEI_TO_ARC_MAILBOX (0x15FC0)
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#define MEI_TO_ARC_MAILBOXR (0x15FEC)
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#define ARC_TO_MEI_MAILBOX (0x15F90)
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#define ARC_MEI_MAILBOXR (0x15FBC)
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// Codeswap request messages are indicated by setting BIT31
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#define OMB_CODESWAP_MESSAGE_MSG_TYPE_MASK (0x80000000)
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/*
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** Swap page header
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*/
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// Page must be loaded at boot time if size field has BIT31 set
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#define BOOT_FLAG (BIT31)
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#define BOOT_FLAG_MASK ~BOOT_FLAG
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// Swap page header describes size in 32-bit words, load location, and image offset
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// for program and/or data segments
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typedef struct _arc_swp_page_hdr
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{
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u32 p_offset; // Offset bytes of progseg from beginning of image
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u32 p_dest; // Destination addr of progseg on processor
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u32 p_size; // Size in 32-bitwords of program segment
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u32 d_offset; // Offset bytes of dataseg from beginning of image
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u32 d_dest; // Destination addr of dataseg on processor
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u32 d_size; // Size in 32-bitwords of data segment
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}ARC_SWP_PAGE_HDR;
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/*
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** Swap image header
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*/
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#define GET_PROG 0 // Flag used for program mem segment
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#define GET_DATA 1 // Flag used for data mem segment
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// Image header contains size of image, checksum for image, and count of
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// page headers. Following that are 'count' page headers followed by
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// the code and/or data segments to be loaded
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typedef struct _arc_img_hdr
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{
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u32 size; // Size of binary image in bytes
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u32 checksum; // Checksum for image
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u32 count; // Count of swp pages in image
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ARC_SWP_PAGE_HDR page[1]; // Should be "count" pages - '1' to make compiler happy
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}ARC_IMG_HDR;
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/*
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** Native size for the Stratiphy interface is 32-bits. All reads and writes
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** MUST be aligned on 32-bit boundaries. Trickery must be invoked to read word and/or
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** byte data. Read routines are provided. Write routines are probably a bad idea, as the
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** Arc has unrestrained, unseen access to the same memory, so a read-modify-write cycle
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** could very well have unintended results.
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*/
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MEI_ERROR meiCMV(u16 *, int); // first arg is CMV to ARC, second to indicate whether need reply
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void meiLongwordWrite(u32 ul_address, u32 ul_data);
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void meiLongwordRead(u32 ul_address, u32 *pul_data);
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MEI_ERROR meiDMAWrite(u32 destaddr, u32 *databuff, u32 databuffsize);
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MEI_ERROR meiDebugWrite(u32 destaddr, u32 *databuff, u32 databuffsize);
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MEI_ERROR meiDMARead(u32 srcaddr, u32 *databuff, u32 databuffsize);
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MEI_ERROR meiDebugRead(u32 srcaddr, u32 *databuff, u32 databuffsize);
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void meiPollForDbgDone(void);
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void meiMailboxInterruptsDisable(void);
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void meiMailboxInterruptsEnable(void);
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MEI_ERROR meiMailboxWrite(u16 *msgsrcbuffer, u16 msgsize);
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MEI_ERROR meiMailboxRead(u16 *msgdestbuffer, u16 msgsize);
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int meiGetPage( u32 Page, u32 data, u32 MaxSize, u32 *Buffer, u32 *Dest);
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MEI_ERROR meiHaltArc(void);
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MEI_ERROR meiRunArc(void);
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MEI_ERROR meiDownloadBootCode(void);
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MEI_ERROR meiForceRebootAdslModem(void);
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void makeCMV(u8 opcode, u8 group, u16 address, u16 index, int size, u16 * data);
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#endif
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