mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-09-12 16:19:53 +03:00
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26127 3c298f89-4303-0410-b956-a3cf2f4a3e73
1148 lines
36 KiB
Diff
1148 lines
36 KiB
Diff
--- a/drivers/net/b44.c
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+++ b/drivers/net/b44.c
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@@ -135,7 +135,6 @@ static void b44_init_rings(struct b44 *)
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static void b44_init_hw(struct b44 *, int);
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-static int dma_desc_align_mask;
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static int dma_desc_sync_size;
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static int instance;
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@@ -150,9 +149,8 @@ static inline void b44_sync_dma_desc_for
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unsigned long offset,
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enum dma_data_direction dir)
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{
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- ssb_dma_sync_single_range_for_device(sdev, dma_base,
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- offset & dma_desc_align_mask,
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- dma_desc_sync_size, dir);
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+ dma_sync_single_for_device(sdev->dma_dev, dma_base + offset,
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+ dma_desc_sync_size, dir);
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}
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static inline void b44_sync_dma_desc_for_cpu(struct ssb_device *sdev,
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@@ -160,9 +158,8 @@ static inline void b44_sync_dma_desc_for
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unsigned long offset,
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enum dma_data_direction dir)
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{
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- ssb_dma_sync_single_range_for_cpu(sdev, dma_base,
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- offset & dma_desc_align_mask,
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- dma_desc_sync_size, dir);
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+ dma_sync_single_for_cpu(sdev->dma_dev, dma_base + offset,
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+ dma_desc_sync_size, dir);
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}
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static inline unsigned long br32(const struct b44 *bp, unsigned long reg)
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@@ -608,10 +605,10 @@ static void b44_tx(struct b44 *bp)
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BUG_ON(skb == NULL);
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- ssb_dma_unmap_single(bp->sdev,
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- rp->mapping,
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- skb->len,
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- DMA_TO_DEVICE);
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+ dma_unmap_single(bp->sdev->dma_dev,
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+ rp->mapping,
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+ skb->len,
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+ DMA_TO_DEVICE);
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rp->skb = NULL;
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dev_kfree_skb_irq(skb);
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}
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@@ -648,29 +645,29 @@ static int b44_alloc_rx_skb(struct b44 *
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if (skb == NULL)
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return -ENOMEM;
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- mapping = ssb_dma_map_single(bp->sdev, skb->data,
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- RX_PKT_BUF_SZ,
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- DMA_FROM_DEVICE);
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+ mapping = dma_map_single(bp->sdev->dma_dev, skb->data,
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+ RX_PKT_BUF_SZ,
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+ DMA_FROM_DEVICE);
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/* Hardware bug work-around, the chip is unable to do PCI DMA
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to/from anything above 1GB :-( */
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- if (ssb_dma_mapping_error(bp->sdev, mapping) ||
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+ if (dma_mapping_error(bp->sdev->dma_dev, mapping) ||
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mapping + RX_PKT_BUF_SZ > DMA_BIT_MASK(30)) {
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/* Sigh... */
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- if (!ssb_dma_mapping_error(bp->sdev, mapping))
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- ssb_dma_unmap_single(bp->sdev, mapping,
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+ if (!dma_mapping_error(bp->sdev->dma_dev, mapping))
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+ dma_unmap_single(bp->sdev->dma_dev, mapping,
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RX_PKT_BUF_SZ, DMA_FROM_DEVICE);
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dev_kfree_skb_any(skb);
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skb = __netdev_alloc_skb(bp->dev, RX_PKT_BUF_SZ, GFP_ATOMIC|GFP_DMA);
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if (skb == NULL)
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return -ENOMEM;
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- mapping = ssb_dma_map_single(bp->sdev, skb->data,
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- RX_PKT_BUF_SZ,
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- DMA_FROM_DEVICE);
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- if (ssb_dma_mapping_error(bp->sdev, mapping) ||
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- mapping + RX_PKT_BUF_SZ > DMA_BIT_MASK(30)) {
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- if (!ssb_dma_mapping_error(bp->sdev, mapping))
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- ssb_dma_unmap_single(bp->sdev, mapping, RX_PKT_BUF_SZ,DMA_FROM_DEVICE);
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+ mapping = dma_map_single(bp->sdev->dma_dev, skb->data,
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+ RX_PKT_BUF_SZ,
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+ DMA_FROM_DEVICE);
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+ if (dma_mapping_error(bp->sdev->dma_dev, mapping) ||
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+ mapping + RX_PKT_BUF_SZ > DMA_BIT_MASK(30)) {
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+ if (!dma_mapping_error(bp->sdev->dma_dev, mapping))
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+ dma_unmap_single(bp->sdev->dma_dev, mapping, RX_PKT_BUF_SZ,DMA_FROM_DEVICE);
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dev_kfree_skb_any(skb);
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return -ENOMEM;
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}
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@@ -745,9 +742,9 @@ static void b44_recycle_rx(struct b44 *b
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dest_idx * sizeof(*dest_desc),
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DMA_BIDIRECTIONAL);
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- ssb_dma_sync_single_for_device(bp->sdev, dest_map->mapping,
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- RX_PKT_BUF_SZ,
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- DMA_FROM_DEVICE);
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+ dma_sync_single_for_device(bp->sdev->dma_dev, dest_map->mapping,
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+ RX_PKT_BUF_SZ,
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+ DMA_FROM_DEVICE);
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}
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static int b44_rx(struct b44 *bp, int budget)
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@@ -767,9 +764,9 @@ static int b44_rx(struct b44 *bp, int bu
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struct rx_header *rh;
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u16 len;
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- ssb_dma_sync_single_for_cpu(bp->sdev, map,
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- RX_PKT_BUF_SZ,
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- DMA_FROM_DEVICE);
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+ dma_sync_single_for_cpu(bp->sdev->dma_dev, map,
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+ RX_PKT_BUF_SZ,
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+ DMA_FROM_DEVICE);
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rh = (struct rx_header *) skb->data;
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len = le16_to_cpu(rh->len);
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if ((len > (RX_PKT_BUF_SZ - RX_PKT_OFFSET)) ||
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@@ -801,8 +798,8 @@ static int b44_rx(struct b44 *bp, int bu
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skb_size = b44_alloc_rx_skb(bp, cons, bp->rx_prod);
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if (skb_size < 0)
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goto drop_it;
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- ssb_dma_unmap_single(bp->sdev, map,
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- skb_size, DMA_FROM_DEVICE);
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+ dma_unmap_single(bp->sdev->dma_dev, map,
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+ skb_size, DMA_FROM_DEVICE);
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/* Leave out rx_header */
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skb_put(skb, len + RX_PKT_OFFSET);
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skb_pull(skb, RX_PKT_OFFSET);
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@@ -954,24 +951,24 @@ static netdev_tx_t b44_start_xmit(struct
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goto err_out;
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}
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- mapping = ssb_dma_map_single(bp->sdev, skb->data, len, DMA_TO_DEVICE);
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- if (ssb_dma_mapping_error(bp->sdev, mapping) || mapping + len > DMA_BIT_MASK(30)) {
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+ mapping = dma_map_single(bp->sdev->dma_dev, skb->data, len, DMA_TO_DEVICE);
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+ if (dma_mapping_error(bp->sdev->dma_dev, mapping) || mapping + len > DMA_BIT_MASK(30)) {
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struct sk_buff *bounce_skb;
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/* Chip can't handle DMA to/from >1GB, use bounce buffer */
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- if (!ssb_dma_mapping_error(bp->sdev, mapping))
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- ssb_dma_unmap_single(bp->sdev, mapping, len,
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+ if (!dma_mapping_error(bp->sdev->dma_dev, mapping))
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+ dma_unmap_single(bp->sdev->dma_dev, mapping, len,
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DMA_TO_DEVICE);
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bounce_skb = __netdev_alloc_skb(dev, len, GFP_ATOMIC | GFP_DMA);
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if (!bounce_skb)
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goto err_out;
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- mapping = ssb_dma_map_single(bp->sdev, bounce_skb->data,
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- len, DMA_TO_DEVICE);
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- if (ssb_dma_mapping_error(bp->sdev, mapping) || mapping + len > DMA_BIT_MASK(30)) {
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- if (!ssb_dma_mapping_error(bp->sdev, mapping))
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- ssb_dma_unmap_single(bp->sdev, mapping,
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+ mapping = dma_map_single(bp->sdev->dma_dev, bounce_skb->data,
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+ len, DMA_TO_DEVICE);
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+ if (dma_mapping_error(bp->sdev->dma_dev, mapping) || mapping + len > DMA_BIT_MASK(30)) {
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+ if (!dma_mapping_error(bp->sdev->dma_dev, mapping))
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+ dma_unmap_single(bp->sdev->dma_dev, mapping,
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len, DMA_TO_DEVICE);
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dev_kfree_skb_any(bounce_skb);
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goto err_out;
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@@ -1068,8 +1065,8 @@ static void b44_free_rings(struct b44 *b
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if (rp->skb == NULL)
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continue;
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- ssb_dma_unmap_single(bp->sdev, rp->mapping, RX_PKT_BUF_SZ,
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- DMA_FROM_DEVICE);
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+ dma_unmap_single(bp->sdev->dma_dev, rp->mapping, RX_PKT_BUF_SZ,
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+ DMA_FROM_DEVICE);
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dev_kfree_skb_any(rp->skb);
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rp->skb = NULL;
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}
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@@ -1080,8 +1077,8 @@ static void b44_free_rings(struct b44 *b
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if (rp->skb == NULL)
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continue;
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- ssb_dma_unmap_single(bp->sdev, rp->mapping, rp->skb->len,
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- DMA_TO_DEVICE);
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+ dma_unmap_single(bp->sdev->dma_dev, rp->mapping, rp->skb->len,
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+ DMA_TO_DEVICE);
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dev_kfree_skb_any(rp->skb);
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rp->skb = NULL;
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}
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@@ -1103,14 +1100,12 @@ static void b44_init_rings(struct b44 *b
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memset(bp->tx_ring, 0, B44_TX_RING_BYTES);
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if (bp->flags & B44_FLAG_RX_RING_HACK)
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- ssb_dma_sync_single_for_device(bp->sdev, bp->rx_ring_dma,
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- DMA_TABLE_BYTES,
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- DMA_BIDIRECTIONAL);
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+ dma_sync_single_for_device(bp->sdev->dma_dev, bp->rx_ring_dma,
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+ DMA_TABLE_BYTES, DMA_BIDIRECTIONAL);
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if (bp->flags & B44_FLAG_TX_RING_HACK)
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- ssb_dma_sync_single_for_device(bp->sdev, bp->tx_ring_dma,
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- DMA_TABLE_BYTES,
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- DMA_TO_DEVICE);
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+ dma_sync_single_for_device(bp->sdev->dma_dev, bp->tx_ring_dma,
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+ DMA_TABLE_BYTES, DMA_TO_DEVICE);
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for (i = 0; i < bp->rx_pending; i++) {
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if (b44_alloc_rx_skb(bp, -1, i) < 0)
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@@ -1130,27 +1125,23 @@ static void b44_free_consistent(struct b
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bp->tx_buffers = NULL;
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if (bp->rx_ring) {
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if (bp->flags & B44_FLAG_RX_RING_HACK) {
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- ssb_dma_unmap_single(bp->sdev, bp->rx_ring_dma,
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- DMA_TABLE_BYTES,
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- DMA_BIDIRECTIONAL);
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+ dma_unmap_single(bp->sdev->dma_dev, bp->rx_ring_dma,
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+ DMA_TABLE_BYTES, DMA_BIDIRECTIONAL);
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kfree(bp->rx_ring);
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} else
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- ssb_dma_free_consistent(bp->sdev, DMA_TABLE_BYTES,
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- bp->rx_ring, bp->rx_ring_dma,
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- GFP_KERNEL);
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+ dma_free_coherent(bp->sdev->dma_dev, DMA_TABLE_BYTES,
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+ bp->rx_ring, bp->rx_ring_dma);
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bp->rx_ring = NULL;
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bp->flags &= ~B44_FLAG_RX_RING_HACK;
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}
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if (bp->tx_ring) {
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if (bp->flags & B44_FLAG_TX_RING_HACK) {
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- ssb_dma_unmap_single(bp->sdev, bp->tx_ring_dma,
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- DMA_TABLE_BYTES,
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- DMA_TO_DEVICE);
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+ dma_unmap_single(bp->sdev->dma_dev, bp->tx_ring_dma,
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+ DMA_TABLE_BYTES, DMA_TO_DEVICE);
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kfree(bp->tx_ring);
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} else
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- ssb_dma_free_consistent(bp->sdev, DMA_TABLE_BYTES,
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- bp->tx_ring, bp->tx_ring_dma,
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- GFP_KERNEL);
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+ dma_free_coherent(bp->sdev->dma_dev, DMA_TABLE_BYTES,
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+ bp->tx_ring, bp->tx_ring_dma);
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bp->tx_ring = NULL;
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bp->flags &= ~B44_FLAG_TX_RING_HACK;
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}
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@@ -1175,7 +1166,8 @@ static int b44_alloc_consistent(struct b
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goto out_err;
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size = DMA_TABLE_BYTES;
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- bp->rx_ring = ssb_dma_alloc_consistent(bp->sdev, size, &bp->rx_ring_dma, gfp);
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+ bp->rx_ring = dma_alloc_coherent(bp->sdev->dma_dev, size,
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+ &bp->rx_ring_dma, gfp);
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if (!bp->rx_ring) {
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/* Allocation may have failed due to pci_alloc_consistent
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insisting on use of GFP_DMA, which is more restrictive
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@@ -1187,11 +1179,11 @@ static int b44_alloc_consistent(struct b
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if (!rx_ring)
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goto out_err;
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- rx_ring_dma = ssb_dma_map_single(bp->sdev, rx_ring,
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- DMA_TABLE_BYTES,
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- DMA_BIDIRECTIONAL);
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+ rx_ring_dma = dma_map_single(bp->sdev->dma_dev, rx_ring,
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+ DMA_TABLE_BYTES,
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+ DMA_BIDIRECTIONAL);
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- if (ssb_dma_mapping_error(bp->sdev, rx_ring_dma) ||
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+ if (dma_mapping_error(bp->sdev->dma_dev, rx_ring_dma) ||
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rx_ring_dma + size > DMA_BIT_MASK(30)) {
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kfree(rx_ring);
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goto out_err;
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@@ -1202,7 +1194,8 @@ static int b44_alloc_consistent(struct b
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bp->flags |= B44_FLAG_RX_RING_HACK;
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}
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- bp->tx_ring = ssb_dma_alloc_consistent(bp->sdev, size, &bp->tx_ring_dma, gfp);
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+ bp->tx_ring = dma_alloc_coherent(bp->sdev->dma_dev, size,
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+ &bp->tx_ring_dma, gfp);
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if (!bp->tx_ring) {
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/* Allocation may have failed due to ssb_dma_alloc_consistent
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insisting on use of GFP_DMA, which is more restrictive
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@@ -1214,11 +1207,11 @@ static int b44_alloc_consistent(struct b
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if (!tx_ring)
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goto out_err;
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- tx_ring_dma = ssb_dma_map_single(bp->sdev, tx_ring,
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- DMA_TABLE_BYTES,
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- DMA_TO_DEVICE);
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+ tx_ring_dma = dma_map_single(bp->sdev->dma_dev, tx_ring,
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+ DMA_TABLE_BYTES,
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+ DMA_TO_DEVICE);
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- if (ssb_dma_mapping_error(bp->sdev, tx_ring_dma) ||
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+ if (dma_mapping_error(bp->sdev->dma_dev, tx_ring_dma) ||
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tx_ring_dma + size > DMA_BIT_MASK(30)) {
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kfree(tx_ring);
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goto out_err;
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@@ -2174,12 +2167,14 @@ static int __devinit b44_init_one(struct
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"Failed to powerup the bus\n");
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goto err_out_free_dev;
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}
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- err = ssb_dma_set_mask(sdev, DMA_BIT_MASK(30));
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- if (err) {
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+
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+ if (dma_set_mask(sdev->dma_dev, DMA_BIT_MASK(30)) ||
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+ dma_set_coherent_mask(sdev->dma_dev, DMA_BIT_MASK(30))) {
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dev_err(sdev->dev,
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"Required 30BIT DMA mask unsupported by the system\n");
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goto err_out_powerdown;
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}
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+
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err = b44_get_invariants(bp);
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if (err) {
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dev_err(sdev->dev,
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@@ -2344,7 +2339,6 @@ static int __init b44_init(void)
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int err;
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/* Setup paramaters for syncing RX/TX DMA descriptors */
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- dma_desc_align_mask = ~(dma_desc_align_size - 1);
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dma_desc_sync_size = max_t(unsigned int, dma_desc_align_size, sizeof(struct dma_desc));
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|
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err = b44_pci_init();
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--- a/drivers/ssb/driver_chipcommon.c
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+++ b/drivers/ssb/driver_chipcommon.c
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@@ -209,6 +209,24 @@ static void chipco_powercontrol_init(str
|
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}
|
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}
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|
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+/* http://bcm-v4.sipsolutions.net/802.11/PmuFastPwrupDelay */
|
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+static u16 pmu_fast_powerup_delay(struct ssb_chipcommon *cc)
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+{
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+ struct ssb_bus *bus = cc->dev->bus;
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+
|
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+ switch (bus->chip_id) {
|
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+ case 0x4312:
|
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+ case 0x4322:
|
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+ case 0x4328:
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+ return 7000;
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+ case 0x4325:
|
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+ /* TODO: */
|
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+ default:
|
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+ return 15000;
|
|
+ }
|
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+}
|
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+
|
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+/* http://bcm-v4.sipsolutions.net/802.11/ClkctlFastPwrupDelay */
|
|
static void calc_fast_powerup_delay(struct ssb_chipcommon *cc)
|
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{
|
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struct ssb_bus *bus = cc->dev->bus;
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@@ -218,6 +236,12 @@ static void calc_fast_powerup_delay(stru
|
|
|
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if (bus->bustype != SSB_BUSTYPE_PCI)
|
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return;
|
|
+
|
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+ if (cc->capabilities & SSB_CHIPCO_CAP_PMU) {
|
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+ cc->fast_pwrup_delay = pmu_fast_powerup_delay(cc);
|
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+ return;
|
|
+ }
|
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+
|
|
if (!(cc->capabilities & SSB_CHIPCO_CAP_PCTL))
|
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return;
|
|
|
|
--- a/drivers/ssb/driver_chipcommon_pmu.c
|
|
+++ b/drivers/ssb/driver_chipcommon_pmu.c
|
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@@ -502,9 +502,9 @@ static void ssb_pmu_resources_init(struc
|
|
chipco_write32(cc, SSB_CHIPCO_PMU_MAXRES_MSK, max_msk);
|
|
}
|
|
|
|
+/* http://bcm-v4.sipsolutions.net/802.11/SSB/PmuInit */
|
|
void ssb_pmu_init(struct ssb_chipcommon *cc)
|
|
{
|
|
- struct ssb_bus *bus = cc->dev->bus;
|
|
u32 pmucap;
|
|
|
|
if (!(cc->capabilities & SSB_CHIPCO_CAP_PMU))
|
|
@@ -516,15 +516,12 @@ void ssb_pmu_init(struct ssb_chipcommon
|
|
ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n",
|
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cc->pmu.rev, pmucap);
|
|
|
|
- if (cc->pmu.rev >= 1) {
|
|
- if ((bus->chip_id == 0x4325) && (bus->chip_rev < 2)) {
|
|
- chipco_mask32(cc, SSB_CHIPCO_PMU_CTL,
|
|
- ~SSB_CHIPCO_PMU_CTL_NOILPONW);
|
|
- } else {
|
|
- chipco_set32(cc, SSB_CHIPCO_PMU_CTL,
|
|
- SSB_CHIPCO_PMU_CTL_NOILPONW);
|
|
- }
|
|
- }
|
|
+ if (cc->pmu.rev == 1)
|
|
+ chipco_mask32(cc, SSB_CHIPCO_PMU_CTL,
|
|
+ ~SSB_CHIPCO_PMU_CTL_NOILPONW);
|
|
+ else
|
|
+ chipco_set32(cc, SSB_CHIPCO_PMU_CTL,
|
|
+ SSB_CHIPCO_PMU_CTL_NOILPONW);
|
|
ssb_pmu_pll_init(cc);
|
|
ssb_pmu_resources_init(cc);
|
|
}
|
|
--- a/drivers/ssb/main.c
|
|
+++ b/drivers/ssb/main.c
|
|
@@ -385,6 +385,35 @@ static int ssb_device_uevent(struct devi
|
|
ssb_dev->id.revision);
|
|
}
|
|
|
|
+#define ssb_config_attr(attrib, field, format_string) \
|
|
+static ssize_t \
|
|
+attrib##_show(struct device *dev, struct device_attribute *attr, char *buf) \
|
|
+{ \
|
|
+ return sprintf(buf, format_string, dev_to_ssb_dev(dev)->field); \
|
|
+}
|
|
+
|
|
+ssb_config_attr(core_num, core_index, "%u\n")
|
|
+ssb_config_attr(coreid, id.coreid, "0x%04x\n")
|
|
+ssb_config_attr(vendor, id.vendor, "0x%04x\n")
|
|
+ssb_config_attr(revision, id.revision, "%u\n")
|
|
+ssb_config_attr(irq, irq, "%u\n")
|
|
+static ssize_t
|
|
+name_show(struct device *dev, struct device_attribute *attr, char *buf)
|
|
+{
|
|
+ return sprintf(buf, "%s\n",
|
|
+ ssb_core_name(dev_to_ssb_dev(dev)->id.coreid));
|
|
+}
|
|
+
|
|
+static struct device_attribute ssb_device_attrs[] = {
|
|
+ __ATTR_RO(name),
|
|
+ __ATTR_RO(core_num),
|
|
+ __ATTR_RO(coreid),
|
|
+ __ATTR_RO(vendor),
|
|
+ __ATTR_RO(revision),
|
|
+ __ATTR_RO(irq),
|
|
+ __ATTR_NULL,
|
|
+};
|
|
+
|
|
static struct bus_type ssb_bustype = {
|
|
.name = "ssb",
|
|
.match = ssb_bus_match,
|
|
@@ -394,6 +423,7 @@ static struct bus_type ssb_bustype = {
|
|
.suspend = ssb_device_suspend,
|
|
.resume = ssb_device_resume,
|
|
.uevent = ssb_device_uevent,
|
|
+ .dev_attrs = ssb_device_attrs,
|
|
};
|
|
|
|
static void ssb_buses_lock(void)
|
|
@@ -486,6 +516,7 @@ static int ssb_devices_register(struct s
|
|
#ifdef CONFIG_SSB_PCIHOST
|
|
sdev->irq = bus->host_pci->irq;
|
|
dev->parent = &bus->host_pci->dev;
|
|
+ sdev->dma_dev = dev->parent;
|
|
#endif
|
|
break;
|
|
case SSB_BUSTYPE_PCMCIA:
|
|
@@ -501,6 +532,7 @@ static int ssb_devices_register(struct s
|
|
break;
|
|
case SSB_BUSTYPE_SSB:
|
|
dev->dma_mask = &dev->coherent_dma_mask;
|
|
+ sdev->dma_dev = dev;
|
|
break;
|
|
}
|
|
|
|
@@ -1162,10 +1194,10 @@ void ssb_device_enable(struct ssb_device
|
|
}
|
|
EXPORT_SYMBOL(ssb_device_enable);
|
|
|
|
-/* Wait for a bit in a register to get set or unset.
|
|
+/* Wait for bitmask in a register to get set or cleared.
|
|
* timeout is in units of ten-microseconds */
|
|
-static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
|
|
- int timeout, int set)
|
|
+static int ssb_wait_bits(struct ssb_device *dev, u16 reg, u32 bitmask,
|
|
+ int timeout, int set)
|
|
{
|
|
int i;
|
|
u32 val;
|
|
@@ -1173,7 +1205,7 @@ static int ssb_wait_bit(struct ssb_devic
|
|
for (i = 0; i < timeout; i++) {
|
|
val = ssb_read32(dev, reg);
|
|
if (set) {
|
|
- if (val & bitmask)
|
|
+ if ((val & bitmask) == bitmask)
|
|
return 0;
|
|
} else {
|
|
if (!(val & bitmask))
|
|
@@ -1190,20 +1222,38 @@ static int ssb_wait_bit(struct ssb_devic
|
|
|
|
void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
|
|
{
|
|
- u32 reject;
|
|
+ u32 reject, val;
|
|
|
|
if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
|
|
return;
|
|
|
|
reject = ssb_tmslow_reject_bitmask(dev);
|
|
- ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
|
|
- ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
|
|
- ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
|
|
- ssb_write32(dev, SSB_TMSLOW,
|
|
- SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
|
|
- reject | SSB_TMSLOW_RESET |
|
|
- core_specific_flags);
|
|
- ssb_flush_tmslow(dev);
|
|
+
|
|
+ if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) {
|
|
+ ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
|
|
+ ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1);
|
|
+ ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
|
|
+
|
|
+ if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
|
|
+ val = ssb_read32(dev, SSB_IMSTATE);
|
|
+ val |= SSB_IMSTATE_REJECT;
|
|
+ ssb_write32(dev, SSB_IMSTATE, val);
|
|
+ ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000,
|
|
+ 0);
|
|
+ }
|
|
+
|
|
+ ssb_write32(dev, SSB_TMSLOW,
|
|
+ SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
|
|
+ reject | SSB_TMSLOW_RESET |
|
|
+ core_specific_flags);
|
|
+ ssb_flush_tmslow(dev);
|
|
+
|
|
+ if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
|
|
+ val = ssb_read32(dev, SSB_IMSTATE);
|
|
+ val &= ~SSB_IMSTATE_REJECT;
|
|
+ ssb_write32(dev, SSB_IMSTATE, val);
|
|
+ }
|
|
+ }
|
|
|
|
ssb_write32(dev, SSB_TMSLOW,
|
|
reject | SSB_TMSLOW_RESET |
|
|
@@ -1226,80 +1276,6 @@ u32 ssb_dma_translation(struct ssb_devic
|
|
}
|
|
EXPORT_SYMBOL(ssb_dma_translation);
|
|
|
|
-int ssb_dma_set_mask(struct ssb_device *dev, u64 mask)
|
|
-{
|
|
-#ifdef CONFIG_SSB_PCIHOST
|
|
- int err;
|
|
-#endif
|
|
-
|
|
- switch (dev->bus->bustype) {
|
|
- case SSB_BUSTYPE_PCI:
|
|
-#ifdef CONFIG_SSB_PCIHOST
|
|
- err = pci_set_dma_mask(dev->bus->host_pci, mask);
|
|
- if (err)
|
|
- return err;
|
|
- err = pci_set_consistent_dma_mask(dev->bus->host_pci, mask);
|
|
- return err;
|
|
-#endif
|
|
- case SSB_BUSTYPE_SSB:
|
|
- return dma_set_mask(dev->dev, mask);
|
|
- default:
|
|
- __ssb_dma_not_implemented(dev);
|
|
- }
|
|
- return -ENOSYS;
|
|
-}
|
|
-EXPORT_SYMBOL(ssb_dma_set_mask);
|
|
-
|
|
-void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
|
|
- dma_addr_t *dma_handle, gfp_t gfp_flags)
|
|
-{
|
|
- switch (dev->bus->bustype) {
|
|
- case SSB_BUSTYPE_PCI:
|
|
-#ifdef CONFIG_SSB_PCIHOST
|
|
- if (gfp_flags & GFP_DMA) {
|
|
- /* Workaround: The PCI API does not support passing
|
|
- * a GFP flag. */
|
|
- return dma_alloc_coherent(&dev->bus->host_pci->dev,
|
|
- size, dma_handle, gfp_flags);
|
|
- }
|
|
- return pci_alloc_consistent(dev->bus->host_pci, size, dma_handle);
|
|
-#endif
|
|
- case SSB_BUSTYPE_SSB:
|
|
- return dma_alloc_coherent(dev->dev, size, dma_handle, gfp_flags);
|
|
- default:
|
|
- __ssb_dma_not_implemented(dev);
|
|
- }
|
|
- return NULL;
|
|
-}
|
|
-EXPORT_SYMBOL(ssb_dma_alloc_consistent);
|
|
-
|
|
-void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
|
|
- void *vaddr, dma_addr_t dma_handle,
|
|
- gfp_t gfp_flags)
|
|
-{
|
|
- switch (dev->bus->bustype) {
|
|
- case SSB_BUSTYPE_PCI:
|
|
-#ifdef CONFIG_SSB_PCIHOST
|
|
- if (gfp_flags & GFP_DMA) {
|
|
- /* Workaround: The PCI API does not support passing
|
|
- * a GFP flag. */
|
|
- dma_free_coherent(&dev->bus->host_pci->dev,
|
|
- size, vaddr, dma_handle);
|
|
- return;
|
|
- }
|
|
- pci_free_consistent(dev->bus->host_pci, size,
|
|
- vaddr, dma_handle);
|
|
- return;
|
|
-#endif
|
|
- case SSB_BUSTYPE_SSB:
|
|
- dma_free_coherent(dev->dev, size, vaddr, dma_handle);
|
|
- return;
|
|
- default:
|
|
- __ssb_dma_not_implemented(dev);
|
|
- }
|
|
-}
|
|
-EXPORT_SYMBOL(ssb_dma_free_consistent);
|
|
-
|
|
int ssb_bus_may_powerdown(struct ssb_bus *bus)
|
|
{
|
|
struct ssb_chipcommon *cc;
|
|
--- a/drivers/ssb/pci.c
|
|
+++ b/drivers/ssb/pci.c
|
|
@@ -406,6 +406,46 @@ static void sprom_extract_r123(struct ss
|
|
out->antenna_gain.ghz5.a3 = gain;
|
|
}
|
|
|
|
+/* Revs 4 5 and 8 have partially shared layout */
|
|
+static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
|
|
+{
|
|
+ SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
|
|
+ SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
|
|
+ SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
|
|
+ SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
|
|
+ SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
|
|
+ SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
|
|
+ SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
|
|
+ SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
|
|
+
|
|
+ SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
|
|
+ SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
|
|
+ SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
|
|
+ SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
|
|
+ SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
|
|
+ SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
|
|
+ SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
|
|
+ SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
|
|
+
|
|
+ SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
|
|
+ SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
|
|
+ SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
|
|
+ SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
|
|
+ SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
|
|
+ SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
|
|
+ SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
|
|
+ SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
|
|
+
|
|
+ SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
|
|
+ SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
|
|
+ SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
|
|
+ SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
|
|
+ SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
|
|
+ SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
|
|
+ SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
|
|
+ SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
|
|
+}
|
|
+
|
|
static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
|
|
{
|
|
int i;
|
|
@@ -428,10 +468,14 @@ static void sprom_extract_r45(struct ssb
|
|
SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0);
|
|
SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
|
|
SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
|
|
+ SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
|
|
+ SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
|
|
} else {
|
|
SPEX(country_code, SSB_SPROM5_CCODE, 0xFFFF, 0);
|
|
SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
|
|
SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
|
|
+ SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
|
|
+ SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
|
|
}
|
|
SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
|
|
SSB_SPROM4_ANTAVAIL_A_SHIFT);
|
|
@@ -471,6 +515,8 @@ static void sprom_extract_r45(struct ssb
|
|
memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
|
|
sizeof(out->antenna_gain.ghz5));
|
|
|
|
+ sprom_extract_r458(out, in);
|
|
+
|
|
/* TODO - get remaining rev 4 stuff needed */
|
|
}
|
|
|
|
@@ -561,6 +607,8 @@ static void sprom_extract_r8(struct ssb_
|
|
memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
|
|
sizeof(out->antenna_gain.ghz5));
|
|
|
|
+ sprom_extract_r458(out, in);
|
|
+
|
|
/* TODO - get remaining rev 8 stuff needed */
|
|
}
|
|
|
|
@@ -573,37 +621,34 @@ static int sprom_extract(struct ssb_bus
|
|
ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
|
|
memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
|
|
memset(out->et1mac, 0xFF, 6);
|
|
+
|
|
if ((bus->chip_id & 0xFF00) == 0x4400) {
|
|
/* Workaround: The BCM44XX chip has a stupid revision
|
|
* number stored in the SPROM.
|
|
* Always extract r1. */
|
|
out->revision = 1;
|
|
+ ssb_dprintk(KERN_DEBUG PFX "SPROM treated as revision %d\n", out->revision);
|
|
+ }
|
|
+
|
|
+ switch (out->revision) {
|
|
+ case 1:
|
|
+ case 2:
|
|
+ case 3:
|
|
sprom_extract_r123(out, in);
|
|
- } else if (bus->chip_id == 0x4321) {
|
|
- /* the BCM4328 has a chipid == 0x4321 and a rev 4 SPROM */
|
|
- out->revision = 4;
|
|
+ break;
|
|
+ case 4:
|
|
+ case 5:
|
|
sprom_extract_r45(out, in);
|
|
- } else {
|
|
- switch (out->revision) {
|
|
- case 1:
|
|
- case 2:
|
|
- case 3:
|
|
- sprom_extract_r123(out, in);
|
|
- break;
|
|
- case 4:
|
|
- case 5:
|
|
- sprom_extract_r45(out, in);
|
|
- break;
|
|
- case 8:
|
|
- sprom_extract_r8(out, in);
|
|
- break;
|
|
- default:
|
|
- ssb_printk(KERN_WARNING PFX "Unsupported SPROM"
|
|
- " revision %d detected. Will extract"
|
|
- " v1\n", out->revision);
|
|
- out->revision = 1;
|
|
- sprom_extract_r123(out, in);
|
|
- }
|
|
+ break;
|
|
+ case 8:
|
|
+ sprom_extract_r8(out, in);
|
|
+ break;
|
|
+ default:
|
|
+ ssb_printk(KERN_WARNING PFX "Unsupported SPROM"
|
|
+ " revision %d detected. Will extract"
|
|
+ " v1\n", out->revision);
|
|
+ out->revision = 1;
|
|
+ sprom_extract_r123(out, in);
|
|
}
|
|
|
|
if (out->boardflags_lo == 0xFFFF)
|
|
@@ -618,7 +663,7 @@ static int ssb_pci_sprom_get(struct ssb_
|
|
struct ssb_sprom *sprom)
|
|
{
|
|
const struct ssb_sprom *fallback;
|
|
- int err = -ENOMEM;
|
|
+ int err;
|
|
u16 *buf;
|
|
|
|
if (!ssb_is_sprom_available(bus)) {
|
|
@@ -645,7 +690,7 @@ static int ssb_pci_sprom_get(struct ssb_
|
|
|
|
buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
|
|
if (!buf)
|
|
- goto out;
|
|
+ return -ENOMEM;
|
|
bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
|
|
sprom_do_read(bus, buf);
|
|
err = sprom_check_crc(buf, bus->sprom_size);
|
|
@@ -655,7 +700,7 @@ static int ssb_pci_sprom_get(struct ssb_
|
|
buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
|
|
GFP_KERNEL);
|
|
if (!buf)
|
|
- goto out;
|
|
+ return -ENOMEM;
|
|
bus->sprom_size = SSB_SPROMSIZE_WORDS_R4;
|
|
sprom_do_read(bus, buf);
|
|
err = sprom_check_crc(buf, bus->sprom_size);
|
|
@@ -677,7 +722,6 @@ static int ssb_pci_sprom_get(struct ssb_
|
|
|
|
out_free:
|
|
kfree(buf);
|
|
-out:
|
|
return err;
|
|
}
|
|
|
|
--- a/drivers/ssb/pcihost_wrapper.c
|
|
+++ b/drivers/ssb/pcihost_wrapper.c
|
|
@@ -59,6 +59,7 @@ static int ssb_pcihost_probe(struct pci_
|
|
struct ssb_bus *ssb;
|
|
int err = -ENOMEM;
|
|
const char *name;
|
|
+ u32 val;
|
|
|
|
ssb = kzalloc(sizeof(*ssb), GFP_KERNEL);
|
|
if (!ssb)
|
|
@@ -74,6 +75,12 @@ static int ssb_pcihost_probe(struct pci_
|
|
goto err_pci_disable;
|
|
pci_set_master(dev);
|
|
|
|
+ /* Disable the RETRY_TIMEOUT register (0x41) to keep
|
|
+ * PCI Tx retries from interfering with C3 CPU state */
|
|
+ pci_read_config_dword(dev, 0x40, &val);
|
|
+ if ((val & 0x0000ff00) != 0)
|
|
+ pci_write_config_dword(dev, 0x40, val & 0xffff00ff);
|
|
+
|
|
err = ssb_bus_pcibus_register(ssb, dev);
|
|
if (err)
|
|
goto err_pci_release_regions;
|
|
--- a/drivers/ssb/pcmcia.c
|
|
+++ b/drivers/ssb/pcmcia.c
|
|
@@ -745,7 +745,7 @@ int ssb_pcmcia_get_invariants(struct ssb
|
|
|
|
/* Fetch the vendor specific tuples. */
|
|
res = pcmcia_loop_tuple(bus->host_pcmcia, SSB_PCMCIA_CIS,
|
|
- ssb_pcmcia_do_get_invariants, sprom);
|
|
+ ssb_pcmcia_do_get_invariants, iv);
|
|
if ((res == 0) || (res == -ENOSPC))
|
|
return 0;
|
|
|
|
--- a/drivers/ssb/scan.c
|
|
+++ b/drivers/ssb/scan.c
|
|
@@ -407,10 +407,10 @@ int ssb_bus_scan(struct ssb_bus *bus,
|
|
/* Ignore PCI cores on PCI-E cards.
|
|
* Ignore PCI-E cores on PCI cards. */
|
|
if (dev->id.coreid == SSB_DEV_PCI) {
|
|
- if (bus->host_pci->is_pcie)
|
|
+ if (pci_is_pcie(bus->host_pci))
|
|
continue;
|
|
} else {
|
|
- if (!bus->host_pci->is_pcie)
|
|
+ if (!pci_is_pcie(bus->host_pci))
|
|
continue;
|
|
}
|
|
}
|
|
@@ -422,6 +422,16 @@ int ssb_bus_scan(struct ssb_bus *bus,
|
|
bus->pcicore.dev = dev;
|
|
#endif /* CONFIG_SSB_DRIVER_PCICORE */
|
|
break;
|
|
+ case SSB_DEV_ETHERNET:
|
|
+ if (bus->bustype == SSB_BUSTYPE_PCI) {
|
|
+ if (bus->host_pci->vendor == PCI_VENDOR_ID_BROADCOM &&
|
|
+ (bus->host_pci->device & 0xFF00) == 0x4300) {
|
|
+ /* This is a dangling ethernet core on a
|
|
+ * wireless device. Ignore it. */
|
|
+ continue;
|
|
+ }
|
|
+ }
|
|
+ break;
|
|
default:
|
|
break;
|
|
}
|
|
--- a/include/linux/ssb/ssb.h
|
|
+++ b/include/linux/ssb/ssb.h
|
|
@@ -55,6 +55,10 @@ struct ssb_sprom {
|
|
u8 tri5gl; /* 5.2GHz TX isolation */
|
|
u8 tri5g; /* 5.3GHz TX isolation */
|
|
u8 tri5gh; /* 5.8GHz TX isolation */
|
|
+ u8 txpid2g[4]; /* 2GHz TX power index */
|
|
+ u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */
|
|
+ u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */
|
|
+ u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */
|
|
u8 rxpo2g; /* 2GHz RX power offset */
|
|
u8 rxpo5g; /* 5GHz RX power offset */
|
|
u8 rssisav2g; /* 2GHz RSSI params */
|
|
@@ -167,7 +171,7 @@ struct ssb_device {
|
|
* is an optimization. */
|
|
const struct ssb_bus_ops *ops;
|
|
|
|
- struct device *dev;
|
|
+ struct device *dev, *dma_dev;
|
|
|
|
struct ssb_bus *bus;
|
|
struct ssb_device_id id;
|
|
@@ -470,14 +474,6 @@ extern u32 ssb_dma_translation(struct ss
|
|
#define SSB_DMA_TRANSLATION_MASK 0xC0000000
|
|
#define SSB_DMA_TRANSLATION_SHIFT 30
|
|
|
|
-extern int ssb_dma_set_mask(struct ssb_device *dev, u64 mask);
|
|
-
|
|
-extern void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
|
|
- dma_addr_t *dma_handle, gfp_t gfp_flags);
|
|
-extern void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
|
|
- void *vaddr, dma_addr_t dma_handle,
|
|
- gfp_t gfp_flags);
|
|
-
|
|
static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
|
|
{
|
|
#ifdef CONFIG_SSB_DEBUG
|
|
@@ -486,155 +482,6 @@ static inline void __cold __ssb_dma_not_
|
|
#endif /* DEBUG */
|
|
}
|
|
|
|
-static inline int ssb_dma_mapping_error(struct ssb_device *dev, dma_addr_t addr)
|
|
-{
|
|
- switch (dev->bus->bustype) {
|
|
- case SSB_BUSTYPE_PCI:
|
|
-#ifdef CONFIG_SSB_PCIHOST
|
|
- return pci_dma_mapping_error(dev->bus->host_pci, addr);
|
|
-#endif
|
|
- break;
|
|
- case SSB_BUSTYPE_SSB:
|
|
- return dma_mapping_error(dev->dev, addr);
|
|
- default:
|
|
- break;
|
|
- }
|
|
- __ssb_dma_not_implemented(dev);
|
|
- return -ENOSYS;
|
|
-}
|
|
-
|
|
-static inline dma_addr_t ssb_dma_map_single(struct ssb_device *dev, void *p,
|
|
- size_t size, enum dma_data_direction dir)
|
|
-{
|
|
- switch (dev->bus->bustype) {
|
|
- case SSB_BUSTYPE_PCI:
|
|
-#ifdef CONFIG_SSB_PCIHOST
|
|
- return pci_map_single(dev->bus->host_pci, p, size, dir);
|
|
-#endif
|
|
- break;
|
|
- case SSB_BUSTYPE_SSB:
|
|
- return dma_map_single(dev->dev, p, size, dir);
|
|
- default:
|
|
- break;
|
|
- }
|
|
- __ssb_dma_not_implemented(dev);
|
|
- return 0;
|
|
-}
|
|
-
|
|
-static inline void ssb_dma_unmap_single(struct ssb_device *dev, dma_addr_t dma_addr,
|
|
- size_t size, enum dma_data_direction dir)
|
|
-{
|
|
- switch (dev->bus->bustype) {
|
|
- case SSB_BUSTYPE_PCI:
|
|
-#ifdef CONFIG_SSB_PCIHOST
|
|
- pci_unmap_single(dev->bus->host_pci, dma_addr, size, dir);
|
|
- return;
|
|
-#endif
|
|
- break;
|
|
- case SSB_BUSTYPE_SSB:
|
|
- dma_unmap_single(dev->dev, dma_addr, size, dir);
|
|
- return;
|
|
- default:
|
|
- break;
|
|
- }
|
|
- __ssb_dma_not_implemented(dev);
|
|
-}
|
|
-
|
|
-static inline void ssb_dma_sync_single_for_cpu(struct ssb_device *dev,
|
|
- dma_addr_t dma_addr,
|
|
- size_t size,
|
|
- enum dma_data_direction dir)
|
|
-{
|
|
- switch (dev->bus->bustype) {
|
|
- case SSB_BUSTYPE_PCI:
|
|
-#ifdef CONFIG_SSB_PCIHOST
|
|
- pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
|
|
- size, dir);
|
|
- return;
|
|
-#endif
|
|
- break;
|
|
- case SSB_BUSTYPE_SSB:
|
|
- dma_sync_single_for_cpu(dev->dev, dma_addr, size, dir);
|
|
- return;
|
|
- default:
|
|
- break;
|
|
- }
|
|
- __ssb_dma_not_implemented(dev);
|
|
-}
|
|
-
|
|
-static inline void ssb_dma_sync_single_for_device(struct ssb_device *dev,
|
|
- dma_addr_t dma_addr,
|
|
- size_t size,
|
|
- enum dma_data_direction dir)
|
|
-{
|
|
- switch (dev->bus->bustype) {
|
|
- case SSB_BUSTYPE_PCI:
|
|
-#ifdef CONFIG_SSB_PCIHOST
|
|
- pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
|
|
- size, dir);
|
|
- return;
|
|
-#endif
|
|
- break;
|
|
- case SSB_BUSTYPE_SSB:
|
|
- dma_sync_single_for_device(dev->dev, dma_addr, size, dir);
|
|
- return;
|
|
- default:
|
|
- break;
|
|
- }
|
|
- __ssb_dma_not_implemented(dev);
|
|
-}
|
|
-
|
|
-static inline void ssb_dma_sync_single_range_for_cpu(struct ssb_device *dev,
|
|
- dma_addr_t dma_addr,
|
|
- unsigned long offset,
|
|
- size_t size,
|
|
- enum dma_data_direction dir)
|
|
-{
|
|
- switch (dev->bus->bustype) {
|
|
- case SSB_BUSTYPE_PCI:
|
|
-#ifdef CONFIG_SSB_PCIHOST
|
|
- /* Just sync everything. That's all the PCI API can do. */
|
|
- pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
|
|
- offset + size, dir);
|
|
- return;
|
|
-#endif
|
|
- break;
|
|
- case SSB_BUSTYPE_SSB:
|
|
- dma_sync_single_range_for_cpu(dev->dev, dma_addr, offset,
|
|
- size, dir);
|
|
- return;
|
|
- default:
|
|
- break;
|
|
- }
|
|
- __ssb_dma_not_implemented(dev);
|
|
-}
|
|
-
|
|
-static inline void ssb_dma_sync_single_range_for_device(struct ssb_device *dev,
|
|
- dma_addr_t dma_addr,
|
|
- unsigned long offset,
|
|
- size_t size,
|
|
- enum dma_data_direction dir)
|
|
-{
|
|
- switch (dev->bus->bustype) {
|
|
- case SSB_BUSTYPE_PCI:
|
|
-#ifdef CONFIG_SSB_PCIHOST
|
|
- /* Just sync everything. That's all the PCI API can do. */
|
|
- pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
|
|
- offset + size, dir);
|
|
- return;
|
|
-#endif
|
|
- break;
|
|
- case SSB_BUSTYPE_SSB:
|
|
- dma_sync_single_range_for_device(dev->dev, dma_addr, offset,
|
|
- size, dir);
|
|
- return;
|
|
- default:
|
|
- break;
|
|
- }
|
|
- __ssb_dma_not_implemented(dev);
|
|
-}
|
|
-
|
|
-
|
|
#ifdef CONFIG_SSB_PCIHOST
|
|
/* PCI-host wrapper driver */
|
|
extern int ssb_pcihost_register(struct pci_driver *driver);
|
|
--- a/include/linux/ssb/ssb_driver_gige.h
|
|
+++ b/include/linux/ssb/ssb_driver_gige.h
|
|
@@ -96,16 +96,21 @@ static inline bool ssb_gige_must_flush_p
|
|
return 0;
|
|
}
|
|
|
|
-extern char * nvram_get(const char *name);
|
|
+#ifdef CONFIG_BCM47XX
|
|
+#include <asm/mach-bcm47xx/nvram.h>
|
|
/* Get the device MAC address */
|
|
static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
|
|
{
|
|
-#ifdef CONFIG_BCM47XX
|
|
- char *res = nvram_get("et0macaddr");
|
|
- if (res)
|
|
- memcpy(macaddr, res, 6);
|
|
-#endif
|
|
+ char buf[20];
|
|
+ if (nvram_getenv("et0macaddr", buf, sizeof(buf)) < 0)
|
|
+ return;
|
|
+ nvram_parse_macaddr(buf, macaddr);
|
|
}
|
|
+#else
|
|
+static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
|
|
+{
|
|
+}
|
|
+#endif
|
|
|
|
extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
|
|
struct pci_dev *pdev);
|
|
--- a/include/linux/ssb/ssb_regs.h
|
|
+++ b/include/linux/ssb/ssb_regs.h
|
|
@@ -85,6 +85,8 @@
|
|
#define SSB_IMSTATE_AP_RSV 0x00000030 /* Reserved */
|
|
#define SSB_IMSTATE_IBE 0x00020000 /* In Band Error */
|
|
#define SSB_IMSTATE_TO 0x00040000 /* Timeout */
|
|
+#define SSB_IMSTATE_BUSY 0x01800000 /* Busy (Backplane rev >= 2.3 only) */
|
|
+#define SSB_IMSTATE_REJECT 0x02000000 /* Reject (Backplane rev >= 2.3 only) */
|
|
#define SSB_INTVEC 0x0F94 /* SB Interrupt Mask */
|
|
#define SSB_INTVEC_PCI 0x00000001 /* Enable interrupts for PCI */
|
|
#define SSB_INTVEC_ENET0 0x00000002 /* Enable interrupts for enet 0 */
|
|
@@ -267,6 +269,8 @@
|
|
/* SPROM Revision 4 */
|
|
#define SSB_SPROM4_BFLLO 0x0044 /* Boardflags (low 16 bits) */
|
|
#define SSB_SPROM4_BFLHI 0x0046 /* Board Flags Hi */
|
|
+#define SSB_SPROM4_BFL2LO 0x0048 /* Board flags 2 (low 16 bits) */
|
|
+#define SSB_SPROM4_BFL2HI 0x004A /* Board flags 2 Hi */
|
|
#define SSB_SPROM4_IL0MAC 0x004C /* 6 byte MAC address for a/b/g/n */
|
|
#define SSB_SPROM4_CCODE 0x0052 /* Country Code (2 bytes) */
|
|
#define SSB_SPROM4_GPIOA 0x0056 /* Gen. Purpose IO # 0 and 1 */
|
|
@@ -298,6 +302,46 @@
|
|
#define SSB_SPROM4_AGAIN2_SHIFT 0
|
|
#define SSB_SPROM4_AGAIN3 0xFF00 /* Antenna 3 */
|
|
#define SSB_SPROM4_AGAIN3_SHIFT 8
|
|
+#define SSB_SPROM4_TXPID2G01 0x0062 /* TX Power Index 2GHz */
|
|
+#define SSB_SPROM4_TXPID2G0 0x00FF
|
|
+#define SSB_SPROM4_TXPID2G0_SHIFT 0
|
|
+#define SSB_SPROM4_TXPID2G1 0xFF00
|
|
+#define SSB_SPROM4_TXPID2G1_SHIFT 8
|
|
+#define SSB_SPROM4_TXPID2G23 0x0064 /* TX Power Index 2GHz */
|
|
+#define SSB_SPROM4_TXPID2G2 0x00FF
|
|
+#define SSB_SPROM4_TXPID2G2_SHIFT 0
|
|
+#define SSB_SPROM4_TXPID2G3 0xFF00
|
|
+#define SSB_SPROM4_TXPID2G3_SHIFT 8
|
|
+#define SSB_SPROM4_TXPID5G01 0x0066 /* TX Power Index 5GHz middle subband */
|
|
+#define SSB_SPROM4_TXPID5G0 0x00FF
|
|
+#define SSB_SPROM4_TXPID5G0_SHIFT 0
|
|
+#define SSB_SPROM4_TXPID5G1 0xFF00
|
|
+#define SSB_SPROM4_TXPID5G1_SHIFT 8
|
|
+#define SSB_SPROM4_TXPID5G23 0x0068 /* TX Power Index 5GHz middle subband */
|
|
+#define SSB_SPROM4_TXPID5G2 0x00FF
|
|
+#define SSB_SPROM4_TXPID5G2_SHIFT 0
|
|
+#define SSB_SPROM4_TXPID5G3 0xFF00
|
|
+#define SSB_SPROM4_TXPID5G3_SHIFT 8
|
|
+#define SSB_SPROM4_TXPID5GL01 0x006A /* TX Power Index 5GHz low subband */
|
|
+#define SSB_SPROM4_TXPID5GL0 0x00FF
|
|
+#define SSB_SPROM4_TXPID5GL0_SHIFT 0
|
|
+#define SSB_SPROM4_TXPID5GL1 0xFF00
|
|
+#define SSB_SPROM4_TXPID5GL1_SHIFT 8
|
|
+#define SSB_SPROM4_TXPID5GL23 0x006C /* TX Power Index 5GHz low subband */
|
|
+#define SSB_SPROM4_TXPID5GL2 0x00FF
|
|
+#define SSB_SPROM4_TXPID5GL2_SHIFT 0
|
|
+#define SSB_SPROM4_TXPID5GL3 0xFF00
|
|
+#define SSB_SPROM4_TXPID5GL3_SHIFT 8
|
|
+#define SSB_SPROM4_TXPID5GH01 0x006E /* TX Power Index 5GHz high subband */
|
|
+#define SSB_SPROM4_TXPID5GH0 0x00FF
|
|
+#define SSB_SPROM4_TXPID5GH0_SHIFT 0
|
|
+#define SSB_SPROM4_TXPID5GH1 0xFF00
|
|
+#define SSB_SPROM4_TXPID5GH1_SHIFT 8
|
|
+#define SSB_SPROM4_TXPID5GH23 0x0070 /* TX Power Index 5GHz high subband */
|
|
+#define SSB_SPROM4_TXPID5GH2 0x00FF
|
|
+#define SSB_SPROM4_TXPID5GH2_SHIFT 0
|
|
+#define SSB_SPROM4_TXPID5GH3 0xFF00
|
|
+#define SSB_SPROM4_TXPID5GH3_SHIFT 8
|
|
#define SSB_SPROM4_MAXP_BG 0x0080 /* Max Power BG in path 1 */
|
|
#define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */
|
|
#define SSB_SPROM4_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
|
|
@@ -317,6 +361,8 @@
|
|
#define SSB_SPROM5_CCODE 0x0044 /* Country Code (2 bytes) */
|
|
#define SSB_SPROM5_BFLLO 0x004A /* Boardflags (low 16 bits) */
|
|
#define SSB_SPROM5_BFLHI 0x004C /* Board Flags Hi */
|
|
+#define SSB_SPROM5_BFL2LO 0x004E /* Board flags 2 (low 16 bits) */
|
|
+#define SSB_SPROM5_BFL2HI 0x0050 /* Board flags 2 Hi */
|
|
#define SSB_SPROM5_IL0MAC 0x0052 /* 6 byte MAC address for a/b/g/n */
|
|
#define SSB_SPROM5_GPIOA 0x0076 /* Gen. Purpose IO # 0 and 1 */
|
|
#define SSB_SPROM5_GPIOA_P0 0x00FF /* Pin 0 */
|