mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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f2ef1714a6
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26224 3c298f89-4303-0410-b956-a3cf2f4a3e73
212 lines
7.2 KiB
Diff
212 lines
7.2 KiB
Diff
From adb6abbe4e3bc17c20cdc70e4a4357f1633d4970 Mon Sep 17 00:00:00 2001
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From: Joseph Kortje <jpktech@rogers.com>
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Date: Wed, 28 Oct 2009 21:49:11 -0400
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Subject: [PATCH] [ARM] gumstix.h: Verdex Pro support
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Added a bunch of ifdefs to support both original gumstix boards
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as well as the Verdex Pro in gumstix.h
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Signed-off-by: Bobby Powers <bobbypowers@gmail.com>
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---
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arch/arm/mach-pxa/include/mach/gumstix.h | 160 ++++++++++++++++++++++++------
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1 files changed, 130 insertions(+), 30 deletions(-)
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--- a/arch/arm/mach-pxa/include/mach/gumstix.h
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+++ b/arch/arm/mach-pxa/include/mach/gumstix.h
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@@ -6,6 +6,9 @@
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* published by the Free Software Foundation.
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*/
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+#if !defined(__ASM_ARCH_MFP_PXA27X_H) && !defined(__ASM_ARCH_MFP_PXA25X_H)
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+ #error You need to include either mfp-pxa27x.h or mfp-pxa25x.h
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+#endif
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/* BTRESET - Reset line to Bluetooth module, active low signal. */
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#define GPIO_GUMSTIX_BTRESET 7
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@@ -20,9 +23,18 @@ this moves to GPIO17 and GPIO37. */
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/* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn
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has detected a cable insertion; driven low otherwise. */
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+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
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+
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#define GPIO_GUMSTIX_USB_GPIOn 35
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#define GPIO_GUMSTIX_USB_GPIOx 41
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+#else
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+
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+#define GPIO_GUMSTIX_USB_GPIOn 100
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+#define GPIO_GUMSTIX_USB_GPIOx 27
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+
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+#endif
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+
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/* usb state change */
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#define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn)
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@@ -42,48 +54,136 @@ has detected a cable insertion; driven l
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* ETH_RST provides a hardware reset line to the ethernet chip
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* ETH is the IRQ line in from the ethernet chip to the PXA
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*/
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+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
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#define GPIO_GUMSTIX_ETH0_RST 80
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-#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
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+#define GPIO_GUMSTIX_ETH0 36
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+#else
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+#define GPIO_GUMSTIX_ETH0_RST 107
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+#define GPIO_GUMSTIX_ETH0 99
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+#endif
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#define GPIO_GUMSTIX_ETH1_RST 52
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-#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
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+#define GPIO_GUMSTIX_ETH1 27
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-#define GPIO_GUMSTIX_ETH0 36
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+#define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT)
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+#define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT)
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#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
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-#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0)
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-#define GPIO_GUMSTIX_ETH1 27
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#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
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-#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1)
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+#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0)
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+#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1)
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/* CF reset line */
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-#define GPIO8_RESET 8
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+#define GPIO8_CF_RESET 8
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+#define GPIO97_CF_RESET 97
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+#define GPIO110_CF_RESET 110
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+
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+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
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+#define GPIO_GUMSTIX_CF_RESET GPIO8_CF_RESET
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+#else
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+#define GPIO_GUMSTIX_CF_RESET GPIO97_CF_RESET
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+#endif
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+
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+#define GPIO_GUMSTIX_CF_OLD_RESET GPIO110_CF_RESET
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+
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+/* CF signals shared by both sockets */
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+#define GPIO_GUMSTIX_nPOE 48
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+#define GPIO_GUMSTIX_nPWE 49
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+#define GPIO_GUMSTIX_nPIOR 50
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+#define GPIO_GUMSTIX_nPIOW 51
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+
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+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
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+#define GPIO_GUMSTIX_nPCE_1 52
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+#define GPIO_GUMSTIX_nPCE_2 53
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+#define GPIO_GUMSTIX_pSKTSEL 54
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+#else
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+#define GPIO_GUMSTIX_nPCE_1 102
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+#define GPIO_GUMSTIX_nPCE_2 105
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+#define GPIO_GUMSTIX_pSKTSEL 79
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+#endif
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+
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+#define GPIO_GUMSTIX_nPREG 55
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+#define GPIO_GUMSTIX_nPWAIT 56
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+#define GPIO_GUMSTIX_nIOIS16 57
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+
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+/* Pin mode definitions correspond to mfp-pxa2[57]x.h */
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+#define GPIO_GUMSTIX_nPOE_MD GPIO48_nPOE
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+#define GPIO_GUMSTIX_nPWE_MD GPIO49_nPWE
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+#define GPIO_GUMSTIX_nPIOR_MD GPIO50_nPIOR
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+#define GPIO_GUMSTIX_nPIOW_MD GPIO51_nPIOW
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+
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+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
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+#define GPIO_GUMSTIX_nPCE_1_MD GPIO52_nPCE_1
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+#define GPIO_GUMSTIX_nPCE_2_MD GPIO53_nPCE_2
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+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO54_pSKTSEL
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+#else
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+#define GPIO_GUMSTIX_nPCE_1_MD GPIO102_nPCE_1
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+#define GPIO_GUMSTIX_nPCE_2_MD GPIO105_nPCE_2
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+#define GPIO_GUMSTIX_pSKTSEL_MD GPIO79_pSKTSEL
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+#endif
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+
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+#define GPIO_GUMSTIX_nPREG_MD GPIO55_nPREG
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+#define GPIO_GUMSTIX_nPWAIT_MD GPIO56_nPWAIT
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+#define GPIO_GUMSTIX_nIOIS16_MD GPIO57_nIOIS16
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/* CF slot 0 */
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-#define GPIO4_nBVD1 4
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-#define GPIO4_nSTSCHG GPIO4_nBVD1
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-#define GPIO11_nCD 11
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-#define GPIO26_PRDY_nBSY 26
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-#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO4_nSTSCHG)
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-#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO11_nCD)
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-#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO26_PRDY_nBSY)
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+#define GPIO4_nBVD1_0 4
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+#define GPIO4_nSTSCHG_0 GPIO4_nBVD1_0
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+#define GPIO11_nCD_0 11
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+#define GPIO26_PRDY_nBSY_0 26
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+
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+#define GPIO111_nBVD1_0 111
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+#define GPIO111_nSTSCHG_0 GPIO111_nBVD1_0
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+#define GPIO104_nCD_0 104
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+#define GPIO96_PRDY_nBSY_0 96
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+#define GPIO109_PRDY_nBSY_0 109
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+
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+#ifndef CONFIG_MACH_GUMSTIX_VERDEX
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+#define GPIO_GUMSTIX_nBVD1_0 GPIO4_nBVD1_0
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+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO4_nSTSCHG_0
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+#define GPIO_GUMSTIX_nCD_0 GPIO11_nCD_0
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+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO26_PRDY_nBSY_0
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+#else
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+#define GPIO_GUMSTIX_nBVD1_0 GPIO111_nBVD1_0
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+#define GPIO_GUMSTIX_nSTSCHG_0 GPIO111_nSTSCHG_0
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+#define GPIO_GUMSTIX_nCD_0 GPIO104_nCD_0
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+#define GPIO_GUMSTIX_PRDY_nBSY_0 GPIO96_PRDY_nBSY_0
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+#endif
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+
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+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD GPIO109_PRDY_nBSY_0
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+
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+#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_0)
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+#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO_GUMSTIX_nCD_0)
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+#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0)
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+#define GUMSTIX_S0_PRDY_nBSY_OLD_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_0_OLD)
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/* CF slot 1 */
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-#define GPIO18_nBVD1 18
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-#define GPIO18_nSTSCHG GPIO18_nBVD1
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-#define GPIO36_nCD 36
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-#define GPIO27_PRDY_nBSY 27
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-#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO18_nSTSCHG)
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-#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO36_nCD)
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-#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO27_PRDY_nBSY)
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-
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-/* CF GPIO line modes */
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-#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN)
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-#define GPIO8_RESET_MD (GPIO8_RESET | GPIO_OUT)
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-#define GPIO11_nCD_MD (GPIO11_nCD | GPIO_IN)
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-#define GPIO18_nSTSCHG_MD (GPIO18_nSTSCHG | GPIO_IN)
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-#define GPIO26_PRDY_nBSY_MD (GPIO26_PRDY_nBSY | GPIO_IN)
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-#define GPIO27_PRDY_nBSY_MD (GPIO27_PRDY_nBSY | GPIO_IN)
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-#define GPIO36_nCD_MD (GPIO36_nCD | GPIO_IN)
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+#define GPIO18_nBVD1_1 18
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+#define GPIO18_nSTSCHG_1 GPIO18_nBVD1_1
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+#define GPIO36_nCD_1 36
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+#define GPIO27_PRDY_nBSY_1 27
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+
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+#define GPIO_GUMSTIX_nBVD1_1 GPIO18_nBVD1_1
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+#define GPIO_GUMSTIX_nSTSCHG_1 GPIO18_nSTSCHG_1
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+#define GPIO_GUMSTIX_nCD_1 GPIO36_nCD_1
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+#define GPIO_GUMSTIX_PRDY_nBSY_1 GPIO27_PRDY_nBSY_1
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+
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+#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO_GUMSTIX_nSTSCHG_1)
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+#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO_GUMSTIX_nCD_1)
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+#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO_GUMSTIX_PRDY_nBSY_1)
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+
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+/* CF GPIO line modes - correspond to mfp-pxa2[57]x.h */
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+#define GPIO_GUMSTIX_CF_RESET_MD ( GPIO_GUMSTIX_CF_RESET | GPIO_OUT )
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+#define GPIO_GUMSTIX_CF_OLD_RESET_MD ( GPIO_GUMSTIX_CF_OLD_RESET | GPIO_OUT )
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+
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+#define GPIO_GUMSTIX_nSTSCHG_0_MD GPIO111_GPIO
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+#define GPIO_GUMSTIX_nCD_0_MD GPIO104_GPIO
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+
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+#define GPIO_GUMSTIX_PRDY_nBSY_0_MD GPIO96_GPIO
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+#define GPIO_GUMSTIX_PRDY_nBSY_0_OLD_MD GPIO109_GPIO
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+
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+#define GPIO_GUMSTIX_nSTSCHG_1_MD GPIO18_GPIO
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+#define GPIO_GUMSTIX_nCD_1_MD GPIO36_GPIO
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+#define GPIO_GUMSTIX_PRDY_nBSY_1_MD GPIO27_GPIO
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/* for expansion boards that can't be programatically detected */
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extern int am200_init(void);
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