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dfffaea839
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@28721 3c298f89-4303-0410-b956-a3cf2f4a3e73
37 lines
1.3 KiB
Diff
37 lines
1.3 KiB
Diff
From 2dfa2b3e50c5ac49052233d15fa427a9b9136df8 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Thu, 27 Oct 2011 20:06:05 +0200
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Subject: [PATCH 10/22] MIPS: lantiq: fixes STP based gpios
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The STP engine has 3 groups of 8 pins. Only the first was activated by default.
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Signed-off-by: Matti Laakso <malaakso@elisanet.fi>
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/lantiq/xway/gpio_stp.c | 7 +++++--
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1 files changed, 5 insertions(+), 2 deletions(-)
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--- a/arch/mips/lantiq/xway/gpio_stp.c
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+++ b/arch/mips/lantiq/xway/gpio_stp.c
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@@ -35,6 +35,8 @@
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#define LTQ_STP_ADSL_SRC (3 << 24)
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#define LTQ_STP_GROUP0 (1 << 0)
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+#define LTQ_STP_GROUP1 (1 << 1)
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+#define LTQ_STP_GROUP2 (1 << 2)
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#define LTQ_STP_RISING 0
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#define LTQ_STP_FALLING (1 << 26)
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@@ -93,8 +95,9 @@ static int ltq_stp_hw_init(void)
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/* rising or falling edge */
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ltq_stp_w32_mask(LTQ_STP_EDGE_MASK, LTQ_STP_FALLING, LTQ_STP_CON0);
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- /* per default stp 15-0 are set */
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- ltq_stp_w32_mask(0, LTQ_STP_GROUP0, LTQ_STP_CON1);
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+ /* enable all three led groups */
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+ ltq_stp_w32_mask(0, LTQ_STP_GROUP0 | LTQ_STP_GROUP1 | LTQ_STP_GROUP2,
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+ LTQ_STP_CON1);
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/* stp are update periodically by the FPI bus */
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ltq_stp_w32_mask(LTQ_STP_UPD_MASK, LTQ_STP_UPD_FPI, LTQ_STP_CON1);
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