mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-18 18:33:43 +02:00
5289528bdb
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20253 3c298f89-4303-0410-b956-a3cf2f4a3e73
174 lines
4.6 KiB
Diff
174 lines
4.6 KiB
Diff
From 5b3f9de4171368d9a99fa4c8b8b1bcc8505fb3c6 Mon Sep 17 00:00:00 2001
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From: Lars-Peter Clausen <lars@metafoo.de>
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Date: Mon, 11 Jan 2010 04:29:44 +0100
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Subject: [PATCH] /opt/Projects/openwrt/target/linux/xburst/patches-2.6.31/103-serial.patch
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---
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drivers/serial/8250.c | 104 ++++++++++++++++++++++++++++++++++++++++++++++++-
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1 files changed, 103 insertions(+), 1 deletions(-)
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--- a/drivers/serial/8250.c
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+++ b/drivers/serial/8250.c
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@@ -199,7 +199,7 @@ static const struct serial8250_config ua
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[PORT_16550A] = {
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.name = "16550A",
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.fifo_size = 16,
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- .tx_loadsz = 16,
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+ .tx_loadsz = 8,
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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
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.flags = UART_CAP_FIFO,
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},
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@@ -406,6 +406,10 @@ static unsigned int mem_serial_in(struct
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static void mem_serial_out(struct uart_port *p, int offset, int value)
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{
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offset = map_8250_out_reg(p, offset) << p->regshift;
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+#if defined(CONFIG_JZSOC)
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+ if (offset == (UART_FCR << p->regshift))
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+ value |= 0x10; /* set FCR.UUE */
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+#endif
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writeb(value, p->membase + offset);
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}
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@@ -2214,6 +2218,83 @@ static void serial8250_shutdown(struct u
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serial_unlink_irq_chain(up);
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}
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+#if defined(CONFIG_JZSOC) && !defined(CONFIG_SOC_JZ4730)
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+static unsigned short quot1[3] = {0}; /* quot[0]:baud_div, quot[1]:umr, quot[2]:uacr */
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+static unsigned short * serial8250_get_divisor(struct uart_port *port, unsigned int baud)
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+{
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+ int err, sum, i, j;
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+ int a[12], b[12];
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+ unsigned short div, umr, uacr;
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+ unsigned short umr_best, div_best, uacr_best;
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+ long long t0, t1, t2, t3;
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+
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+ sum = 0;
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+ umr_best = div_best = uacr_best = 0;
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+ div = 1;
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+
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+ if ((port->uartclk % (16 * baud)) == 0) {
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+ quot1[0] = port->uartclk / (16 * baud);
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+ quot1[1] = 16;
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+ quot1[2] = 0;
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+ return quot1;
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+ }
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+
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+ while (1) {
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+ umr = port->uartclk / (baud * div);
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+ if (umr > 32) {
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+ div++;
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+ continue;
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+ }
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+ if (umr < 4) {
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+ break;
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+ }
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+ for (i = 0; i < 12; i++) {
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+ a[i] = umr;
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+ b[i] = 0;
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+ sum = 0;
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+ for (j = 0; j <= i; j++) {
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+ sum += a[j];
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+ }
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+
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+ /* the precision could be 1/2^(36) due to the value of t0 */
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+ t0 = 0x1000000000LL;
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+ t1 = (i + 1) * t0;
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+ t2 = (sum * div) * t0;
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+ t3 = div * t0;
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+ do_div(t1, baud);
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+ do_div(t2, port->uartclk);
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+ do_div(t3, (2 * port->uartclk));
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+ err = t1 - t2 - t3;
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+
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+ if (err > 0) {
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+ a[i] += 1;
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+ b[i] = 1;
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+ }
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+ }
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+
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+ uacr = 0;
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+ for (i = 0; i < 12; i++) {
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+ if (b[i] == 1) {
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+ uacr |= 1 << i;
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+ }
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+ }
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+
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+ /* the best value of umr should be near 16, and the value of uacr should better be smaller */
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+ if (abs(umr - 16) < abs(umr_best - 16) || (abs(umr - 16) == abs(umr_best - 16) && uacr_best > uacr)) {
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+ div_best = div;
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+ umr_best = umr;
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+ uacr_best = uacr;
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+ }
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+ div++;
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+ }
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+
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+ quot1[0] = div_best;
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+ quot1[1] = umr_best;
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+ quot1[2] = uacr_best;
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+
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+ return quot1;
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+}
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+#else
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static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
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{
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unsigned int quot;
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@@ -2233,6 +2314,7 @@ static unsigned int serial8250_get_divis
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return quot;
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}
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+#endif
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static void
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serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
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@@ -2242,6 +2324,9 @@ serial8250_set_termios(struct uart_port
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unsigned char cval, fcr = 0;
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unsigned long flags;
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unsigned int baud, quot;
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+#if defined(CONFIG_JZSOC) && !defined(CONFIG_SOC_JZ4730)
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+ unsigned short *quot1;
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+#endif
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switch (termios->c_cflag & CSIZE) {
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case CS5:
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@@ -2276,7 +2361,12 @@ serial8250_set_termios(struct uart_port
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baud = uart_get_baud_rate(port, termios, old,
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port->uartclk / 16 / 0xffff,
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port->uartclk / 16);
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+#if defined(CONFIG_JZSOC) && !defined(CONFIG_SOC_JZ4730)
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+ quot1 = serial8250_get_divisor(port, baud);
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+ quot = quot1[0]; /* not usefull, just let gcc happy */
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+#else
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quot = serial8250_get_divisor(port, baud);
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+#endif
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/*
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* Oxford Semi 952 rev B workaround
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@@ -2354,6 +2444,10 @@ serial8250_set_termios(struct uart_port
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if (up->capabilities & UART_CAP_UUE)
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up->ier |= UART_IER_UUE | UART_IER_RTOIE;
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+#ifdef CONFIG_JZSOC
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+ up->ier |= UART_IER_RTOIE; /* Set this flag, or very slow */
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+#endif
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+
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serial_out(up, UART_IER, up->ier);
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if (up->capabilities & UART_CAP_EFR) {
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@@ -2388,7 +2482,15 @@ serial8250_set_termios(struct uart_port
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serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
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}
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+#if defined(CONFIG_JZSOC) && !defined(CONFIG_SOC_JZ4730)
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+#define UART_UMR 9
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+#define UART_UACR 10
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+ serial_dl_write(up, quot1[0]);
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+ serial_outp(up, UART_UMR, quot1[1]);
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+ serial_outp(up, UART_UACR, quot1[2]);
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+#else
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serial_dl_write(up, quot);
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+#endif
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/*
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* LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
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