mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31354 3c298f89-4303-0410-b956-a3cf2f4a3e73
155 lines
3.2 KiB
C
155 lines
3.2 KiB
C
/*
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* Atheros AP9X reference board PCI initialization
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*
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* Copyright (C) 2009-2012 Gabor Juhos <juhosg@openwrt.org>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/pci.h>
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#include <linux/ath9k_platform.h>
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#include <linux/delay.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/pci.h>
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#include "dev-ap9x-pci.h"
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#include "pci-ath9k-fixup.h"
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#include "pci.h"
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static struct ath9k_platform_data ap9x_wmac0_data = {
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.led_pin = -1,
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};
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static struct ath9k_platform_data ap9x_wmac1_data = {
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.led_pin = -1,
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};
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static char ap9x_wmac0_mac[6];
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static char ap9x_wmac1_mac[6];
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__init void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin)
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{
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switch (wmac) {
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case 0:
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ap9x_wmac0_data.led_pin = pin;
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break;
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case 1:
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ap9x_wmac1_data.led_pin = pin;
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break;
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}
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}
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__init struct ath9k_platform_data *ap9x_pci_get_wmac_data(unsigned wmac)
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{
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switch (wmac) {
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case 0:
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return &ap9x_wmac0_data;
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case 1:
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return &ap9x_wmac1_data;
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}
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return NULL;
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}
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__init void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val)
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{
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switch (wmac) {
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case 0:
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ap9x_wmac0_data.gpio_mask = mask;
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ap9x_wmac0_data.gpio_val = val;
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break;
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case 1:
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ap9x_wmac1_data.gpio_mask = mask;
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ap9x_wmac1_data.gpio_val = val;
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break;
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}
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}
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__init void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds,
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int num_leds)
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{
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switch (wmac) {
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case 0:
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ap9x_wmac0_data.leds = leds;
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ap9x_wmac0_data.num_leds = num_leds;
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break;
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case 1:
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ap9x_wmac1_data.leds = leds;
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ap9x_wmac1_data.num_leds = num_leds;
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break;
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}
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}
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static int ap91_pci_plat_dev_init(struct pci_dev *dev)
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{
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switch (PCI_SLOT(dev->devfn)) {
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case 0:
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dev->dev.platform_data = &ap9x_wmac0_data;
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break;
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}
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return 0;
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}
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__init void ap91_pci_init(u8 *cal_data, u8 *mac_addr)
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{
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if (cal_data)
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memcpy(ap9x_wmac0_data.eeprom_data, cal_data,
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sizeof(ap9x_wmac0_data.eeprom_data));
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if (mac_addr) {
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memcpy(ap9x_wmac0_mac, mac_addr, sizeof(ap9x_wmac0_mac));
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ap9x_wmac0_data.macaddr = ap9x_wmac0_mac;
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}
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ath79_pci_set_plat_dev_init(ap91_pci_plat_dev_init);
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ath79_register_pci();
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pci_enable_ath9k_fixup(0, ap9x_wmac0_data.eeprom_data);
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}
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static int ap94_pci_plat_dev_init(struct pci_dev *dev)
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{
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switch (PCI_SLOT(dev->devfn)) {
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case 17:
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dev->dev.platform_data = &ap9x_wmac0_data;
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break;
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case 18:
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dev->dev.platform_data = &ap9x_wmac1_data;
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break;
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}
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return 0;
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}
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__init void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0,
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u8 *cal_data1, u8 *mac_addr1)
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{
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if (cal_data0)
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memcpy(ap9x_wmac0_data.eeprom_data, cal_data0,
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sizeof(ap9x_wmac0_data.eeprom_data));
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if (cal_data1)
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memcpy(ap9x_wmac1_data.eeprom_data, cal_data1,
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sizeof(ap9x_wmac1_data.eeprom_data));
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if (mac_addr0) {
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memcpy(ap9x_wmac0_mac, mac_addr0, sizeof(ap9x_wmac0_mac));
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ap9x_wmac0_data.macaddr = ap9x_wmac0_mac;
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}
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if (mac_addr1) {
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memcpy(ap9x_wmac1_mac, mac_addr1, sizeof(ap9x_wmac1_mac));
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ap9x_wmac1_data.macaddr = ap9x_wmac1_mac;
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}
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ath79_pci_set_plat_dev_init(ap94_pci_plat_dev_init);
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ath79_register_pci();
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pci_enable_ath9k_fixup(17, ap9x_wmac0_data.eeprom_data);
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pci_enable_ath9k_fixup(18, ap9x_wmac1_data.eeprom_data);
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}
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