mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-21 15:24:36 +02:00
035f06d698
This adds support for parsing sprom form nvram for sprom version form 1 to 9. It also adds sprom from nvram support for devices on the bcma bus. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30638 3c298f89-4303-0410-b956-a3cf2f4a3e73
76 lines
2.9 KiB
Diff
76 lines
2.9 KiB
Diff
From 0af3fa9e4c9ea0ca0662f09183d71ea9a7eb572f Mon Sep 17 00:00:00 2001
|
|
From: Hauke Mehrtens <hauke@hauke-m.de>
|
|
Date: Sat, 18 Feb 2012 14:33:08 +0100
|
|
Subject: [PATCH 190/202] ssb: sprom fix some sizes / signedness
|
|
|
|
Some parts of the sprom struct are bigger than needed.
|
|
The leddc and maxpwr values are just 8 bit long and not 16.
|
|
rxpo2g and rxpo5g are signed
|
|
antenna_gain is unsigned
|
|
|
|
I got these information for the open source part of the Braodcom SDK
|
|
covering sprom version 1 to 9. rxpo2g contained a negative number on my
|
|
bcm5354 based device, this cased an error and Broadcom SDK says this is
|
|
signed.
|
|
|
|
I was unable to find any reverences to antenna_gain.ghz5 in the
|
|
Broadcom SDK.
|
|
|
|
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
|
---
|
|
include/linux/ssb/ssb.h | 20 ++++++++++----------
|
|
1 files changed, 10 insertions(+), 10 deletions(-)
|
|
|
|
--- a/include/linux/ssb/ssb.h
|
|
+++ b/include/linux/ssb/ssb.h
|
|
@@ -33,8 +33,8 @@ struct ssb_sprom {
|
|
u8 et1mdcport; /* MDIO for enet1 */
|
|
u16 board_rev; /* Board revision number from SPROM. */
|
|
u8 country_code; /* Country Code */
|
|
- u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */
|
|
- u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
|
|
+ u8 leddc_on_time; /* LED Powersave Duty Cycle On Count */
|
|
+ u8 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
|
|
u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
|
|
u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
|
|
u16 pa0b0;
|
|
@@ -53,10 +53,10 @@ struct ssb_sprom {
|
|
u8 gpio1; /* GPIO pin 1 */
|
|
u8 gpio2; /* GPIO pin 2 */
|
|
u8 gpio3; /* GPIO pin 3 */
|
|
- u16 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
|
|
- u16 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
|
|
- u16 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
|
|
- u16 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
|
|
+ u8 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
|
|
+ u8 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
|
|
+ u8 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
|
|
+ u8 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
|
|
u8 itssi_a; /* Idle TSSI Target for A-PHY */
|
|
u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
|
|
u8 tri2g; /* 2.4GHz TX isolation */
|
|
@@ -67,8 +67,8 @@ struct ssb_sprom {
|
|
u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */
|
|
u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */
|
|
u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */
|
|
- u8 rxpo2g; /* 2GHz RX power offset */
|
|
- u8 rxpo5g; /* 5GHz RX power offset */
|
|
+ s8 rxpo2g; /* 2GHz RX power offset */
|
|
+ s8 rxpo5g; /* 5GHz RX power offset */
|
|
u8 rssisav2g; /* 2GHz RSSI params */
|
|
u8 rssismc2g;
|
|
u8 rssismf2g;
|
|
@@ -95,10 +95,10 @@ struct ssb_sprom {
|
|
* loss in the connectors is bigger than the gain. */
|
|
struct {
|
|
struct {
|
|
- s8 a0, a1, a2, a3;
|
|
+ u8 a0, a1, a2, a3;
|
|
} ghz24; /* 2.4GHz band */
|
|
struct {
|
|
- s8 a0, a1, a2, a3;
|
|
+ u8 a0, a1, a2, a3;
|
|
} ghz5; /* 5GHz band */
|
|
} antenna_gain;
|
|
|