mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-08-20 14:07:08 +03:00
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34846 3c298f89-4303-0410-b956-a3cf2f4a3e73
210 lines
5.7 KiB
Diff
210 lines
5.7 KiB
Diff
--- a/arch/mips/ath79/mach-db120.c
|
|
+++ b/arch/mips/ath79/mach-db120.c
|
|
@@ -2,7 +2,7 @@
|
|
* Atheros DB120 reference board support
|
|
*
|
|
* Copyright (c) 2011 Qualcomm Atheros
|
|
- * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org>
|
|
+ * Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
|
|
*
|
|
* Permission to use, copy, modify, and/or distribute this software for any
|
|
* purpose with or without fee is hereby granted, provided that the above
|
|
@@ -19,16 +19,26 @@
|
|
*/
|
|
|
|
#include <linux/pci.h>
|
|
+#include <linux/phy.h>
|
|
+#include <linux/platform_device.h>
|
|
#include <linux/ath9k_platform.h>
|
|
+#include <linux/ar8216_platform.h>
|
|
|
|
-#include "machtypes.h"
|
|
+#include <asm/mach-ath79/ar71xx_regs.h>
|
|
+
|
|
+#include "common.h"
|
|
+#include "dev-ap9x-pci.h"
|
|
+#include "dev-eth.h"
|
|
#include "dev-gpio-buttons.h"
|
|
#include "dev-leds-gpio.h"
|
|
+#include "dev-m25p80.h"
|
|
+#include "dev-nfc.h"
|
|
#include "dev-spi.h"
|
|
#include "dev-usb.h"
|
|
#include "dev-wmac.h"
|
|
-#include "pci.h"
|
|
+#include "machtypes.h"
|
|
|
|
+#define DB120_GPIO_LED_USB 11
|
|
#define DB120_GPIO_LED_WLAN_5G 12
|
|
#define DB120_GPIO_LED_WLAN_2G 13
|
|
#define DB120_GPIO_LED_STATUS 14
|
|
@@ -39,8 +49,10 @@
|
|
#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */
|
|
#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL)
|
|
|
|
-#define DB120_WMAC_CALDATA_OFFSET 0x1000
|
|
-#define DB120_PCIE_CALDATA_OFFSET 0x5000
|
|
+#define DB120_MAC0_OFFSET 0
|
|
+#define DB120_MAC1_OFFSET 6
|
|
+#define DB120_WMAC_CALDATA_OFFSET 0x1000
|
|
+#define DB120_PCIE_CALDATA_OFFSET 0x5000
|
|
|
|
static struct gpio_led db120_leds_gpio[] __initdata = {
|
|
{
|
|
@@ -63,6 +75,11 @@ static struct gpio_led db120_leds_gpio[]
|
|
.gpio = DB120_GPIO_LED_WLAN_2G,
|
|
.active_low = 1,
|
|
},
|
|
+ {
|
|
+ .name = "db120:green:usb",
|
|
+ .gpio = DB120_GPIO_LED_USB,
|
|
+ .active_low = 1,
|
|
+ }
|
|
};
|
|
|
|
static struct gpio_keys_button db120_gpio_keys[] __initdata = {
|
|
@@ -76,66 +93,85 @@ static struct gpio_keys_button db120_gpi
|
|
},
|
|
};
|
|
|
|
-static struct ath79_spi_controller_data db120_spi0_data = {
|
|
- .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
|
|
- .cs_line = 0,
|
|
+static struct ar8327_pad_cfg db120_ar8327_pad0_cfg = {
|
|
+ .mode = AR8327_PAD_MAC_RGMII,
|
|
+ .txclk_delay_en = true,
|
|
+ .rxclk_delay_en = true,
|
|
+ .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
|
|
+ .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
|
|
};
|
|
|
|
-static struct spi_board_info db120_spi_info[] = {
|
|
- {
|
|
- .bus_num = 0,
|
|
- .chip_select = 0,
|
|
- .max_speed_hz = 25000000,
|
|
- .modalias = "s25sl064a",
|
|
- .controller_data = &db120_spi0_data,
|
|
- }
|
|
+static struct ar8327_led_cfg db120_ar8327_led_cfg = {
|
|
+ .led_ctrl0 = 0x00000000,
|
|
+ .led_ctrl1 = 0xc737c737,
|
|
+ .led_ctrl2 = 0x00000000,
|
|
+ .led_ctrl3 = 0x00c30c00,
|
|
+ .open_drain = true,
|
|
};
|
|
|
|
-static struct ath79_spi_platform_data db120_spi_data = {
|
|
- .bus_num = 0,
|
|
- .num_chipselect = 1,
|
|
+static struct ar8327_platform_data db120_ar8327_data = {
|
|
+ .pad0_cfg = &db120_ar8327_pad0_cfg,
|
|
+ .port0_cfg = {
|
|
+ .force_link = 1,
|
|
+ .speed = AR8327_PORT_SPEED_1000,
|
|
+ .duplex = 1,
|
|
+ .txpause = 1,
|
|
+ .rxpause = 1,
|
|
+ },
|
|
+ .led_cfg = &db120_ar8327_led_cfg,
|
|
};
|
|
|
|
-#ifdef CONFIG_PCI
|
|
-static struct ath9k_platform_data db120_ath9k_data;
|
|
-
|
|
-static int db120_pci_plat_dev_init(struct pci_dev *dev)
|
|
-{
|
|
- switch (PCI_SLOT(dev->devfn)) {
|
|
- case 0:
|
|
- dev->dev.platform_data = &db120_ath9k_data;
|
|
- break;
|
|
- }
|
|
-
|
|
- return 0;
|
|
-}
|
|
-
|
|
-static void __init db120_pci_init(u8 *eeprom)
|
|
-{
|
|
- memcpy(db120_ath9k_data.eeprom_data, eeprom,
|
|
- sizeof(db120_ath9k_data.eeprom_data));
|
|
-
|
|
- ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init);
|
|
- ath79_register_pci();
|
|
-}
|
|
-#else
|
|
-static inline void db120_pci_init(void) {}
|
|
-#endif /* CONFIG_PCI */
|
|
+static struct mdio_board_info db120_mdio0_info[] = {
|
|
+ {
|
|
+ .bus_id = "ag71xx-mdio.0",
|
|
+ .phy_addr = 0,
|
|
+ .platform_data = &db120_ar8327_data,
|
|
+ },
|
|
+};
|
|
|
|
static void __init db120_setup(void)
|
|
{
|
|
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
|
|
|
|
+ ath79_gpio_output_select(DB120_GPIO_LED_USB, AR934X_GPIO_OUT_GPIO);
|
|
+ ath79_register_m25p80(NULL);
|
|
+
|
|
ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio),
|
|
db120_leds_gpio);
|
|
ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL,
|
|
ARRAY_SIZE(db120_gpio_keys),
|
|
db120_gpio_keys);
|
|
- ath79_register_spi(&db120_spi_data, db120_spi_info,
|
|
- ARRAY_SIZE(db120_spi_info));
|
|
ath79_register_usb();
|
|
ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET, NULL);
|
|
- db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);
|
|
+ ap91_pci_init(art + DB120_PCIE_CALDATA_OFFSET, NULL);
|
|
+
|
|
+ ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
|
|
+ AR934X_ETH_CFG_SW_ONLY_MODE);
|
|
+
|
|
+ ath79_register_mdio(1, 0x0);
|
|
+ ath79_register_mdio(0, 0x0);
|
|
+
|
|
+ ath79_init_mac(ath79_eth0_data.mac_addr, art + DB120_MAC0_OFFSET, 0);
|
|
+
|
|
+ mdiobus_register_board_info(db120_mdio0_info,
|
|
+ ARRAY_SIZE(db120_mdio0_info));
|
|
+
|
|
+ /* GMAC0 is connected to an AR8327 switch */
|
|
+ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
|
|
+ ath79_eth0_data.phy_mask = BIT(0);
|
|
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
|
|
+ ath79_eth0_pll_data.pll_1000 = 0x06000000;
|
|
+ ath79_register_eth(0);
|
|
+
|
|
+ /* GMAC1 is connected to the internal switch */
|
|
+ ath79_init_mac(ath79_eth1_data.mac_addr, art + DB120_MAC1_OFFSET, 0);
|
|
+ ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
|
|
+ ath79_eth1_data.speed = SPEED_1000;
|
|
+ ath79_eth1_data.duplex = DUPLEX_FULL;
|
|
+
|
|
+ ath79_register_eth(1);
|
|
+
|
|
+ ath79_register_nfc();
|
|
}
|
|
|
|
MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board",
|
|
--- a/arch/mips/ath79/Kconfig
|
|
+++ b/arch/mips/ath79/Kconfig
|
|
@@ -43,9 +43,12 @@ config ATH79_MACH_AP81
|
|
config ATH79_MACH_DB120
|
|
bool "Atheros DB120 reference board"
|
|
select SOC_AR934X
|
|
+ select ATH79_DEV_AP9X_PCI if PCI
|
|
+ select ATH79_DEV_ETH
|
|
select ATH79_DEV_GPIO_BUTTONS
|
|
select ATH79_DEV_LEDS_GPIO
|
|
- select ATH79_DEV_SPI
|
|
+ select ATH79_DEV_M25P80
|
|
+ select ATH79_DEV_NFC
|
|
select ATH79_DEV_USB
|
|
select ATH79_DEV_WMAC
|
|
help
|