mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-14 06:15:21 +02:00
e6b6adc799
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10490 3c298f89-4303-0410-b956-a3cf2f4a3e73
49 lines
2.2 KiB
Diff
49 lines
2.2 KiB
Diff
Index: linux-2.6.23.16/drivers/ssb/driver_chipcommon.c
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===================================================================
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--- linux-2.6.23.16.orig/drivers/ssb/driver_chipcommon.c 2008-02-19 00:42:42.000000000 +0100
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+++ linux-2.6.23.16/drivers/ssb/driver_chipcommon.c 2008-02-19 00:43:34.000000000 +0100
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@@ -268,6 +268,8 @@ void ssb_chipco_resume(struct ssb_chipco
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void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
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u32 *plltype, u32 *n, u32 *m)
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{
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+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354)
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+ return;
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*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
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*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
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switch (*plltype) {
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@@ -291,6 +293,8 @@ void ssb_chipco_get_clockcpu(struct ssb_
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void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
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u32 *plltype, u32 *n, u32 *m)
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{
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+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354)
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+ return;
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*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
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*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
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switch (*plltype) {
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Index: linux-2.6.23.16/drivers/ssb/driver_mipscore.c
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===================================================================
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--- linux-2.6.23.16.orig/drivers/ssb/driver_mipscore.c 2008-02-19 00:42:42.000000000 +0100
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+++ linux-2.6.23.16/drivers/ssb/driver_mipscore.c 2008-02-19 00:43:34.000000000 +0100
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@@ -160,6 +160,8 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m
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if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) {
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rate = 200000000;
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+ } else if (bus->chip_id == 0x5354) {
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+ rate = 240000000;
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} else {
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rate = ssb_calc_clock_rate(pll_type, n, m);
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}
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Index: linux-2.6.23.16/drivers/ssb/main.c
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===================================================================
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--- linux-2.6.23.16.orig/drivers/ssb/main.c 2008-02-19 00:42:15.000000000 +0100
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+++ linux-2.6.23.16/drivers/ssb/main.c 2008-02-19 00:43:34.000000000 +0100
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@@ -860,6 +860,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus)
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if (bus->chip_id == 0x5365) {
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rate = 100000000;
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+ } else if (bus->chip_id == 0x5354) {
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+ rate = 120000000;
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} else {
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rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
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if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */
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