1
0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-11-18 08:25:57 +02:00
openwrt-xburst/target/linux/etrax/patches-2.6.32/201-flashsize.patch
claudio 18a1d11eb0 etrax: 2.6.32 support
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19543 3c298f89-4303-0410-b956-a3cf2f4a3e73
2010-02-07 12:38:25 +00:00

89 lines
3.0 KiB
Diff

--- a/arch/cris/arch-v10/drivers/axisflashmap.c
+++ b/arch/cris/arch-v10/drivers/axisflashmap.c
@@ -113,7 +113,7 @@ static struct map_info map_cse1 = {
/* If no partition-table was found, we use this default-set. */
#define MAX_PARTITIONS 7
-#define NUM_DEFAULT_PARTITIONS 3
+#define NUM_DEFAULT_PARTITIONS 2
/*
* Default flash size is 2MB. CONFIG_ETRAX_PTABLE_SECTOR is most likely the
@@ -122,19 +122,14 @@ static struct map_info map_cse1 = {
*/
static struct mtd_partition axis_default_partitions[NUM_DEFAULT_PARTITIONS] = {
{
- .name = "boot firmware",
- .size = CONFIG_ETRAX_PTABLE_SECTOR,
- .offset = 0
- },
- {
.name = "kernel",
- .size = 0x200000 - (6 * CONFIG_ETRAX_PTABLE_SECTOR),
- .offset = CONFIG_ETRAX_PTABLE_SECTOR
+ .size = 0x00,
+ .offset = 0
},
{
- .name = "filesystem",
- .size = 5 * CONFIG_ETRAX_PTABLE_SECTOR,
- .offset = 0x200000 - (5 * CONFIG_ETRAX_PTABLE_SECTOR)
+ .name = "rootfs",
+ .size = 0x200000,
+ .offset = 0x200000
}
};
@@ -281,6 +276,11 @@ static int __init init_axis_flash(void)
struct partitiontable_entry *ptable;
int use_default_ptable = 1; /* Until proven otherwise. */
const char pmsg[] = " /dev/flash%d at 0x%08x, size 0x%08x\n";
+ unsigned int kernel_part_size = 0;
+ unsigned char *flash_mem = (unsigned char*)(FLASH_CACHED_ADDR);
+ unsigned int flash_scan_count = 0;
+ const char *part_magic = "ACME_PART_MAGIC";
+ unsigned int magic_len = strlen(part_magic);
if (!(mymtd = flash_probe())) {
/* There's no reason to use this module if no flash chip can
@@ -293,6 +293,31 @@ static int __init init_axis_flash(void)
axisflash_mtd = mymtd;
}
+ /* scan flash to findout where out partition starts */
+
+ printk(KERN_INFO "Scanning flash for end of kernel magic\n");
+ for(flash_scan_count = 0; flash_scan_count < 100000; flash_scan_count++) {
+ if(strncmp(&flash_mem[flash_scan_count], part_magic, magic_len - 1) == 0) {
+ kernel_part_size = flash_mem[flash_scan_count + magic_len ];
+ kernel_part_size <<= 8;
+ kernel_part_size += flash_mem[flash_scan_count + magic_len + 2];
+ kernel_part_size <<= 8;
+ kernel_part_size += flash_mem[flash_scan_count + magic_len + 1];
+ kernel_part_size <<= 8;
+ kernel_part_size += flash_mem[flash_scan_count + magic_len + 3];
+ printk(KERN_INFO "Kernel ends at 0x%.08X\n", kernel_part_size);
+ flash_scan_count = 1100000;
+ }
+ }
+
+
+ if(kernel_part_size){
+ kernel_part_size = (kernel_part_size & 0xffff0000);
+ axis_default_partitions[0].size = kernel_part_size;
+ axis_default_partitions[1].size = mymtd->size - axis_default_partitions[0].size;
+ axis_default_partitions[1].offset = axis_default_partitions[0].size;
+ }
+
if (mymtd) {
mymtd->owner = THIS_MODULE;
ptable_head = (struct partitiontable_head *)(FLASH_CACHED_ADDR +
--- a/arch/cris/arch-v10/lib/hw_settings.S
+++ b/arch/cris/arch-v10/lib/hw_settings.S
@@ -60,3 +60,5 @@
.dword R_PORT_PB_SET
.dword PB_SET_VALUE
.dword 0 ; No more register values
+ .ascii "ACME_PART_MAGIC"
+ .dword 0xdeadc0de