mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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c3831d0284
Conditionally apply ldd and ldconfig support on at91 platform git-svn-id: svn://svn.openwrt.org/openwrt/trunk@6862 3c298f89-4303-0410-b956-a3cf2f4a3e73
1823 lines
67 KiB
Diff
1823 lines
67 KiB
Diff
diff -urN romboot.old/asm_mci_isr.S romboot/asm_mci_isr.S
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--- romboot.old/asm_mci_isr.S 1970-01-01 01:00:00.000000000 +0100
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+++ romboot/asm_mci_isr.S 2007-03-22 18:52:05.000000000 +0100
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@@ -0,0 +1,75 @@
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+#include <AT91RM9200_inc.h>
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+
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+#define ARM_MODE_USER 0x10
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+#define ARM_MODE_FIQ 0x11
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+#define ARM_MODE_IRQ 0x12
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+#define ARM_MODE_SVC 0x13
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+#define ARM_MODE_ABORT 0x17
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+#define ARM_MODE_UNDEF 0x1B
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+#define ARM_MODE_SYS 0x1F
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+
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+#define I_BIT 0x80
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+#define F_BIT 0x40
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+#define T_BIT 0x20
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+
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+
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+/* -----------------------------------------------------------------------------
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+ AT91F_ASM_MCI_Handler
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+ ---------------------
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+ Handler called by the AIC
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+
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+ Save context
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+ Call C handler
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+ Restore context
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+ ----------------------------------------------------------------------------- */
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+
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+.global AT91F_ASM_MCI_Handler
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+
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+AT91F_ASM_MCI_Handler:
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+/* Adjust and save LR_irq in IRQ stack */
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+ sub r14, r14, #4
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+ stmfd sp!, {r14}
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+
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+/* Write in the IVR to support Protect Mode
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+ No effect in Normal Mode
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+ De-assert the NIRQ and clear the source in Protect Mode */
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+ ldr r14, =AT91C_BASE_AIC
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+ str r14, [r14, #AIC_IVR]
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+
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+/* Save SPSR and r0 in IRQ stack */
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+ mrs r14, SPSR
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+ stmfd sp!, {r0, r14}
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+
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+/* Enable Interrupt and Switch in SYS Mode */
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+ mrs r0, CPSR
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+ bic r0, r0, #I_BIT
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+ orr r0, r0, #ARM_MODE_SYS
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+ msr CPSR_c, r0
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+
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+/* Save scratch/used registers and LR in User Stack */
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+ stmfd sp!, { r1-r3, r12, r14}
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+
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+ ldr r1, =AT91F_MCI_Handler
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+ mov r14, pc
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+ bx r1
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+
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+/* Restore scratch/used registers and LR from User Stack */
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+ ldmia sp!, { r1-r3, r12, r14}
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+
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+/* Disable Interrupt and switch back in IRQ mode */
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+ mrs r0, CPSR
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+ bic r0, r0, #ARM_MODE_SYS
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+ orr r0, r0, #I_BIT | ARM_MODE_IRQ
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+ msr CPSR_c, r0
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+
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+/* Mark the End of Interrupt on the AIC */
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+ ldr r0, =AT91C_BASE_AIC
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+ str r0, [r0, #AIC_EOICR]
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+
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+/* Restore SPSR_irq and r0 from IRQ stack */
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+ ldmia sp!, {r0, r14}
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+ msr SPSR_cxsf, r14
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+
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+/* Restore adjusted LR_irq from IRQ stack directly in the PC */
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+ ldmia sp!, {pc}^
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+
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diff -urN romboot.old/compile romboot/compile
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--- romboot.old/compile 2004-08-04 18:24:24.000000000 +0200
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+++ romboot/compile 1970-01-01 01:00:00.000000000 +0100
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@@ -1,35 +0,0 @@
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-#!/bin/sh
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-
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-OUTPUT=romboot
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-
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-CROSS=/space/arm/buildroot/build_arm_nofpu/staging_dir/bin/arm-linux-
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-#CROSS=/opt/cross/bin/arm-linux-
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-#GCC="$CROSS"gcc
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-GCC="$CROSS"gcc-msoft-float
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-LD="$CROSS"ld
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-OBJCOPY="$CROSS"objcopy
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-SIZE="$CROSS"size
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-OBJDUMP="$CROSS"objdump
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-
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-LDFLAGS="-T elf32-littlearm.lds -Ttext 0"
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-
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-$GCC asm_isr.S -c -Iinclude
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-$GCC cstartup_ram.S -c -Iinclude
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-$GCC jump.S -c -Iinclude
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-$GCC at45.cpp -c -Iinclude -Os
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-$GCC com.cpp -c -Iinclude -Os
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-$GCC dataflash.cpp -c -Iinclude -Os
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-$GCC init.cpp -c -Iinclude -Os
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-$GCC main.cpp -c -Iinclude -Os
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-$GCC -c stdio.cpp -Os
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-$GCC -c _udivsi3.S
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-$GCC -c _umodsi3.S
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-$GCC -c div0.c -Os
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-
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-$LD cstartup_ram.o asm_isr.o jump.o at45.o com.o dataflash.o init.o main.o stdio.o _udivsi3.o _umodsi3.o div0.o -o $OUTPUT.out $LDFLAGS -n
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-
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-$OBJCOPY $OUTPUT.out -O binary $OUTPUT.bin
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-
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-$OBJDUMP -h -s $OUTPUT.out > $OUTPUT.lss
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-
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-$SIZE $OUTPUT.out
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diff -urN romboot.old/include/AT91C_MCI_Device.h romboot/include/AT91C_MCI_Device.h
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--- romboot.old/include/AT91C_MCI_Device.h 1970-01-01 01:00:00.000000000 +0100
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+++ romboot/include/AT91C_MCI_Device.h 2007-03-22 18:53:51.000000000 +0100
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@@ -0,0 +1,379 @@
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+//*---------------------------------------------------------------------------
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+//* ATMEL Microcontroller Software Support - ROUSSET -
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+//*---------------------------------------------------------------------------
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+//* The software is delivered "AS IS" without warranty or condition of any
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+//* kind, either express, implied or statutory. This includes without
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+//* limitation any warranty or condition with respect to merchantability or
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+//* fitness for any particular purpose, or against the infringements of
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+//* intellectual property rights of others.
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+//*---------------------------------------------------------------------------
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+//* File Name : AT91C_MCI_Device.h
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+//* Object : Data Flash Atmel Description File
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+//* Translator :
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+//*
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+//* 1.0 26/11/02 FB : Creation
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+//*---------------------------------------------------------------------------
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+
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+#ifndef AT91C_MCI_Device_h
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+#define AT91C_MCI_Device_h
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+
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+#include "AT91RM9200.h"
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+#include "lib_AT91RM9200.h"
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+
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+typedef unsigned int AT91S_MCIDeviceStatus;
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+
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+/////////////////////////////////////////////////////////////////////////////////////////////////////
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+
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+#define AT91C_CARD_REMOVED 0
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+#define AT91C_MMC_CARD_INSERTED 1
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+#define AT91C_SD_CARD_INSERTED 2
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+
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+#define AT91C_NO_ARGUMENT 0x0
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+
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+#define AT91C_FIRST_RCA 0xCAFE
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+#define AT91C_MAX_MCI_CARDS 10
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+
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+#define AT91C_BUS_WIDTH_1BIT 0x00
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+#define AT91C_BUS_WIDTH_4BITS 0x02
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+
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+/* Driver State */
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+#define AT91C_MCI_IDLE 0x0
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+#define AT91C_MCI_TIMEOUT_ERROR 0x1
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+#define AT91C_MCI_RX_SINGLE_BLOCK 0x2
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+#define AT91C_MCI_RX_MULTIPLE_BLOCK 0x3
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+#define AT91C_MCI_RX_STREAM 0x4
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+#define AT91C_MCI_TX_SINGLE_BLOCK 0x5
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+#define AT91C_MCI_TX_MULTIPLE_BLOCK 0x6
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+#define AT91C_MCI_TX_STREAM 0x7
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+
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+/* TimeOut */
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+#define AT91C_TIMEOUT_CMDRDY 30
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+
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+/////////////////////////////////////////////////////////////////////////////////////////////////////
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+// MMC & SDCard Structures
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+/////////////////////////////////////////////////////////////////////////////////////////////////////
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+
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+/*-----------------------------------------------*/
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+/* SDCard Device Descriptor Structure Definition */
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+/*-----------------------------------------------*/
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+typedef struct _AT91S_MciDeviceDesc
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+{
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+ volatile unsigned char state;
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+ unsigned char SDCard_bus_width;
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+
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+} AT91S_MciDeviceDesc, *AT91PS_MciDeviceDesc;
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+
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+/*---------------------------------------------*/
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+/* MMC & SDCard Structure Device Features */
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+/*---------------------------------------------*/
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+typedef struct _AT91S_MciDeviceFeatures
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+{
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+ unsigned char Card_Inserted; // (0=AT91C_CARD_REMOVED) (1=AT91C_MMC_CARD_INSERTED) (2=AT91C_SD_CARD_INSERTED)
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+ unsigned int Relative_Card_Address; // RCA
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+ unsigned int Max_Read_DataBlock_Length; // 2^(READ_BL_LEN) in CSD
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+ unsigned int Max_Write_DataBlock_Length; // 2^(WRITE_BL_LEN) in CSD
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+ unsigned char Read_Partial; // READ_BL_PARTIAL
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+ unsigned char Write_Partial; // WRITE_BL_PARTIAL
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+ unsigned char Erase_Block_Enable; // ERASE_BLK_EN
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+ unsigned char Read_Block_Misalignment; // READ_BLK_MISALIGN
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+ unsigned char Write_Block_Misalignment; // WRITE_BLK_MISALIGN
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+ unsigned char Sector_Size; // SECTOR_SIZE
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+ unsigned int Memory_Capacity; // Size in bits of the device
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+
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+} AT91S_MciDeviceFeatures, *AT91PS_MciDeviceFeatures ;
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+
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+/*---------------------------------------------*/
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+/* MCI Device Structure Definition */
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+/*---------------------------------------------*/
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+typedef struct _AT91S_MciDevice
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+{
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+ AT91PS_MciDeviceDesc pMCI_DeviceDesc; // MCI device descriptor
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+ AT91PS_MciDeviceFeatures pMCI_DeviceFeatures;// Pointer on a MCI device features array
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+}AT91S_MciDevice, *AT91PS_MciDevice;
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+
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+/////////////////////////////////////////////////////////////////////////////////////////////////////
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+// MCI_CMD Register Value
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+/////////////////////////////////////////////////////////////////////////////////////////////////////
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+#define AT91C_POWER_ON_INIT (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_INIT | AT91C_MCI_OPDCMD)
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+
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+/////////////////////////////////////////////////////////////////
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+// Class 0 & 1 commands: Basic commands and Read Stream commands
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+/////////////////////////////////////////////////////////////////
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+
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+#define AT91C_GO_IDLE_STATE_CMD (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE )
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+#define AT91C_MMC_GO_IDLE_STATE_CMD (0 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_OPDCMD)
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+#define AT91C_MMC_SEND_OP_COND_CMD (1 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_OPDCMD)
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+#define AT91C_ALL_SEND_CID_CMD (2 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 )
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+#define AT91C_MMC_ALL_SEND_CID_CMD (2 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_OPDCMD)
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+#define AT91C_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
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+#define AT91C_MMC_SET_RELATIVE_ADDR_CMD (3 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT | AT91C_MCI_OPDCMD)
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+
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+#define AT91C_SET_DSR_CMD (4 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_NO | AT91C_MCI_MAXLAT ) // no tested
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+
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+#define AT91C_SEL_DESEL_CARD_CMD (7 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
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+#define AT91C_SEND_CSD_CMD (9 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_MAXLAT )
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+#define AT91C_SEND_CID_CMD (10 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_136 | AT91C_MCI_MAXLAT )
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+#define AT91C_MMC_READ_DAT_UNTIL_STOP_CMD (11 | AT91C_MCI_TRTYP_STREAM| AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRDIR | AT91C_MCI_TRCMD_START | AT91C_MCI_MAXLAT )
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+
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+#define AT91C_STOP_TRANSMISSION_CMD (12 | AT91C_MCI_TRCMD_STOP | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
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+#define AT91C_STOP_TRANSMISSION_SYNC_CMD (12 | AT91C_MCI_TRCMD_STOP | AT91C_MCI_SPCMD_SYNC | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
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+#define AT91C_SEND_STATUS_CMD (13 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
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+#define AT91C_GO_INACTIVE_STATE_CMD (15 | AT91C_MCI_RSPTYP_NO )
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+
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+//*------------------------------------------------
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+//* Class 2 commands: Block oriented Read commands
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+//*------------------------------------------------
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+
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+#define AT91C_SET_BLOCKLEN_CMD (16 | AT91C_MCI_TRCMD_NO | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT )
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+#define AT91C_READ_SINGLE_BLOCK_CMD (17 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | AT91C_MCI_TRTYP_BLOCK | AT91C_MCI_TRDIR | AT91C_MCI_MAXLAT)
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+#define AT91C_READ_MULTIPLE_BLOCK_CMD (18 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | AT91C_MCI_TRTYP_MULTIPLE | AT91C_MCI_TRDIR | AT91C_MCI_MAXLAT)
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+
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+//*--------------------------------------------
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+//* Class 3 commands: Sequential write commands
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+//*--------------------------------------------
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+
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+#define AT91C_MMC_WRITE_DAT_UNTIL_STOP_CMD (20 | AT91C_MCI_TRTYP_STREAM| AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 & ~(AT91C_MCI_TRDIR) | AT91C_MCI_TRCMD_START | AT91C_MCI_MAXLAT ) // MMC
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+
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+//*------------------------------------------------
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+//* Class 4 commands: Block oriented write commands
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+//*------------------------------------------------
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+
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+#define AT91C_WRITE_BLOCK_CMD (24 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | (AT91C_MCI_TRTYP_BLOCK & ~(AT91C_MCI_TRDIR)) | AT91C_MCI_MAXLAT)
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+#define AT91C_WRITE_MULTIPLE_BLOCK_CMD (25 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_START | (AT91C_MCI_TRTYP_MULTIPLE & ~(AT91C_MCI_TRDIR)) | AT91C_MCI_MAXLAT)
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+#define AT91C_PROGRAM_CSD_CMD (27 | AT91C_MCI_RSPTYP_48 )
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+
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+
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+//*----------------------------------------
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+//* Class 6 commands: Group Write protect
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+//*----------------------------------------
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+
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+#define AT91C_SET_WRITE_PROT_CMD (28 | AT91C_MCI_RSPTYP_48 )
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+#define AT91C_CLR_WRITE_PROT_CMD (29 | AT91C_MCI_RSPTYP_48 )
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+#define AT91C_SEND_WRITE_PROT_CMD (30 | AT91C_MCI_RSPTYP_48 )
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+
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+
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+//*----------------------------------------
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+//* Class 5 commands: Erase commands
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+//*----------------------------------------
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+
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+#define AT91C_TAG_SECTOR_START_CMD (32 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
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+#define AT91C_TAG_SECTOR_END_CMD (33 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
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+#define AT91C_MMC_UNTAG_SECTOR_CMD (34 | AT91C_MCI_RSPTYP_48 )
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+#define AT91C_MMC_TAG_ERASE_GROUP_START_CMD (35 | AT91C_MCI_RSPTYP_48 )
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+#define AT91C_MMC_TAG_ERASE_GROUP_END_CMD (36 | AT91C_MCI_RSPTYP_48 )
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+#define AT91C_MMC_UNTAG_ERASE_GROUP_CMD (37 | AT91C_MCI_RSPTYP_48 )
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+#define AT91C_ERASE_CMD (38 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT )
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+
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+//*----------------------------------------
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+//* Class 7 commands: Lock commands
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+//*----------------------------------------
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+
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+#define AT91C_LOCK_UNLOCK (42 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) // no tested
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+
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+//*-----------------------------------------------
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+// Class 8 commands: Application specific commands
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+//*-----------------------------------------------
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+
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+#define AT91C_APP_CMD (55 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
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+#define AT91C_GEN_CMD (56 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT) // no tested
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+
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+#define AT91C_SDCARD_SET_BUS_WIDTH_CMD (6 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
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+#define AT91C_SDCARD_STATUS_CMD (13 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
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+#define AT91C_SDCARD_SEND_NUM_WR_BLOCKS_CMD (22 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
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+#define AT91C_SDCARD_SET_WR_BLK_ERASE_COUNT_CMD (23 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
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+#define AT91C_SDCARD_APP_OP_COND_CMD (41 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO )
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+#define AT91C_SDCARD_SET_CLR_CARD_DETECT_CMD (42 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
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+#define AT91C_SDCARD_SEND_SCR_CMD (51 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
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+
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+#define AT91C_SDCARD_APP_ALL_CMD (AT91C_SDCARD_SET_BUS_WIDTH_CMD +\
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+ AT91C_SDCARD_STATUS_CMD +\
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+ AT91C_SDCARD_SEND_NUM_WR_BLOCKS_CMD +\
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+ AT91C_SDCARD_SET_WR_BLK_ERASE_COUNT_CMD +\
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+ AT91C_SDCARD_APP_OP_COND_CMD +\
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+ AT91C_SDCARD_SET_CLR_CARD_DETECT_CMD +\
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+ AT91C_SDCARD_SEND_SCR_CMD)
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+
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+//*----------------------------------------
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+//* Class 9 commands: IO Mode commands
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+//*----------------------------------------
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+
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|
+#define AT91C_MMC_FAST_IO_CMD (39 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_MAXLAT)
|
|
+#define AT91C_MMC_GO_IRQ_STATE_CMD (40 | AT91C_MCI_SPCMD_NONE | AT91C_MCI_RSPTYP_48 | AT91C_MCI_TRCMD_NO | AT91C_MCI_MAXLAT)
|
|
+
|
|
+/////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
+// Functions returnals
|
|
+/////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
+#define AT91C_CMD_SEND_OK 0 // Command ok
|
|
+#define AT91C_CMD_SEND_ERROR -1 // Command failed
|
|
+#define AT91C_INIT_OK 2 // Init Successfull
|
|
+#define AT91C_INIT_ERROR 3 // Init Failed
|
|
+#define AT91C_READ_OK 4 // Read Successfull
|
|
+#define AT91C_READ_ERROR 5 // Read Failed
|
|
+#define AT91C_WRITE_OK 6 // Write Successfull
|
|
+#define AT91C_WRITE_ERROR 7 // Write Failed
|
|
+#define AT91C_ERASE_OK 8 // Erase Successfull
|
|
+#define AT91C_ERASE_ERROR 9 // Erase Failed
|
|
+#define AT91C_CARD_SELECTED_OK 10 // Card Selection Successfull
|
|
+#define AT91C_CARD_SELECTED_ERROR 11 // Card Selection Failed
|
|
+
|
|
+/////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
+// MCI_SR Errors
|
|
+/////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
+#define AT91C_MCI_SR_ERROR (AT91C_MCI_UNRE |\
|
|
+ AT91C_MCI_OVRE |\
|
|
+ AT91C_MCI_DTOE |\
|
|
+ AT91C_MCI_DCRCE |\
|
|
+ AT91C_MCI_RTOE |\
|
|
+ AT91C_MCI_RENDE |\
|
|
+ AT91C_MCI_RCRCE |\
|
|
+ AT91C_MCI_RDIRE |\
|
|
+ AT91C_MCI_RINDE)
|
|
+
|
|
+////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
+// OCR Register
|
|
+////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
+#define AT91C_VDD_16_17 (1 << 4)
|
|
+#define AT91C_VDD_17_18 (1 << 5)
|
|
+#define AT91C_VDD_18_19 (1 << 6)
|
|
+#define AT91C_VDD_19_20 (1 << 7)
|
|
+#define AT91C_VDD_20_21 (1 << 8)
|
|
+#define AT91C_VDD_21_22 (1 << 9)
|
|
+#define AT91C_VDD_22_23 (1 << 10)
|
|
+#define AT91C_VDD_23_24 (1 << 11)
|
|
+#define AT91C_VDD_24_25 (1 << 12)
|
|
+#define AT91C_VDD_25_26 (1 << 13)
|
|
+#define AT91C_VDD_26_27 (1 << 14)
|
|
+#define AT91C_VDD_27_28 (1 << 15)
|
|
+#define AT91C_VDD_28_29 (1 << 16)
|
|
+#define AT91C_VDD_29_30 (1 << 17)
|
|
+#define AT91C_VDD_30_31 (1 << 18)
|
|
+#define AT91C_VDD_31_32 (1 << 19)
|
|
+#define AT91C_VDD_32_33 (1 << 20)
|
|
+#define AT91C_VDD_33_34 (1 << 21)
|
|
+#define AT91C_VDD_34_35 (1 << 22)
|
|
+#define AT91C_VDD_35_36 (1 << 23)
|
|
+#define AT91C_CARD_POWER_UP_BUSY (1 << 31)
|
|
+
|
|
+#define AT91C_MMC_HOST_VOLTAGE_RANGE (AT91C_VDD_27_28 +\
|
|
+ AT91C_VDD_28_29 +\
|
|
+ AT91C_VDD_29_30 +\
|
|
+ AT91C_VDD_30_31 +\
|
|
+ AT91C_VDD_31_32 +\
|
|
+ AT91C_VDD_32_33)
|
|
+
|
|
+////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
+// CURRENT_STATE & READY_FOR_DATA in SDCard Status Register definition (response type R1)
|
|
+////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
+#define AT91C_SR_READY_FOR_DATA (1 << 8) // corresponds to buffer empty signalling on the bus
|
|
+#define AT91C_SR_IDLE (0 << 9)
|
|
+#define AT91C_SR_READY (1 << 9)
|
|
+#define AT91C_SR_IDENT (2 << 9)
|
|
+#define AT91C_SR_STBY (3 << 9)
|
|
+#define AT91C_SR_TRAN (4 << 9)
|
|
+#define AT91C_SR_DATA (5 << 9)
|
|
+#define AT91C_SR_RCV (6 << 9)
|
|
+#define AT91C_SR_PRG (7 << 9)
|
|
+#define AT91C_SR_DIS (8 << 9)
|
|
+
|
|
+#define AT91C_SR_CARD_SELECTED (AT91C_SR_READY_FOR_DATA + AT91C_SR_TRAN)
|
|
+
|
|
+/////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
+// MMC CSD register header File
|
|
+// AT91C_CSD_xxx_S for shift value
|
|
+// AT91C_CSD_xxx_M for mask value
|
|
+/////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
+
|
|
+// First Response INT <=> CSD[3] : bits 0 to 31
|
|
+#define AT91C_CSD_BIT0_S 0 // [0:0]
|
|
+#define AT91C_CSD_BIT0_M 0x01
|
|
+#define AT91C_CSD_CRC_S 1 // [7:1]
|
|
+#define AT91C_CSD_CRC_M 0x7F
|
|
+#define AT91C_CSD_MMC_ECC_S 8 // [9:8] reserved for MMC compatibility
|
|
+#define AT91C_CSD_MMC_ECC_M 0x03
|
|
+#define AT91C_CSD_FILE_FMT_S 10 // [11:10]
|
|
+#define AT91C_CSD_FILE_FMT_M 0x03
|
|
+#define AT91C_CSD_TMP_WP_S 12 // [12:12]
|
|
+#define AT91C_CSD_TMP_WP_M 0x01
|
|
+#define AT91C_CSD_PERM_WP_S 13 // [13:13]
|
|
+#define AT91C_CSD_PERM_WP_M 0x01
|
|
+#define AT91C_CSD_COPY_S 14 // [14:14]
|
|
+#define AT91C_CSD_COPY_M 0x01
|
|
+#define AT91C_CSD_FILE_FMT_GRP_S 15 // [15:15]
|
|
+#define AT91C_CSD_FILE_FMT_GRP_M 0x01
|
|
+// reserved 16 // [20:16]
|
|
+// reserved 0x1F
|
|
+#define AT91C_CSD_WBLOCK_P_S 21 // [21:21]
|
|
+#define AT91C_CSD_WBLOCK_P_M 0x01
|
|
+#define AT91C_CSD_WBLEN_S 22 // [25:22]
|
|
+#define AT91C_CSD_WBLEN_M 0x0F
|
|
+#define AT91C_CSD_R2W_F_S 26 // [28:26]
|
|
+#define AT91C_CSD_R2W_F_M 0x07
|
|
+#define AT91C_CSD_MMC_DEF_ECC_S 29 // [30:29] reserved for MMC compatibility
|
|
+#define AT91C_CSD_MMC_DEF_ECC_M 0x03
|
|
+#define AT91C_CSD_WP_GRP_EN_S 31 // [31:31]
|
|
+#define AT91C_CSD_WP_GRP_EN_M 0x01
|
|
+
|
|
+// Seconde Response INT <=> CSD[2] : bits 32 to 63
|
|
+#define AT91C_CSD_v21_WP_GRP_SIZE_S 0 // [38:32]
|
|
+#define AT91C_CSD_v21_WP_GRP_SIZE_M 0x7F
|
|
+#define AT91C_CSD_v21_SECT_SIZE_S 7 // [45:39]
|
|
+#define AT91C_CSD_v21_SECT_SIZE_M 0x7F
|
|
+#define AT91C_CSD_v21_ER_BLEN_EN_S 14 // [46:46]
|
|
+#define AT91C_CSD_v21_ER_BLEN_EN_M 0x01
|
|
+
|
|
+#define AT91C_CSD_v22_WP_GRP_SIZE_S 0 // [36:32]
|
|
+#define AT91C_CSD_v22_WP_GRP_SIZE_M 0x1F
|
|
+#define AT91C_CSD_v22_ER_GRP_SIZE_S 5 // [41:37]
|
|
+#define AT91C_CSD_v22_ER_GRP_SIZE_M 0x1F
|
|
+#define AT91C_CSD_v22_SECT_SIZE_S 10 // [46:42]
|
|
+#define AT91C_CSD_v22_SECT_SIZE_M 0x1F
|
|
+
|
|
+#define AT91C_CSD_C_SIZE_M_S 15 // [49:47]
|
|
+#define AT91C_CSD_C_SIZE_M_M 0x07
|
|
+#define AT91C_CSD_VDD_WMAX_S 18 // [52:50]
|
|
+#define AT91C_CSD_VDD_WMAX_M 0x07
|
|
+#define AT91C_CSD_VDD_WMIN_S 21 // [55:53]
|
|
+#define AT91C_CSD_VDD_WMIN_M 0x07
|
|
+#define AT91C_CSD_RCUR_MAX_S 24 // [58:56]
|
|
+#define AT91C_CSD_RCUR_MAX_M 0x07
|
|
+#define AT91C_CSD_RCUR_MIN_S 27 // [61:59]
|
|
+#define AT91C_CSD_RCUR_MIN_M 0x07
|
|
+#define AT91C_CSD_CSIZE_L_S 30 // [63:62] <=> 2 LSB of CSIZE
|
|
+#define AT91C_CSD_CSIZE_L_M 0x03
|
|
+
|
|
+// Third Response INT <=> CSD[1] : bits 64 to 95
|
|
+#define AT91C_CSD_CSIZE_H_S 0 // [73:64] <=> 10 MSB of CSIZE
|
|
+#define AT91C_CSD_CSIZE_H_M 0x03FF
|
|
+// reserved 10 // [75:74]
|
|
+// reserved 0x03
|
|
+#define AT91C_CSD_DSR_I_S 12 // [76:76]
|
|
+#define AT91C_CSD_DSR_I_M 0x01
|
|
+#define AT91C_CSD_RD_B_MIS_S 13 // [77:77]
|
|
+#define AT91C_CSD_RD_B_MIS_M 0x01
|
|
+#define AT91C_CSD_WR_B_MIS_S 14 // [78:78]
|
|
+#define AT91C_CSD_WR_B_MIS_M 0x01
|
|
+#define AT91C_CSD_RD_B_PAR_S 15 // [79:79]
|
|
+#define AT91C_CSD_RD_B_PAR_M 0x01
|
|
+#define AT91C_CSD_RD_B_LEN_S 16 // [83:80]
|
|
+#define AT91C_CSD_RD_B_LEN_M 0x0F
|
|
+#define AT91C_CSD_CCC_S 20 // [95:84]
|
|
+#define AT91C_CSD_CCC_M 0x0FFF
|
|
+
|
|
+// Fourth Response INT <=> CSD[0] : bits 96 to 127
|
|
+#define AT91C_CSD_TRANS_SPEED_S 0 // [103:96]
|
|
+#define AT91C_CSD_TRANS_SPEED_M 0xFF
|
|
+#define AT91C_CSD_NSAC_S 8 // [111:104]
|
|
+#define AT91C_CSD_NSAC_M 0xFF
|
|
+#define AT91C_CSD_TAAC_S 16 // [119:112]
|
|
+#define AT91C_CSD_TAAC_M 0xFF
|
|
+// reserved 24 // [121:120]
|
|
+// reserved 0x03
|
|
+#define AT91C_CSD_MMC_SPEC_VERS_S 26 // [125:122] reserved for MMC compatibility
|
|
+#define AT91C_CSD_MMC_SPEC_VERS_M 0x0F
|
|
+#define AT91C_CSD_STRUCT_S 30 // [127:126]
|
|
+#define AT91C_CSD_STRUCT_M 0x03
|
|
+
|
|
+/////////////////////////////////////////////////////////////////////////////////////////////////////
|
|
+
|
|
+#endif
|
|
+
|
|
diff -urN romboot.old/init.cpp romboot/init.cpp
|
|
--- romboot.old/init.cpp 2004-07-06 13:01:55.000000000 +0200
|
|
+++ romboot/init.cpp 2007-03-21 12:43:39.000000000 +0100
|
|
@@ -35,7 +35,7 @@
|
|
//*----------------------------------------------------------------------------
|
|
void AT91F_SpuriousHandler()
|
|
{
|
|
- AT91F_DBGU_Printk("-F- Spurious Interrupt detected\n\r");
|
|
+ AT91F_DBGU_Printk("ISI");
|
|
while (1);
|
|
}
|
|
|
|
@@ -46,7 +46,7 @@
|
|
//*----------------------------------------------------------------------------
|
|
void AT91F_DataAbort()
|
|
{
|
|
- AT91F_DBGU_Printk("-F- Data Abort detected\n\r");
|
|
+ AT91F_DBGU_Printk("IDA");
|
|
while (1);
|
|
}
|
|
|
|
@@ -56,7 +56,7 @@
|
|
//*----------------------------------------------------------------------------
|
|
void AT91F_FetchAbort()
|
|
{
|
|
- AT91F_DBGU_Printk("-F- Prefetch Abort detected\n\r");
|
|
+ AT91F_DBGU_Printk("IPA");
|
|
while (1);
|
|
}
|
|
|
|
@@ -66,7 +66,7 @@
|
|
//*----------------------------------------------------------------------------
|
|
void AT91F_Undef()
|
|
{
|
|
- AT91F_DBGU_Printk("-F- Undef detected\n\r");
|
|
+ AT91F_DBGU_Printk("IUD");
|
|
while (1);
|
|
}
|
|
|
|
@@ -76,7 +76,7 @@
|
|
//*----------------------------------------------------------------------------
|
|
void AT91F_UndefHandler()
|
|
{
|
|
- AT91F_DBGU_Printk("-F- Undef detected\n\r");
|
|
+ AT91F_DBGU_Printk("IUD");
|
|
while (1);
|
|
}
|
|
|
|
diff -urN romboot.old/main.cpp romboot/main.cpp
|
|
--- romboot.old/main.cpp 2007-03-19 12:44:03.000000000 +0100
|
|
+++ romboot/main.cpp 2007-03-21 19:23:41.000000000 +0100
|
|
@@ -33,18 +33,22 @@
|
|
#define DELAY_MAIN_FREQ 1000
|
|
#define DISP_LINE_LEN 16
|
|
|
|
+#define COMPACT 1
|
|
+
|
|
//* prototypes
|
|
extern void AT91F_DBGU_Printk(char *);
|
|
extern "C" void AT91F_ST_ASM_Handler(void);
|
|
extern "C" void Jump(unsigned int addr);
|
|
+extern int mci_main(void);
|
|
|
|
-const char *menu_separ = "*----------------------------------------*\n\r";
|
|
+//const char *menu_separ = "*----------------------------------------*\n\r";
|
|
|
|
const char *menu_dataflash = {
|
|
- "1: Download Dataflash [addr]\n\r"
|
|
- "2: Read Dataflash [addr]\n\r"
|
|
- "3: Start U-BOOT\n\r"
|
|
- "4: Clear bootloader section in Dataflash\n\r"
|
|
+ "1: DL DF [ad]\n\r"
|
|
+ "2: RD DF [ad]\n\r"
|
|
+ "3: CP SD\n\r"
|
|
+ "4: U-BOOT\n\r"
|
|
+ "5: RM BL in DF\n\r"
|
|
};
|
|
|
|
//* Globales variables
|
|
@@ -151,12 +155,12 @@
|
|
//*-----------------------------------------------------------------------------
|
|
void AT91F_DisplayMenu(void)
|
|
{
|
|
- printf("\n\rFDL LOADER %s %s %s\n\r", AT91C_VERSION, __DATE__, __TIME__);
|
|
- printf(menu_separ);
|
|
+ printf("\n\rFDL SD-Card LOADER %s %s %s\n\r", AT91C_VERSION, __DATE__, __TIME__);
|
|
+// printf(menu_separ);
|
|
AT91F_DataflashPrintInfo();
|
|
- printf(menu_separ);
|
|
+// printf(menu_separ);
|
|
printf(menu_dataflash);
|
|
- printf(menu_separ);
|
|
+// printf(menu_separ);
|
|
}
|
|
|
|
//*-----------------------------------------------------------------------------
|
|
@@ -194,6 +198,7 @@
|
|
}
|
|
|
|
|
|
+#ifndef COMPACT
|
|
//*-----------------------------------------------------------------------------
|
|
//* Function Name : AT91F_MemoryDisplay()
|
|
//* Object : Display the content of the dataflash
|
|
@@ -244,7 +249,7 @@
|
|
} while (nbytes > 0);
|
|
return 0;
|
|
}
|
|
-
|
|
+#endif
|
|
|
|
//*--------------------------------------------------------------------------------------
|
|
//* Function Name : AT91F_SetPLL
|
|
@@ -306,7 +311,7 @@
|
|
AT91F_SetPLL();
|
|
}
|
|
|
|
-void LedCode(void)
|
|
+/*void LedCode(void)
|
|
{
|
|
int *pRegister;
|
|
pRegister = (int *)0xFFFFF800; // Enable port C peripheral reg
|
|
@@ -318,15 +323,16 @@
|
|
pRegister = (int *)0xFFFFF834; // Clear bits
|
|
*pRegister = 0x2800;
|
|
}
|
|
+*/
|
|
|
|
void AT91F_StartUboot(unsigned int dummy, void *pvoid)
|
|
{
|
|
- printf("Load U-BOOT from dataflash[%x] to SDRAM[%x]\n\r", AT91C_UBOOT_DATAFLASH_ADDR, AT91C_UBOOT_ADDR);
|
|
+ //printf("Load U-BOOT from dataflash[%x] to SDRAM[%x]\n\r", AT91C_UBOOT_DATAFLASH_ADDR, AT91C_UBOOT_ADDR);
|
|
read_dataflash(AT91C_UBOOT_DATAFLASH_ADDR, AT91C_UBOOT_SIZE, (char *)(AT91C_UBOOT_ADDR));
|
|
- printf("Set PLLA to 180Mhz and Master clock to 60Mhz and start U-BOOT\n\r");
|
|
+ //printf("Set PLLA to 180Mhz and Master clock to 60Mhz and start U-BOOT\n\r");
|
|
//* Reset registers
|
|
AT91F_ResetRegisters();
|
|
- LedCode();
|
|
+// LedCode();
|
|
Jump(AT91C_UBOOT_ADDR);
|
|
while(1);
|
|
}
|
|
@@ -385,120 +391,124 @@
|
|
// start tempo to start Uboot in a delay of 1 sec if no key pressed
|
|
svcUbootTempo.Start(&svcUbootTempo, 1000, 0, AT91F_StartUboot, (void *)0);
|
|
|
|
- printf("press any key to enter bootloader\n\r");
|
|
+ printf("press key\n\r");
|
|
getc();
|
|
|
|
// stop tempo
|
|
svcUbootTempo.Stop(&svcUbootTempo);
|
|
|
|
- while(1)
|
|
- {
|
|
- while(command == 0)
|
|
- {
|
|
- AddressToDownload = AT91C_DOWNLOAD_BASE_ADDRESS;
|
|
- SizeToDownload = AT91C_DOWNLOAD_MAX_SIZE;
|
|
- DeviceAddress = 0;
|
|
+ while(1) {
|
|
+ while(command == 0) {
|
|
+ AddressToDownload = AT91C_DOWNLOAD_BASE_ADDRESS;
|
|
+ SizeToDownload = AT91C_DOWNLOAD_MAX_SIZE;
|
|
+ DeviceAddress = 0;
|
|
|
|
- AT91F_DisplayMenu();
|
|
- message[0] = 0;
|
|
- message[2] = 0;
|
|
- AT91F_ReadLine("Enter: ", message);
|
|
+ AT91F_DisplayMenu();
|
|
+ message[0] = 0;
|
|
+ message[2] = 0;
|
|
+ AT91F_ReadLine("Enter: ", message);
|
|
|
|
- command = message[0];
|
|
- if(command == '1' || command == '2')
|
|
- if(AsciiToHex(&message[2], &DeviceAddress) == 0)
|
|
- command = 0;
|
|
-
|
|
- switch(command)
|
|
- {
|
|
- case '1':
|
|
- printf("Download Dataflash [0x%x]\n\r", DeviceAddress);
|
|
-
|
|
- switch(DeviceAddress & 0xFF000000)
|
|
- {
|
|
- case CFG_DATAFLASH_LOGIC_ADDR_CS0:
|
|
- device = 0;
|
|
- break;
|
|
+ command = message[0];
|
|
+ if(command == '1' || command == '2')
|
|
+ if(AsciiToHex(&message[2], &DeviceAddress) == 0)
|
|
+ command = 0;
|
|
+
|
|
+ switch(command) {
|
|
+ case '1':
|
|
+ printf("DL DF [0x%x]\n\r", DeviceAddress);
|
|
+
|
|
+ switch(DeviceAddress & 0xFF000000) {
|
|
+ case CFG_DATAFLASH_LOGIC_ADDR_CS0:
|
|
+ device = 0;
|
|
+ break;
|
|
|
|
- case CFG_DATAFLASH_LOGIC_ADDR_CS3:
|
|
- device = 1;
|
|
- break;
|
|
+ case CFG_DATAFLASH_LOGIC_ADDR_CS3:
|
|
+ device = 1;
|
|
+ break;
|
|
|
|
- default:
|
|
- command = 0;
|
|
- break;
|
|
- }
|
|
- break;
|
|
-
|
|
- case '2':
|
|
- do
|
|
- {
|
|
- AT91F_MemoryDisplay(DeviceAddress, 4, 64);
|
|
- AT91F_ReadLine ((char *)0, message);
|
|
- DeviceAddress += 0x100;
|
|
+ default:
|
|
+ command = 0;
|
|
+ break;
|
|
+ }
|
|
+ break;
|
|
+
|
|
+#ifndef COMPACT
|
|
+ case '2':
|
|
+ do {
|
|
+ AT91F_MemoryDisplay(DeviceAddress, 4, 64);
|
|
+ AT91F_ReadLine ((char *)0, message);
|
|
+ DeviceAddress += 0x100;
|
|
+ } while(message[0] == '\0');
|
|
+ command = 0;
|
|
+ break;
|
|
+#endif
|
|
+
|
|
+ case '3':
|
|
+ mci_main();
|
|
+ command=0;
|
|
+ break;
|
|
+
|
|
+ case '4':
|
|
+ AT91F_StartUboot(0, (void *)0);
|
|
+ command = 0;
|
|
+ break;
|
|
+
|
|
+ case '5':
|
|
+ {
|
|
+ int *i;
|
|
+
|
|
+ for(i = (int *)0x20000000; i < (int *)0x20004000; i++)
|
|
+ *i = 0;
|
|
+ }
|
|
+ write_dataflash(0xc0000000, 0x20000000, 0x4000);
|
|
+ printf("BL CLR\r\n");
|
|
+ command = 0;
|
|
+ break;
|
|
+
|
|
+ default:
|
|
+ command = 0;
|
|
+ break;
|
|
+ } // switch(command)
|
|
+ } // while(command == 0)
|
|
+
|
|
+ xmodemPipe.Read(&xmodemPipe, (char *)AddressToDownload, SizeToDownload, XmodemProtocol, 0);
|
|
+ while(XmodemComplete !=1);
|
|
+ SizeToDownload = (unsigned int)(svcXmodem.pData) - (unsigned int)AddressToDownload;
|
|
+
|
|
+ // Modification of vector 6
|
|
+ NbPage = 0;
|
|
+ i = dataflash_info[device].Device.pages_number;
|
|
+ while(i >>= 1)
|
|
+ NbPage++;
|
|
+ i = (SizeToDownload / 512) + 1 + (NbPage << 13) + (dataflash_info[device].Device.pages_size << 17);
|
|
+ *(int *)(AddressToDownload + AT91C_OFFSET_VECT6) = i;
|
|
+
|
|
+// printf("\n\rModification of Arm Vector 6 :%x\n\r", i);
|
|
+
|
|
+ printf("\n\rWR %d in DF [0x%x]\n\r",SizeToDownload, DeviceAddress);
|
|
+ crc1 = 0;
|
|
+ pAT91->CRC32((const unsigned char *)AddressToDownload, SizeToDownload , &crc1);
|
|
+
|
|
+ // write the dataflash
|
|
+ write_dataflash (DeviceAddress, AddressToDownload, SizeToDownload);
|
|
+ // clear the buffer before read
|
|
+ for(i=0; i < SizeToDownload; i++)
|
|
+ *(unsigned char *)(AddressToDownload + i) = 0;
|
|
+
|
|
+ //* Read dataflash page in TestBuffer
|
|
+ read_dataflash (DeviceAddress, SizeToDownload, (char *)(AddressToDownload));
|
|
+
|
|
+ printf("Vfy DF: ");
|
|
+ crc2 = 0;
|
|
+
|
|
+ pAT91->CRC32((const unsigned char *)AddressToDownload, SizeToDownload , &crc2);
|
|
+ if (crc1 != crc2)
|
|
+ printf("Fail\r\n");
|
|
+ else
|
|
+ printf("OK\r\n");
|
|
+
|
|
+ command = 0;
|
|
+ XmodemComplete = 0;
|
|
+ AT91F_WaitKeyPressed();
|
|
}
|
|
- while(message[0] == '\0');
|
|
- command = 0;
|
|
- break;
|
|
-
|
|
- case '3':
|
|
- AT91F_StartUboot(0, (void *)0);
|
|
- command = 0;
|
|
- break;
|
|
- case '4':
|
|
- {
|
|
- int *i;
|
|
- for(i = (int *)0x20000000; i < (int *)0x20004000; i++)
|
|
- *i = 0;
|
|
- }
|
|
- write_dataflash(0xc0000000, 0x20000000, 0x4000);
|
|
- printf("Bootsection cleared\r\n");
|
|
- command = 0;
|
|
- break;
|
|
- default:
|
|
- command = 0;
|
|
- break;
|
|
- }
|
|
}
|
|
-
|
|
- xmodemPipe.Read(&xmodemPipe, (char *)AddressToDownload, SizeToDownload, XmodemProtocol, 0);
|
|
- while(XmodemComplete !=1);
|
|
- SizeToDownload = (unsigned int)(svcXmodem.pData) - (unsigned int)AddressToDownload;
|
|
-
|
|
- // Modification of vector 6
|
|
- NbPage = 0;
|
|
- i = dataflash_info[device].Device.pages_number;
|
|
- while(i >>= 1)
|
|
- NbPage++;
|
|
- i = (SizeToDownload / 512) + 1 + (NbPage << 13) + (dataflash_info[device].Device.pages_size << 17);
|
|
- *(int *)(AddressToDownload + AT91C_OFFSET_VECT6) = i;
|
|
-
|
|
- printf("\n\rModification of Arm Vector 6 :%x\n\r", i);
|
|
-
|
|
- printf("\n\rWrite %d bytes in DataFlash [0x%x]\n\r",SizeToDownload, DeviceAddress);
|
|
- crc1 = 0;
|
|
- pAT91->CRC32((const unsigned char *)AddressToDownload, SizeToDownload , &crc1);
|
|
-
|
|
- // write the dataflash
|
|
- write_dataflash (DeviceAddress, AddressToDownload, SizeToDownload);
|
|
- // clear the buffer before read
|
|
- for(i=0; i < SizeToDownload; i++)
|
|
- *(unsigned char *)(AddressToDownload + i) = 0;
|
|
-
|
|
- //* Read dataflash page in TestBuffer
|
|
- read_dataflash (DeviceAddress, SizeToDownload, (char *)(AddressToDownload));
|
|
-
|
|
- printf("Verify Dataflash: ");
|
|
- crc2 = 0;
|
|
-
|
|
- pAT91->CRC32((const unsigned char *)AddressToDownload, SizeToDownload , &crc2);
|
|
- if (crc1 != crc2)
|
|
- printf("Failed\r\n");
|
|
- else
|
|
- printf("OK\r\n");
|
|
-
|
|
- command = 0;
|
|
- XmodemComplete = 0;
|
|
- AT91F_WaitKeyPressed();
|
|
- }
|
|
-}
|
|
diff -urN romboot.old/main.h romboot/main.h
|
|
--- romboot.old/main.h 2004-07-03 17:41:14.000000000 +0200
|
|
+++ romboot/main.h 2007-03-21 21:48:52.000000000 +0100
|
|
@@ -27,7 +27,7 @@
|
|
|
|
#define AT91C_OFFSET_VECT6 0x14 //* Offset for ARM vector 6
|
|
|
|
-#define AT91C_VERSION "VER 1.01"
|
|
+#define AT91C_VERSION "VER 1.02"
|
|
// Global variables and functions definition
|
|
extern unsigned int GetTickCount(void);
|
|
#endif
|
|
diff -urN romboot.old/Makefile romboot/Makefile
|
|
--- romboot.old/Makefile 2007-03-19 12:44:03.000000000 +0100
|
|
+++ romboot/Makefile 2007-03-21 12:29:11.000000000 +0100
|
|
@@ -1,8 +1,8 @@
|
|
LINKFLAGS= -T elf32-littlearm.lds -Ttext 0
|
|
COMPILEFLAGS= -Os
|
|
TARGET=romboot
|
|
-OBJFILES=cstartup_ram.o asm_isr.o jump.o at45.o com.o dataflash.o \
|
|
- init.o main.o stdio.o _udivsi3.o _umodsi3.o div0.o
|
|
+OBJFILES=cstartup_ram.o asm_isr.o asm_mci_isr.o jump.o at45.o com.o dataflash.o \
|
|
+ mci_device.o mci_main.o init.o main.o stdio.o _udivsi3.o _umodsi3.o div0.o
|
|
LIBRARIES=
|
|
INCLUDES= -Iinclude
|
|
|
|
@@ -11,10 +11,15 @@
|
|
$(TARGET): $(OBJFILES)
|
|
$(LD) $(OBJFILES) -o $(TARGET).out $(LINKFLAGS) -n
|
|
$(OBJCOPY) $(TARGET).out -O binary $(TARGET).bin
|
|
+ $(OBJDUMP) -h -s $(TARGET).out > $(TARGET).lss
|
|
+ $(NM) -n $(TARGET).out | grep -v '\( [aUw] \)\|\(__crc_\)\|\( \$[adt]\)' > $(TARGET).map
|
|
|
|
asm_isr.o: asm_isr.S
|
|
$(CC) -c -Iinclude -o $@ $<
|
|
|
|
+asm_mci_isr.o: asm_mci_isr.S
|
|
+ $(CC) -c -Iinclude -o $@ $<
|
|
+
|
|
cstartup_ram.o: cstartup_ram.S
|
|
$(CC) -c -Iinclude -o $@ $<
|
|
|
|
diff -urN romboot.old/mci_device.cpp romboot/mci_device.cpp
|
|
--- romboot.old/mci_device.cpp 1970-01-01 01:00:00.000000000 +0100
|
|
+++ romboot/mci_device.cpp 2007-03-22 18:52:48.000000000 +0100
|
|
@@ -0,0 +1,581 @@
|
|
+//*----------------------------------------------------------------------------
|
|
+//* ATMEL Microcontroller Software Support - ROUSSET -
|
|
+//*----------------------------------------------------------------------------
|
|
+//* The software is delivered "AS IS" without warranty or condition of any
|
|
+//* kind, either express, implied or statutory. This includes without
|
|
+//* limitation any warranty or condition with respect to merchantability or
|
|
+//* fitness for any particular purpose, or against the infringements of
|
|
+//* intellectual property rights of others.
|
|
+//*----------------------------------------------------------------------------
|
|
+//* File Name : mci_device.c
|
|
+//* Object : TEST DataFlash Functions
|
|
+//* Creation : FB 26/11/2002
|
|
+//*
|
|
+//*----------------------------------------------------------------------------
|
|
+
|
|
+#include <AT91C_MCI_Device.h>
|
|
+#include "com.h"
|
|
+
|
|
+#define ENABLE_WRITE 1
|
|
+#undef MMC
|
|
+
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_SendCommand
|
|
+//* \brief Generic function to send a command to the MMC or SDCard
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_SendCommand (
|
|
+ AT91PS_MciDevice pMCI_Device,
|
|
+ unsigned int Cmd,
|
|
+ unsigned int Arg)
|
|
+{
|
|
+ unsigned int error,status;
|
|
+ //unsigned int tick=0;
|
|
+
|
|
+ // Send the command
|
|
+ AT91C_BASE_MCI->MCI_ARGR = Arg;
|
|
+ AT91C_BASE_MCI->MCI_CMDR = Cmd;
|
|
+
|
|
+ // wait for CMDRDY Status flag to read the response
|
|
+ do
|
|
+ {
|
|
+ status = AT91C_BASE_MCI->MCI_SR;
|
|
+ //tick++;
|
|
+ }
|
|
+ while( !(status & AT91C_MCI_CMDRDY) );//&& (tick<100) );
|
|
+
|
|
+ // Test error ==> if crc error and response R3 ==> don't check error
|
|
+ error = (AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR;
|
|
+ if(error != 0 )
|
|
+ {
|
|
+ // if the command is SEND_OP_COND the CRC error flag is always present (cf : R3 response)
|
|
+ if ( (Cmd != AT91C_SDCARD_APP_OP_COND_CMD) && (Cmd != AT91C_MMC_SEND_OP_COND_CMD) )
|
|
+ return ((AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR);
|
|
+ else
|
|
+ {
|
|
+ if (error != AT91C_MCI_RCRCE)
|
|
+ return ((AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR);
|
|
+ }
|
|
+ }
|
|
+ return AT91C_CMD_SEND_OK;
|
|
+}
|
|
+
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_SDCard_SendAppCommand
|
|
+//* \brief Specific function to send a specific command to the SDCard
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_SDCard_SendAppCommand (
|
|
+ AT91PS_MciDevice pMCI_Device,
|
|
+ unsigned int Cmd_App,
|
|
+ unsigned int Arg )
|
|
+{
|
|
+ unsigned int status;
|
|
+ //unsigned int tick=0;
|
|
+
|
|
+ // Send the CMD55 for application specific command
|
|
+ AT91C_BASE_MCI->MCI_ARGR = (pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address << 16 );
|
|
+ AT91C_BASE_MCI->MCI_CMDR = AT91C_APP_CMD;
|
|
+
|
|
+ // wait for CMDRDY Status flag to read the response
|
|
+ do
|
|
+ {
|
|
+ status = AT91C_BASE_MCI->MCI_SR;
|
|
+ //tick++;
|
|
+ }
|
|
+ while( !(status & AT91C_MCI_CMDRDY) );//&& (tick<100) );
|
|
+
|
|
+ // if an error occurs
|
|
+ if (((AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR) != 0 )
|
|
+ return ((AT91C_BASE_MCI->MCI_SR) & AT91C_MCI_SR_ERROR);
|
|
+
|
|
+ // check if it is a specific command and then send the command
|
|
+ if ( (Cmd_App && AT91C_SDCARD_APP_ALL_CMD) == 0)
|
|
+ return AT91C_CMD_SEND_ERROR;
|
|
+
|
|
+ return( AT91F_MCI_SendCommand(pMCI_Device,Cmd_App,Arg) );
|
|
+}
|
|
+
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_GetStatus
|
|
+//* \brief Addressed card sends its status register
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_GetStatus(AT91PS_MciDevice pMCI_Device,unsigned int relative_card_address)
|
|
+{
|
|
+ if (AT91F_MCI_SendCommand(pMCI_Device,
|
|
+ AT91C_SEND_STATUS_CMD,
|
|
+ relative_card_address <<16) == AT91C_CMD_SEND_OK)
|
|
+ return (AT91C_BASE_MCI->MCI_RSPR[0]);
|
|
+
|
|
+ return AT91C_CMD_SEND_ERROR;
|
|
+}
|
|
+
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_Device_Handler
|
|
+//* \brief MCI C interrupt handler
|
|
+//*----------------------------------------------------------------------------
|
|
+extern "C" void AT91F_MCI_Device_Handler(AT91PS_MciDevice, unsigned int);
|
|
+
|
|
+void AT91F_MCI_Device_Handler(
|
|
+ AT91PS_MciDevice pMCI_Device,
|
|
+ unsigned int status)
|
|
+{
|
|
+ // If End of Tx Buffer Empty interrupt occurred
|
|
+ if ( status & AT91C_MCI_TXBUFE )
|
|
+ {
|
|
+ AT91C_BASE_MCI->MCI_IDR = AT91C_MCI_TXBUFE;
|
|
+ AT91C_BASE_PDC_MCI->PDC_PTCR = AT91C_PDC_TXTDIS;
|
|
+
|
|
+ pMCI_Device->pMCI_DeviceDesc->state = AT91C_MCI_IDLE;
|
|
+ } // End of if AT91C_MCI_TXBUFF
|
|
+
|
|
+ // If End of Rx Buffer Full interrupt occurred
|
|
+ if ( status & AT91C_MCI_RXBUFF )
|
|
+ {
|
|
+ AT91C_BASE_MCI->MCI_IDR = AT91C_MCI_RXBUFF;
|
|
+ AT91C_BASE_PDC_MCI->PDC_PTCR = AT91C_PDC_RXTDIS;
|
|
+
|
|
+ pMCI_Device->pMCI_DeviceDesc->state = AT91C_MCI_IDLE;
|
|
+ } // End of if AT91C_MCI_RXBUFF
|
|
+
|
|
+}
|
|
+
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_ReadBlock
|
|
+//* \brief Read an ENTIRE block or PARTIAL block
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_ReadBlock(
|
|
+ AT91PS_MciDevice pMCI_Device,
|
|
+ int src,
|
|
+ unsigned int *dataBuffer,
|
|
+ int sizeToRead )
|
|
+{
|
|
+ ////////////////////////////////////////////////////////////////////////////////////////////
|
|
+ if(pMCI_Device->pMCI_DeviceDesc->state != AT91C_MCI_IDLE)
|
|
+ return AT91C_READ_ERROR;
|
|
+
|
|
+ if( (AT91F_MCI_GetStatus(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address) & AT91C_SR_READY_FOR_DATA) != AT91C_SR_READY_FOR_DATA)
|
|
+ return AT91C_READ_ERROR;
|
|
+
|
|
+ if ( (src + sizeToRead) > pMCI_Device->pMCI_DeviceFeatures->Memory_Capacity )
|
|
+ return AT91C_READ_ERROR;
|
|
+
|
|
+ // If source does not fit a begin of a block
|
|
+ if ( (src % pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length) != 0 )
|
|
+ return AT91C_READ_ERROR;
|
|
+
|
|
+ // Test if the MMC supports Partial Read Block
|
|
+ // ALWAYS SUPPORTED IN SD Memory Card
|
|
+ if( (sizeToRead < pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length)
|
|
+ && (pMCI_Device->pMCI_DeviceFeatures->Read_Partial == 0x00) )
|
|
+ return AT91C_READ_ERROR;
|
|
+
|
|
+ if( sizeToRead > pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length)
|
|
+ return AT91C_READ_ERROR;
|
|
+ ////////////////////////////////////////////////////////////////////////////////////////////
|
|
+
|
|
+ // Init Mode Register
|
|
+ AT91C_BASE_MCI->MCI_MR |= ((pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length << 16) | AT91C_MCI_PDCMODE);
|
|
+
|
|
+ if (sizeToRead %4)
|
|
+ sizeToRead = (sizeToRead /4)+1;
|
|
+ else
|
|
+ sizeToRead = sizeToRead/4;
|
|
+
|
|
+ AT91C_BASE_PDC_MCI->PDC_PTCR = (AT91C_PDC_TXTDIS | AT91C_PDC_RXTDIS);
|
|
+ AT91C_BASE_PDC_MCI->PDC_RPR = (unsigned int)dataBuffer;
|
|
+ AT91C_BASE_PDC_MCI->PDC_RCR = sizeToRead;
|
|
+
|
|
+ // Send the Read single block command
|
|
+ if ( AT91F_MCI_SendCommand(pMCI_Device, AT91C_READ_SINGLE_BLOCK_CMD, src) != AT91C_CMD_SEND_OK )
|
|
+ return AT91C_READ_ERROR;
|
|
+
|
|
+ pMCI_Device->pMCI_DeviceDesc->state = AT91C_MCI_RX_SINGLE_BLOCK;
|
|
+
|
|
+ // Enable AT91C_MCI_RXBUFF Interrupt
|
|
+ AT91C_BASE_MCI->MCI_IER = AT91C_MCI_RXBUFF;
|
|
+
|
|
+ // (PDC) Receiver Transfer Enable
|
|
+ AT91C_BASE_PDC_MCI->PDC_PTCR = AT91C_PDC_RXTEN;
|
|
+
|
|
+ return AT91C_READ_OK;
|
|
+}
|
|
+
|
|
+
|
|
+#ifdef ENABLE_WRITE
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_WriteBlock
|
|
+//* \brief Write an ENTIRE block but not always PARTIAL block !!!
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_WriteBlock(
|
|
+ AT91PS_MciDevice pMCI_Device,
|
|
+ int dest,
|
|
+ unsigned int *dataBuffer,
|
|
+ int sizeToWrite )
|
|
+{
|
|
+ ////////////////////////////////////////////////////////////////////////////////////////////
|
|
+ if( pMCI_Device->pMCI_DeviceDesc->state != AT91C_MCI_IDLE)
|
|
+ return AT91C_WRITE_ERROR;
|
|
+
|
|
+ if( (AT91F_MCI_GetStatus(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address) & AT91C_SR_READY_FOR_DATA) != AT91C_SR_READY_FOR_DATA)
|
|
+ return AT91C_WRITE_ERROR;
|
|
+
|
|
+ if ( (dest + sizeToWrite) > pMCI_Device->pMCI_DeviceFeatures->Memory_Capacity )
|
|
+ return AT91C_WRITE_ERROR;
|
|
+
|
|
+ // If source does not fit a begin of a block
|
|
+ if ( (dest % pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length) != 0 )
|
|
+ return AT91C_WRITE_ERROR;
|
|
+
|
|
+ // Test if the MMC supports Partial Write Block
|
|
+ if( (sizeToWrite < pMCI_Device->pMCI_DeviceFeatures->Max_Write_DataBlock_Length)
|
|
+ && (pMCI_Device->pMCI_DeviceFeatures->Write_Partial == 0x00) )
|
|
+ return AT91C_WRITE_ERROR;
|
|
+
|
|
+ if( sizeToWrite > pMCI_Device->pMCI_DeviceFeatures->Max_Write_DataBlock_Length )
|
|
+ return AT91C_WRITE_ERROR;
|
|
+ ////////////////////////////////////////////////////////////////////////////////////////////
|
|
+
|
|
+ // Init Mode Register
|
|
+ AT91C_BASE_MCI->MCI_MR |= ((pMCI_Device->pMCI_DeviceFeatures->Max_Write_DataBlock_Length << 16) | AT91C_MCI_PDCMODE);
|
|
+
|
|
+ if (sizeToWrite %4)
|
|
+ sizeToWrite = (sizeToWrite /4)+1;
|
|
+ else
|
|
+ sizeToWrite = sizeToWrite/4;
|
|
+
|
|
+ // Init PDC for write sequence
|
|
+ AT91C_BASE_PDC_MCI->PDC_PTCR = (AT91C_PDC_TXTDIS | AT91C_PDC_RXTDIS);
|
|
+ AT91C_BASE_PDC_MCI->PDC_TPR = (unsigned int) dataBuffer;
|
|
+ AT91C_BASE_PDC_MCI->PDC_TCR = sizeToWrite;
|
|
+
|
|
+ // Send the write single block command
|
|
+ if ( AT91F_MCI_SendCommand(pMCI_Device, AT91C_WRITE_BLOCK_CMD, dest) != AT91C_CMD_SEND_OK)
|
|
+ return AT91C_WRITE_ERROR;
|
|
+
|
|
+ pMCI_Device->pMCI_DeviceDesc->state = AT91C_MCI_TX_SINGLE_BLOCK;
|
|
+
|
|
+ // Enable AT91C_MCI_TXBUFE Interrupt
|
|
+ AT91C_BASE_MCI->MCI_IER = AT91C_MCI_TXBUFE;
|
|
+
|
|
+ // Enables TX for PDC transfert requests
|
|
+ AT91C_BASE_PDC_MCI->PDC_PTCR = AT91C_PDC_TXTEN;
|
|
+
|
|
+ return AT91C_WRITE_OK;
|
|
+}
|
|
+#endif
|
|
+
|
|
+#ifdef MMC
|
|
+//*------------------------------------------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_MMC_SelectCard
|
|
+//* \brief Toggles a card between the Stand_by and Transfer states or between Programming and Disconnect states
|
|
+//*------------------------------------------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_MMC_SelectCard(AT91PS_MciDevice pMCI_Device, unsigned int relative_card_address)
|
|
+{
|
|
+ int status;
|
|
+
|
|
+ //* Check if the MMC card chosen is already the selected one
|
|
+ status = AT91F_MCI_GetStatus(pMCI_Device,relative_card_address);
|
|
+
|
|
+ if (status < 0)
|
|
+ return AT91C_CARD_SELECTED_ERROR;
|
|
+
|
|
+ if ((status & AT91C_SR_CARD_SELECTED) == AT91C_SR_CARD_SELECTED)
|
|
+ return AT91C_CARD_SELECTED_OK;
|
|
+
|
|
+ //* Search for the MMC Card to be selected, status = the Corresponding Device Number
|
|
+ status = 0;
|
|
+ while( (pMCI_Device->pMCI_DeviceFeatures[status].Relative_Card_Address != relative_card_address)
|
|
+ && (status < AT91C_MAX_MCI_CARDS) )
|
|
+ status++;
|
|
+
|
|
+ if (status > AT91C_MAX_MCI_CARDS)
|
|
+ return AT91C_CARD_SELECTED_ERROR;
|
|
+
|
|
+ if (AT91F_MCI_SendCommand( pMCI_Device,
|
|
+ AT91C_SEL_DESEL_CARD_CMD,
|
|
+ pMCI_Device->pMCI_DeviceFeatures[status].Relative_Card_Address << 16) == AT91C_CMD_SEND_OK)
|
|
+ return AT91C_CARD_SELECTED_OK;
|
|
+ return AT91C_CARD_SELECTED_ERROR;
|
|
+}
|
|
+#endif
|
|
+
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_GetCSD
|
|
+//* \brief Asks to the specified card to send its CSD
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_GetCSD (AT91PS_MciDevice pMCI_Device, unsigned int relative_card_address , unsigned int * response)
|
|
+{
|
|
+
|
|
+ if(AT91F_MCI_SendCommand(pMCI_Device,
|
|
+ AT91C_SEND_CSD_CMD,
|
|
+ (relative_card_address << 16)) != AT91C_CMD_SEND_OK)
|
|
+ return AT91C_CMD_SEND_ERROR;
|
|
+
|
|
+ response[0] = AT91C_BASE_MCI->MCI_RSPR[0];
|
|
+ response[1] = AT91C_BASE_MCI->MCI_RSPR[1];
|
|
+ response[2] = AT91C_BASE_MCI->MCI_RSPR[2];
|
|
+ response[3] = AT91C_BASE_MCI->MCI_RSPR[3];
|
|
+
|
|
+ return AT91C_CMD_SEND_OK;
|
|
+}
|
|
+
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_SetBlocklength
|
|
+//* \brief Select a block length for all following block commands (R/W)
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_SetBlocklength(AT91PS_MciDevice pMCI_Device,unsigned int length)
|
|
+{
|
|
+ return( AT91F_MCI_SendCommand(pMCI_Device, AT91C_SET_BLOCKLEN_CMD, length) );
|
|
+}
|
|
+
|
|
+#ifdef MMC
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_MMC_GetAllOCR
|
|
+//* \brief Asks to all cards to send their operations conditions
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_MMC_GetAllOCR (AT91PS_MciDevice pMCI_Device)
|
|
+{
|
|
+ unsigned int response =0x0;
|
|
+
|
|
+ while(1)
|
|
+ {
|
|
+ response = AT91F_MCI_SendCommand(pMCI_Device,
|
|
+ AT91C_MMC_SEND_OP_COND_CMD,
|
|
+ AT91C_MMC_HOST_VOLTAGE_RANGE);
|
|
+ if (response != AT91C_CMD_SEND_OK)
|
|
+ return AT91C_INIT_ERROR;
|
|
+
|
|
+ response = AT91C_BASE_MCI->MCI_RSPR[0];
|
|
+
|
|
+ if ( (response & AT91C_CARD_POWER_UP_BUSY) == AT91C_CARD_POWER_UP_BUSY)
|
|
+ return(response);
|
|
+ }
|
|
+}
|
|
+#endif
|
|
+
|
|
+#ifdef MMC
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_MMC_GetAllCID
|
|
+//* \brief Asks to the MMC on the chosen slot to send its CID
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_MMC_GetAllCID (AT91PS_MciDevice pMCI_Device, unsigned int *response)
|
|
+{
|
|
+ int Nb_Cards_Found=-1;
|
|
+
|
|
+ while(1)
|
|
+ {
|
|
+ if(AT91F_MCI_SendCommand(pMCI_Device,
|
|
+ AT91C_MMC_ALL_SEND_CID_CMD,
|
|
+ AT91C_NO_ARGUMENT) != AT91C_CMD_SEND_OK)
|
|
+ return Nb_Cards_Found;
|
|
+ else
|
|
+ {
|
|
+ Nb_Cards_Found = 0;
|
|
+ //* Assignation of the relative address to the MMC CARD
|
|
+ pMCI_Device->pMCI_DeviceFeatures[Nb_Cards_Found].Relative_Card_Address = Nb_Cards_Found + AT91C_FIRST_RCA;
|
|
+ //* Set the insert flag
|
|
+ pMCI_Device->pMCI_DeviceFeatures[Nb_Cards_Found].Card_Inserted = AT91C_MMC_CARD_INSERTED;
|
|
+
|
|
+ if (AT91F_MCI_SendCommand(pMCI_Device,
|
|
+ AT91C_MMC_SET_RELATIVE_ADDR_CMD,
|
|
+ (Nb_Cards_Found + AT91C_FIRST_RCA) << 16) != AT91C_CMD_SEND_OK)
|
|
+ return AT91C_CMD_SEND_ERROR;
|
|
+
|
|
+ //* If no error during assignation address ==> Increment Nb_cards_Found
|
|
+ Nb_Cards_Found++ ;
|
|
+ }
|
|
+ }
|
|
+}
|
|
+#endif
|
|
+#ifdef MMC
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_MMC_Init
|
|
+//* \brief Return the MMC initialisation status
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_MMC_Init (AT91PS_MciDevice pMCI_Device)
|
|
+{
|
|
+ unsigned int tab_response[4];
|
|
+ unsigned int mult,blocknr;
|
|
+ unsigned int i,Nb_Cards_Found=0;
|
|
+
|
|
+ //* Resets all MMC Cards in Idle state
|
|
+ AT91F_MCI_SendCommand(pMCI_Device, AT91C_MMC_GO_IDLE_STATE_CMD, AT91C_NO_ARGUMENT);
|
|
+
|
|
+ if(AT91F_MCI_MMC_GetAllOCR(pMCI_Device) == AT91C_INIT_ERROR)
|
|
+ return AT91C_INIT_ERROR;
|
|
+
|
|
+ Nb_Cards_Found = AT91F_MCI_MMC_GetAllCID(pMCI_Device,tab_response);
|
|
+ if (Nb_Cards_Found != AT91C_CMD_SEND_ERROR)
|
|
+ {
|
|
+ //* Set the Mode Register
|
|
+ AT91C_BASE_MCI->MCI_MR = AT91C_MCI_MR_PDCMODE;
|
|
+
|
|
+ for(i = 0; i < Nb_Cards_Found; i++)
|
|
+ {
|
|
+ if (AT91F_MCI_GetCSD(pMCI_Device,
|
|
+ pMCI_Device->pMCI_DeviceFeatures[i].Relative_Card_Address,
|
|
+ tab_response) != AT91C_CMD_SEND_OK)
|
|
+ pMCI_Device->pMCI_DeviceFeatures[i].Relative_Card_Address = 0;
|
|
+ else
|
|
+ {
|
|
+ pMCI_Device->pMCI_DeviceFeatures[i].Max_Read_DataBlock_Length = 1 << ((tab_response[1] >> AT91C_CSD_RD_B_LEN_S) & AT91C_CSD_RD_B_LEN_M );
|
|
+ pMCI_Device->pMCI_DeviceFeatures[i].Max_Write_DataBlock_Length = 1 << ((tab_response[3] >> AT91C_CSD_WBLEN_S) & AT91C_CSD_WBLEN_M );
|
|
+ pMCI_Device->pMCI_DeviceFeatures[i].Sector_Size = 1 + ((tab_response[2] >> AT91C_CSD_v22_SECT_SIZE_S) & AT91C_CSD_v22_SECT_SIZE_M );
|
|
+ pMCI_Device->pMCI_DeviceFeatures[i].Read_Partial = (tab_response[1] >> AT91C_CSD_RD_B_PAR_S) & AT91C_CSD_RD_B_PAR_M;
|
|
+ pMCI_Device->pMCI_DeviceFeatures[i].Write_Partial = (tab_response[3] >> AT91C_CSD_WBLOCK_P_S) & AT91C_CSD_WBLOCK_P_M;
|
|
+
|
|
+ // None in MMC specification version 2.2
|
|
+ pMCI_Device->pMCI_DeviceFeatures[i].Erase_Block_Enable = 0;
|
|
+
|
|
+ pMCI_Device->pMCI_DeviceFeatures[i].Read_Block_Misalignment = (tab_response[1] >> AT91C_CSD_RD_B_MIS_S) & AT91C_CSD_RD_B_MIS_M;
|
|
+ pMCI_Device->pMCI_DeviceFeatures[i].Write_Block_Misalignment = (tab_response[1] >> AT91C_CSD_WR_B_MIS_S) & AT91C_CSD_WR_B_MIS_M;
|
|
+
|
|
+ //// Compute Memory Capacity
|
|
+ // compute MULT
|
|
+ mult = 1 << ( ((tab_response[2] >> AT91C_CSD_C_SIZE_M_S) & AT91C_CSD_C_SIZE_M_M) + 2 );
|
|
+ // compute MSB of C_SIZE
|
|
+ blocknr = ((tab_response[1] >> AT91C_CSD_CSIZE_H_S) & AT91C_CSD_CSIZE_H_M) << 2;
|
|
+ // compute MULT * (LSB of C-SIZE + MSB already computed + 1) = BLOCKNR
|
|
+ blocknr = mult * ( ( blocknr + ( (tab_response[2] >> AT91C_CSD_CSIZE_L_S) & AT91C_CSD_CSIZE_L_M) ) + 1 );
|
|
+
|
|
+ pMCI_Device->pMCI_DeviceFeatures[i].Memory_Capacity = pMCI_Device->pMCI_DeviceFeatures[i].Max_Read_DataBlock_Length * blocknr;
|
|
+ //// End of Compute Memory Capacity
|
|
+
|
|
+ } // end of else
|
|
+ } // end of for
|
|
+
|
|
+ return AT91C_INIT_OK;
|
|
+ } // end of if
|
|
+
|
|
+ return AT91C_INIT_ERROR;
|
|
+}
|
|
+#endif
|
|
+
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_SDCard_GetOCR
|
|
+//* \brief Asks to all cards to send their operations conditions
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_SDCard_GetOCR (AT91PS_MciDevice pMCI_Device)
|
|
+{
|
|
+ unsigned int response =0x0;
|
|
+
|
|
+ // The RCA to be used for CMD55 in Idle state shall be the card's default RCA=0x0000.
|
|
+ pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address = 0x0;
|
|
+
|
|
+ while( (response & AT91C_CARD_POWER_UP_BUSY) != AT91C_CARD_POWER_UP_BUSY )
|
|
+ {
|
|
+ response = AT91F_MCI_SDCard_SendAppCommand(pMCI_Device,
|
|
+ AT91C_SDCARD_APP_OP_COND_CMD,
|
|
+ AT91C_MMC_HOST_VOLTAGE_RANGE);
|
|
+ if (response != AT91C_CMD_SEND_OK)
|
|
+ return AT91C_INIT_ERROR;
|
|
+
|
|
+ response = AT91C_BASE_MCI->MCI_RSPR[0];
|
|
+ }
|
|
+
|
|
+ return(AT91C_BASE_MCI->MCI_RSPR[0]);
|
|
+}
|
|
+
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_SDCard_GetCID
|
|
+//* \brief Asks to the SDCard on the chosen slot to send its CID
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_SDCard_GetCID (AT91PS_MciDevice pMCI_Device, unsigned int *response)
|
|
+{
|
|
+ if(AT91F_MCI_SendCommand(pMCI_Device,
|
|
+ AT91C_ALL_SEND_CID_CMD,
|
|
+ AT91C_NO_ARGUMENT) != AT91C_CMD_SEND_OK)
|
|
+ return AT91C_CMD_SEND_ERROR;
|
|
+
|
|
+ response[0] = AT91C_BASE_MCI->MCI_RSPR[0];
|
|
+ response[1] = AT91C_BASE_MCI->MCI_RSPR[1];
|
|
+ response[2] = AT91C_BASE_MCI->MCI_RSPR[2];
|
|
+ response[3] = AT91C_BASE_MCI->MCI_RSPR[3];
|
|
+
|
|
+ return AT91C_CMD_SEND_OK;
|
|
+}
|
|
+
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_SDCard_SetBusWidth
|
|
+//* \brief Set bus width for SDCard
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_SDCard_SetBusWidth(AT91PS_MciDevice pMCI_Device)
|
|
+{
|
|
+ volatile int ret_value;
|
|
+ char bus_width;
|
|
+
|
|
+ do
|
|
+ {
|
|
+ ret_value =AT91F_MCI_GetStatus(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address);
|
|
+ }
|
|
+ while((ret_value > 0) && ((ret_value & AT91C_SR_READY_FOR_DATA) == 0));
|
|
+
|
|
+ // Select Card
|
|
+ AT91F_MCI_SendCommand(pMCI_Device,
|
|
+ AT91C_SEL_DESEL_CARD_CMD,
|
|
+ (pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address)<<16);
|
|
+
|
|
+ // Set bus width for Sdcard
|
|
+ if(pMCI_Device->pMCI_DeviceDesc->SDCard_bus_width == AT91C_MCI_SCDBUS)
|
|
+ bus_width = AT91C_BUS_WIDTH_4BITS;
|
|
+ else bus_width = AT91C_BUS_WIDTH_1BIT;
|
|
+
|
|
+ if (AT91F_MCI_SDCard_SendAppCommand(pMCI_Device,AT91C_SDCARD_SET_BUS_WIDTH_CMD,bus_width) != AT91C_CMD_SEND_OK)
|
|
+ return AT91C_CMD_SEND_ERROR;
|
|
+
|
|
+ return AT91C_CMD_SEND_OK;
|
|
+}
|
|
+
|
|
+//*----------------------------------------------------------------------------
|
|
+//* \fn AT91F_MCI_SDCard_Init
|
|
+//* \brief Return the SDCard initialisation status
|
|
+//*----------------------------------------------------------------------------
|
|
+AT91S_MCIDeviceStatus AT91F_MCI_SDCard_Init (AT91PS_MciDevice pMCI_Device)
|
|
+{
|
|
+ unsigned int tab_response[4];
|
|
+ unsigned int mult,blocknr;
|
|
+
|
|
+ AT91F_MCI_SendCommand(pMCI_Device, AT91C_GO_IDLE_STATE_CMD, AT91C_NO_ARGUMENT);
|
|
+
|
|
+ if(AT91F_MCI_SDCard_GetOCR(pMCI_Device) == AT91C_INIT_ERROR)
|
|
+ return AT91C_INIT_ERROR;
|
|
+
|
|
+ if (AT91F_MCI_SDCard_GetCID(pMCI_Device,tab_response) == AT91C_CMD_SEND_OK)
|
|
+ {
|
|
+ pMCI_Device->pMCI_DeviceFeatures->Card_Inserted = AT91C_SD_CARD_INSERTED;
|
|
+
|
|
+ if (AT91F_MCI_SendCommand(pMCI_Device, AT91C_SET_RELATIVE_ADDR_CMD, 0) == AT91C_CMD_SEND_OK)
|
|
+ {
|
|
+ pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address = (AT91C_BASE_MCI->MCI_RSPR[0] >> 16);
|
|
+ if (AT91F_MCI_GetCSD(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Relative_Card_Address,tab_response) == AT91C_CMD_SEND_OK)
|
|
+ {
|
|
+ pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length = 1 << ((tab_response[1] >> AT91C_CSD_RD_B_LEN_S) & AT91C_CSD_RD_B_LEN_M );
|
|
+ pMCI_Device->pMCI_DeviceFeatures->Max_Write_DataBlock_Length = 1 << ((tab_response[3] >> AT91C_CSD_WBLEN_S) & AT91C_CSD_WBLEN_M );
|
|
+ pMCI_Device->pMCI_DeviceFeatures->Sector_Size = 1 + ((tab_response[2] >> AT91C_CSD_v21_SECT_SIZE_S) & AT91C_CSD_v21_SECT_SIZE_M );
|
|
+ pMCI_Device->pMCI_DeviceFeatures->Read_Partial = (tab_response[1] >> AT91C_CSD_RD_B_PAR_S) & AT91C_CSD_RD_B_PAR_M;
|
|
+ pMCI_Device->pMCI_DeviceFeatures->Write_Partial = (tab_response[3] >> AT91C_CSD_WBLOCK_P_S) & AT91C_CSD_WBLOCK_P_M;
|
|
+ pMCI_Device->pMCI_DeviceFeatures->Erase_Block_Enable = (tab_response[3] >> AT91C_CSD_v21_ER_BLEN_EN_S) & AT91C_CSD_v21_ER_BLEN_EN_M;
|
|
+ pMCI_Device->pMCI_DeviceFeatures->Read_Block_Misalignment = (tab_response[1] >> AT91C_CSD_RD_B_MIS_S) & AT91C_CSD_RD_B_MIS_M;
|
|
+ pMCI_Device->pMCI_DeviceFeatures->Write_Block_Misalignment = (tab_response[1] >> AT91C_CSD_WR_B_MIS_S) & AT91C_CSD_WR_B_MIS_M;
|
|
+
|
|
+ //// Compute Memory Capacity
|
|
+ // compute MULT
|
|
+ mult = 1 << ( ((tab_response[2] >> AT91C_CSD_C_SIZE_M_S) & AT91C_CSD_C_SIZE_M_M) + 2 );
|
|
+ // compute MSB of C_SIZE
|
|
+ blocknr = ((tab_response[1] >> AT91C_CSD_CSIZE_H_S) & AT91C_CSD_CSIZE_H_M) << 2;
|
|
+ // compute MULT * (LSB of C-SIZE + MSB already computed + 1) = BLOCKNR
|
|
+ blocknr = mult * ( ( blocknr + ( (tab_response[2] >> AT91C_CSD_CSIZE_L_S) & AT91C_CSD_CSIZE_L_M) ) + 1 );
|
|
+
|
|
+ pMCI_Device->pMCI_DeviceFeatures->Memory_Capacity = pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length * blocknr;
|
|
+ //// End of Compute Memory Capacity
|
|
+ printf("BLK 0x%x", pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length);
|
|
+
|
|
+ if( AT91F_MCI_SDCard_SetBusWidth(pMCI_Device) == AT91C_CMD_SEND_OK )
|
|
+ {
|
|
+ if (AT91F_MCI_SetBlocklength(pMCI_Device,pMCI_Device->pMCI_DeviceFeatures->Max_Read_DataBlock_Length) == AT91C_CMD_SEND_OK)
|
|
+ return AT91C_INIT_OK;
|
|
+ }
|
|
+ }
|
|
+ }
|
|
+ }
|
|
+ return AT91C_INIT_ERROR;
|
|
+}
|
|
diff -urN romboot.old/mci_main.cpp romboot/mci_main.cpp
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--- romboot.old/mci_main.cpp 1970-01-01 01:00:00.000000000 +0100
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+++ romboot/mci_main.cpp 2007-03-22 18:52:58.000000000 +0100
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@@ -0,0 +1,317 @@
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+//*----------------------------------------------------------------------------
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+//* ATMEL Microcontroller Software Support - ROUSSET -
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+//*----------------------------------------------------------------------------
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+//* The software is delivered "AS IS" without warranty or condition of any
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+//* kind, either express, implied or statutory. This includes without
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+//* limitation any warranty or condition with respect to merchantability or
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+//* fitness for any particular purpose, or against the infringements of
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+//* intellectual property rights of others.
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+//*----------------------------------------------------------------------------
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+//* File Name : main.c
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+//* Object : main application written in C
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+//* Creation : FB 21/11/2002
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+//*
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+//*----------------------------------------------------------------------------
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+#include "com.h"
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+#include "dataflash.h"
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+#include <AT91C_MCI_Device.h>
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+
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+#define AT91C_MCI_TIMEOUT 1000000 /* For AT91F_MCIDeviceWaitReady */
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+#define BUFFER_SIZE_MCI_DEVICE 512
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+#define MASTER_CLOCK 60000000
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+#define FALSE -1
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+#define TRUE 1
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+
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+//* External Functions
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+extern "C" void AT91F_ASM_MCI_Handler(void);
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+extern "C" void AT91F_MCI_Device_Handler(AT91PS_MciDevice,unsigned int);
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+extern AT91S_MCIDeviceStatus AT91F_MCI_SDCard_Init (AT91PS_MciDevice);
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+extern AT91S_MCIDeviceStatus AT91F_MCI_SetBlocklength(AT91PS_MciDevice,unsigned int);
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+extern AT91S_MCIDeviceStatus AT91F_MCI_ReadBlock(AT91PS_MciDevice,int,unsigned int *,int);
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+extern AT91S_MCIDeviceStatus AT91F_MCI_WriteBlock(AT91PS_MciDevice,int,unsigned int *,int);
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+//* Global Variables
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+AT91S_MciDeviceFeatures MCI_Device_Features;
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+AT91S_MciDeviceDesc MCI_Device_Desc;
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+AT91S_MciDevice MCI_Device;
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+
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+unsigned int dlBuffer = 0x20000000;
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+#undef MCI_TEST
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+#ifdef MCI_TEST
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+char TestString[] = "\r\nHello Hamish\r\n";
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+#endif
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+
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+//*----------------------------------------------------------------------------
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+//* \fn AT91F_MCIDeviceWaitReady
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+//* \brief Wait for MCI Device ready
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+//*----------------------------------------------------------------------------
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+void AT91F_MCIDeviceWaitReady(unsigned int timeout)
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+{
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+ volatile int status;
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+
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+ do
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+ {
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+ status = AT91C_BASE_MCI->MCI_SR;
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+ timeout--;
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+ }
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+ while( !(status & AT91C_MCI_NOTBUSY) && (timeout>0) );
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+}
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+
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+unsigned int swab32(unsigned int data)
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+{
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+ unsigned int res = 0;
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+
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+ res = (data & 0x000000ff) << 24 |
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+ (data & 0x0000ff00) << 8 |
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+ (data & 0x00ff0000) >> 8 |
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+ (data & 0xff000000) >> 24;
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+
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+ return res;
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+}
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+
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+AT91S_MCIDeviceStatus readblock(
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+ AT91PS_MciDevice pMCI_Device,
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+ int src,
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+ unsigned int *databuffer,
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+ int sizeToRead)
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+{
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+ int i;
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+ unsigned char *buf = (unsigned char *)databuffer;
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+
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+ //* Read Block 1
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+ for(i=0;i<BUFFER_SIZE_MCI_DEVICE;i++)
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+ *buf++ = 0x00;
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+ AT91F_MCI_ReadBlock(&MCI_Device,src,databuffer,sizeToRead);
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+
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+ //* Wait end of Read
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+ AT91F_MCIDeviceWaitReady(AT91C_MCI_TIMEOUT);
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+
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+ {
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+ int index;
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+ unsigned int *uiBuffer = databuffer;
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+
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+ for(index = 0; index < 512/4; index++)
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+ uiBuffer[index] = swab32(uiBuffer[index]);
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+ }
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+ return(1);
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+}
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+
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+#if 0
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+void printdata(unsigned int bufpos)
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+ {
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+ unsigned int *uip;
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+ int linebytes = 16;
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+ int nbytes = 64;
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+ int size = 4;
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+ int i;
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+
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+ uip = (unsigned int *)bufpos;
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+
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+ do {
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+
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+ for(i=0; i<linebytes; i+=size) {
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+ printf(" %08x", *uip++);
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+ }
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+
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+ printf("\n\r");
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+ nbytes -= linebytes;
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+ } while (nbytes > 0);
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+ }
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+#endif
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+//extern char message[40];
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+
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+int notnull(int bufpos, unsigned int len)
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+{
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+ int i;
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+ unsigned char * bp = (unsigned char *)bufpos;
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+
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+ for (i=0; i<len; i++)
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+ if (bp[i] != '\0')
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+ return(1);
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+
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+ return(0);
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+}
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+//*----------------------------------------------------------------------------
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+//* \fn AT91F_Test
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+//* \brief Test Functions
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+//*----------------------------------------------------------------------------
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+int AT91F_Test(void)
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+{
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+ int i;
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+ unsigned int Max_Read_DataBlock_Length;
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+ int block = 0;
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+ int bufpos = dlBuffer;
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+ int lastvalid = 0;
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+ int NbPage = 0;
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+
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+
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+ Max_Read_DataBlock_Length = MCI_Device.pMCI_DeviceFeatures->Max_Read_DataBlock_Length;
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+
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+ //* ReadBlock & WriteBlock Test -> Entire Block
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+
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+ //* Wait MCI Device Ready
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+ AT91F_MCIDeviceWaitReady(AT91C_MCI_TIMEOUT);
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+
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+#ifdef MCI_TEST
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+ //* Read Block 1
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+ for(i=0;i<BUFFER_SIZE_MCI_DEVICE;i++) Buffer[i] = 0x00;
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+ AT91F_MCI_ReadBlock(&MCI_Device,(1*Max_Read_DataBlock_Length),(unsigned int*) Buffer,Max_Read_DataBlock_Length);
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+
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+ //* Wait end of Read
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+ AT91F_MCIDeviceWaitReady(AT91C_MCI_TIMEOUT);
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+
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+ // Write Page 1
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+// sprintf(Buffer,"\n\rThis sentence is written in your device... Congratulations\n\r");
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+ for(i=0; i<16; i++)
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+ Buffer[i] = TestString[i];
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+ AT91F_MCI_WriteBlock(&MCI_Device,(1*Max_Read_DataBlock_Length),(unsigned int*) Buffer,Max_Read_DataBlock_Length);
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+
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+ //* Wait end of Write
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+ AT91F_MCIDeviceWaitReady(AT91C_MCI_TIMEOUT);
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+#endif
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+
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+ for(i=0; i<64; i++) {
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+ readblock(&MCI_Device, block*Max_Read_DataBlock_Length, (unsigned int *)bufpos, Max_Read_DataBlock_Length);
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+ if (notnull(bufpos, Max_Read_DataBlock_Length))
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+ lastvalid++;
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+ block++;
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+ bufpos += 512;
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+ }
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+
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+ i = dataflash_info[0].Device.pages_number;
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+ while(i>>=1)
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+ NbPage++;
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+ i = lastvalid + (NbPage << 13) + (dataflash_info[0].Device.pages_size << 17);
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+ *(int *)(dlBuffer + 0x14) = i;
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+
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+ for(i=0; i<4688; i++) {
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+ readblock(&MCI_Device, block*Max_Read_DataBlock_Length, (unsigned int *)bufpos, Max_Read_DataBlock_Length);
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+ block++;
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+ bufpos += 512;
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+ }
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+ write_dataflash(0xc0000000, dlBuffer, 512 * block);
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+ //* End Of Test
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+ printf("DONE %d\n\r", lastvalid);
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+
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+// printf(Buffer);
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+
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+ return TRUE;
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+}
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+
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+//*----------------------------------------------------------------------------
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+//* \fn AT91F_CfgDevice
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+//* \brief This function is used to initialise MMC or SDCard Features
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+//*----------------------------------------------------------------------------
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+void AT91F_CfgDevice(void)
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+{
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+ // Init Device Structure
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+
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+ MCI_Device_Features.Relative_Card_Address = 0;
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+ MCI_Device_Features.Card_Inserted = AT91C_CARD_REMOVED;
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+ MCI_Device_Features.Max_Read_DataBlock_Length = 0;
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+ MCI_Device_Features.Max_Write_DataBlock_Length = 0;
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+ MCI_Device_Features.Read_Partial = 0;
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+ MCI_Device_Features.Write_Partial = 0;
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+ MCI_Device_Features.Erase_Block_Enable = 0;
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+ MCI_Device_Features.Sector_Size = 0;
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+ MCI_Device_Features.Memory_Capacity = 0;
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+
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+ MCI_Device_Desc.state = AT91C_MCI_IDLE;
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+ MCI_Device_Desc.SDCard_bus_width = AT91C_MCI_SCDBUS;
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+
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+ // Init AT91S_DataFlash Global Structure, by default AT45DB choosen !!!
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+ MCI_Device.pMCI_DeviceDesc = &MCI_Device_Desc;
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+ MCI_Device.pMCI_DeviceFeatures = &MCI_Device_Features;
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+
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+}
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+
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+//*----------------------------------------------------------------------------
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+//* \fn AT91F_Test_SDCard
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+//* \brief Configure MCI for SDCard and complete SDCard init, then jump to Test Functions
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+//*----------------------------------------------------------------------------
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+int AT91F_Test_SDCard(void)
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+{
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+ //////////////////////////////////////////////////////////
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+ //* For SDCard Init
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+ //////////////////////////////////////////////////////////
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+
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+ AT91F_MCI_Configure(AT91C_BASE_MCI,
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+ AT91C_MCI_DTOR_1MEGA_CYCLES,
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+ AT91C_MCI_MR_PDCMODE, // 15MHz for MCK = 60MHz (CLKDIV = 1)
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+ AT91C_MCI_SDCARD_4BITS_SLOTA);
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+
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+ if(AT91F_MCI_SDCard_Init(&MCI_Device) != AT91C_INIT_OK)
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+ return FALSE;
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+
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+ printf("\n\rINI OK: TST\n\r");
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+
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+ // Enter Main Tests
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+ return(AT91F_Test());
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+}
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+
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+//*----------------------------------------------------------------------------
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+//* \fn AT91F_MCI_Handler
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+//* \brief MCI Handler
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+//*----------------------------------------------------------------------------
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+extern "C" void AT91F_MCI_Handler(void);
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+
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+void AT91F_MCI_Handler(void)
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+{
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+ int status;
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+
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+ status = ( AT91C_BASE_MCI->MCI_SR & AT91C_BASE_MCI->MCI_IMR );
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+
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+ AT91F_MCI_Device_Handler(&MCI_Device,status);
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+}
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+
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+//*----------------------------------------------------------------------------
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+//* \fn main
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+//* \brief main function
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+//*----------------------------------------------------------------------------
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+int mci_main(void)
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+{
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+// printf("MCI Test\n\r");
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+
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+///////////////////////////////////////////////////////////////////////////////////////////
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+// MCI Init : common to MMC and SDCard
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+///////////////////////////////////////////////////////////////////////////////////////////
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+
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+// printf("\n\rInit MCI Interface\n\r");
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+
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+ // Set up PIO SDC_TYPE to switch on MMC/SDCard and not DataFlash Card
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+ AT91F_PIO_CfgOutput(AT91C_BASE_PIOB,AT91C_PIO_PB7);
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+ AT91F_PIO_SetOutput(AT91C_BASE_PIOB,AT91C_PIO_PB7);
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+
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+ // Init MCI for MMC and SDCard interface
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+ AT91F_MCI_CfgPIO();
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+ AT91F_MCI_CfgPMC();
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+ AT91F_PDC_Open(AT91C_BASE_PDC_MCI);
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+
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+ // Disable all the interrupts
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+ AT91C_BASE_MCI->MCI_IDR = 0xFFFFFFFF;
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+
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+ // Init MCI Device Structures
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+ AT91F_CfgDevice();
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+
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+ // Configure MCI interrupt
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+ AT91F_AIC_ConfigureIt(AT91C_BASE_AIC,
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+ AT91C_ID_MCI,
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+ AT91C_AIC_PRIOR_HIGHEST,
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+ AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE,
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+ AT91F_ASM_MCI_Handler);
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+
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+ // Enable MCI interrupt
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+ AT91F_AIC_EnableIt(AT91C_BASE_AIC,AT91C_ID_MCI);
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+
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+///////////////////////////////////////////////////////////////////////////////////////////
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+// Enter Test Menu
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+///////////////////////////////////////////////////////////////////////////////////////////
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+
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+ // Enable Receiver
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+ AT91F_US_EnableRx((AT91PS_USART) AT91C_BASE_DBGU);
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+
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+ if(AT91F_Test_SDCard() == TRUE)
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+ printf("\n\rTST OK\n\r");
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+ else
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+ printf("\n\rTST Fail\n\r");
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+ return(1);
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+}
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