mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-09-18 03:26:48 +03:00
16090fc49f
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7146 3c298f89-4303-0410-b956-a3cf2f4a3e73
44 lines
2.0 KiB
Diff
44 lines
2.0 KiB
Diff
diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/at91rm9200_devices.c linux-2.6.19.2/arch/arm/mach-at91rm9200/at91rm9200_devices.c
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--- linux-2.6.19.2.old/arch/arm/mach-at91rm9200/at91rm9200_devices.c 2007-05-01 13:08:02.000000000 +0200
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+++ linux-2.6.19.2/arch/arm/mach-at91rm9200/at91rm9200_devices.c 2007-05-09 12:59:58.000000000 +0200
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@@ -709,6 +709,10 @@
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* We need to drive the pin manually. Default is off (RTS is active low).
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*/
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at91_set_gpio_output(AT91_PIN_PA21, 1);
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+ at91_set_gpio_output(AT91_PIN_PB6, 1); /* DTR0 */
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+ at91_set_gpio_output(AT91_PIN_PB7, 1); /* RI0 */
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+ at91_set_gpio_input(AT91_PIN_PA19, 1); /* DCD0 */
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+ at91_set_deglitch(AT91_PIN_PA19, 1);
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}
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static struct resource uart1_resources[] = {
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@@ -820,6 +824,12 @@
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{
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at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
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at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
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+ at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
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+ at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
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+ at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
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+ at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */
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+ at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */
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+ at91_set_deglitch(AT91_PIN_PA24, 1);
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}
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struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
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diff -urN linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c linux-2.6.19.2/arch/arm/mach-at91rm9200/vlink_leds.c
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--- linux-2.6.19.2.old/arch/arm/mach-at91rm9200/vlink_leds.c 2007-05-01 13:08:03.000000000 +0200
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+++ linux-2.6.19.2/arch/arm/mach-at91rm9200/vlink_leds.c 2007-05-09 12:58:42.000000000 +0200
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@@ -114,12 +114,6 @@
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at91_set_gpio_input(AT91_PIN_PB8, 1); // JIGPRESENT
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at91_set_gpio_input(AT91_PIN_PB22, 1); // PWR_IND
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- at91_set_gpio_input(AT91_PIN_PA19, 1); // P1DTR
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- at91_set_gpio_input(AT91_PIN_PA24, 1); // P2DTR
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- at91_set_gpio_output(AT91_PIN_PB29, 1); // P2DCD
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- at91_set_gpio_output(AT91_PIN_PB2, 1); // P2RI
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- at91_set_gpio_output(AT91_PIN_PB6, 1); // P1DCD
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- at91_set_gpio_output(AT91_PIN_PB7, 1); // P1RI
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at91_set_gpio_input(AT91_PIN_PB27, 1); // UDB_CNX
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at91_set_gpio_output(AT91_PIN_PB28, 1); // UDB_PUP
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