mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-18 12:32:48 +02:00
d2f6c11460
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31126 3c298f89-4303-0410-b956-a3cf2f4a3e73
135 lines
3.9 KiB
Diff
135 lines
3.9 KiB
Diff
--- a/arch/mips/bcm47xx/nvram.c
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+++ b/arch/mips/bcm47xx/nvram.c
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@@ -27,7 +27,7 @@ static char nvram_buf[NVRAM_SPACE];
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static void early_nvram_init(void)
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{
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#ifdef CONFIG_BCM47XX_SSB
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- struct ssb_mipscore *mcore_ssb;
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+ struct ssb_chipcommon *ssb_cc;
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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struct bcma_drv_cc *bcma_cc;
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@@ -42,9 +42,9 @@ static void early_nvram_init(void)
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switch (bcm47xx_bus_type) {
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#ifdef CONFIG_BCM47XX_SSB
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case BCM47XX_BUS_TYPE_SSB:
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- mcore_ssb = &bcm47xx_bus.ssb.mipscore;
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- base = mcore_ssb->flash_window;
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- lim = mcore_ssb->flash_window_size;
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+ ssb_cc = &bcm47xx_bus.ssb.chipco;
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+ base = ssb_cc->pflash.window;
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+ lim = ssb_cc->pflash.window_size;
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break;
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#endif
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#ifdef CONFIG_BCM47XX_BCMA
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--- a/arch/mips/bcm47xx/wgt634u.c
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+++ b/arch/mips/bcm47xx/wgt634u.c
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@@ -156,10 +156,10 @@ static int __init wgt634u_init(void)
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SSB_CHIPCO_IRQ_GPIO);
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}
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- wgt634u_flash_data.width = mcore->flash_buswidth;
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- wgt634u_flash_resource.start = mcore->flash_window;
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- wgt634u_flash_resource.end = mcore->flash_window
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- + mcore->flash_window_size
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+ wgt634u_flash_data.width = mcore->pflash.buswidth;
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+ wgt634u_flash_resource.start = mcore->pflash.window;
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+ wgt634u_flash_resource.end = mcore->pflash.window
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+ + mcore->pflash.window_size
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- 1;
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return platform_add_devices(wgt634u_devices,
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ARRAY_SIZE(wgt634u_devices));
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--- a/drivers/ssb/driver_mipscore.c
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+++ b/drivers/ssb/driver_mipscore.c
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@@ -190,16 +190,34 @@ static void ssb_mips_flash_detect(struct
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{
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struct ssb_bus *bus = mcore->dev->bus;
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- mcore->flash_buswidth = 2;
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- if (bus->chipco.dev) {
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- mcore->flash_window = 0x1c000000;
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- mcore->flash_window_size = 0x02000000;
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+ /* When there is no chipcommon on the bus there is 4MB flash */
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+ if (!bus->chipco.dev) {
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+ pr_info("found parallel flash.\n");
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+ bus->chipco.flash_type = SSB_PFLASH;
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+ bus->chipco.pflash.window = SSB_FLASH1;
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+ bus->chipco.pflash.window_size = SSB_FLASH1_SZ;
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+ bus->chipco.pflash.buswidth = 2;
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+ return;
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+ }
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+
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+ switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) {
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+ case SSB_CHIPCO_FLASHT_STSER:
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+ case SSB_CHIPCO_FLASHT_ATSER:
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+ pr_info("serial flash not supported.\n");
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+ break;
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+ case SSB_CHIPCO_FLASHT_PARA:
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+ pr_info("found parallel flash.\n");
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+ bus->chipco.flash_type = SSB_PFLASH;
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+ bus->chipco.pflash.window = SSB_FLASH2;
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+ bus->chipco.pflash.window_size = SSB_FLASH2_SZ;
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if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
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- & SSB_CHIPCO_CFG_DS16) == 0)
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- mcore->flash_buswidth = 1;
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- } else {
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- mcore->flash_window = 0x1fc00000;
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- mcore->flash_window_size = 0x00400000;
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+ & SSB_CHIPCO_CFG_DS16) == 0)
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+ bus->chipco.pflash.buswidth = 1;
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+ else
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+ bus->chipco.pflash.buswidth = 2;
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+ break;
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+ default:
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+ pr_err("flash not supported.\n");
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}
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}
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--- a/include/linux/ssb/ssb_driver_chipcommon.h
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+++ b/include/linux/ssb/ssb_driver_chipcommon.h
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@@ -582,6 +582,18 @@ struct ssb_chipcommon_pmu {
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u32 crystalfreq; /* The active crystal frequency (in kHz) */
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};
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+#ifdef CONFIG_SSB_DRIVER_MIPS
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+enum ssb_flash_type {
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+ SSB_PFLASH,
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+};
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+
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+struct ssb_pflash {
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+ u8 buswidth;
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+ u32 window;
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+ u32 window_size;
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+};
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+#endif /* CONFIG_SSB_DRIVER_MIPS */
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+
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struct ssb_chipcommon {
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struct ssb_device *dev;
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u32 capabilities;
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@@ -589,6 +601,12 @@ struct ssb_chipcommon {
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/* Fast Powerup Delay constant */
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u16 fast_pwrup_delay;
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struct ssb_chipcommon_pmu pmu;
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+#ifdef CONFIG_SSB_DRIVER_MIPS
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+ enum ssb_flash_type flash_type;
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+ union {
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+ struct ssb_pflash pflash;
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+ };
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+#endif /* CONFIG_SSB_DRIVER_MIPS */
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};
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static inline bool ssb_chipco_available(struct ssb_chipcommon *cc)
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--- a/include/linux/ssb/ssb_driver_mips.h
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+++ b/include/linux/ssb/ssb_driver_mips.h
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@@ -19,10 +19,6 @@ struct ssb_mipscore {
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int nr_serial_ports;
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struct ssb_serial_port serial_ports[4];
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-
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- u8 flash_buswidth;
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- u32 flash_window;
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- u32 flash_window_size;
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};
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extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
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