mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-28 08:44:04 +02:00
3fd52fe91a
fixed: when nand read. do ecc check not just bad block. try to fix mmc driver. will keeping work on that. change: remove bootdelay when press [S] + power. create a xburst in mips/ folder. cleanup start.S cache.S cpu.c follow the new sturcture of u-boot. Signed-off-by: Xiangfu Liu <xiangfu@sharism.cc>
169 lines
3.3 KiB
ArmAsm
169 lines
3.3 KiB
ArmAsm
/*
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* Startup Code for MIPS32 XBURST CPU-core
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*
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* Copyright (c) 2010 Xiangfu Liu <xiangfu@sharism.cc>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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#include <version.h>
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#include <asm/regdef.h>
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#include <asm/mipsregs.h>
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#include <asm/addrspace.h>
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#include <asm/cacheops.h>
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#include <asm/jz4740.h>
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.set noreorder
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.globl _start
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.text
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_start:
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/* Initialize GOT pointer.
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*/
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bal 1f
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nop
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.word _GLOBAL_OFFSET_TABLE_
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1:
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move gp, ra
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lw t1, 0(ra)
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move gp, t1
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li t0, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
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la sp, 0(t0)
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la t9, board_init_f
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j t9
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nop
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/*
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* void relocate_code (addr_sp, gd, addr_moni)
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*
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* This "function" does not return, instead it continues in RAM
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* after relocating the monitor code.
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*
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* a0 = addr_sp
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* a1 = gd
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* a2 = destination address
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*/
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.globl relocate_code
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.ent relocate_code
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relocate_code:
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move sp, a0 /* Set new stack pointer */
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li t0, TEXT_BASE
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la t3, in_ram
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lw t2, -12(t3) /* t2 <-- uboot_end_data */
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move t1, a2
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/*
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* Fix GOT pointer:
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*
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* New GOT-PTR = (old GOT-PTR - TEXT_BASE) + Destination Address
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*/
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move t6, gp
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sub gp, TEXT_BASE
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add gp, a2 /* gp now adjusted */
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sub t6, gp, t6 /* t6 <-- relocation offset*/
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/*
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* t0 = source address
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* t1 = target address
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* t2 = source end address
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*/
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1:
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lw t3, 0(t0)
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sw t3, 0(t1)
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addu t0, 4
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ble t0, t2, 1b
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addu t1, 4 /* delay slot */
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/* If caches were enabled, we would have to flush them here.
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* flush d-cache */
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.set mips32
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li t0, KSEG0
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addi t1, t0, CONFIG_SYS_DCACHE_SIZE
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2:
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cache Index_Writeback_Inv_D, 0(t0)
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bne t0, t1, 2b
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addi t0, CONFIG_SYS_CACHELINE_SIZE
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sync
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/* flush i-cache */
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li t0, KSEG0
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addi t1, t0, CONFIG_SYS_ICACHE_SIZE
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3:
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cache Index_Invalidate_I, 0(t0)
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bne t0, t1, 3b
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addi t0, CONFIG_SYS_CACHELINE_SIZE
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/* Invalidate BTB */
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mfc0 t0, CP0_CONFIG, 7
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nop
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ori t0, 2
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mtc0 t0, CP0_CONFIG, 7
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nop
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.set mips0
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/* Jump to where we've relocated ourselves.
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*/
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addi t0, a2, in_ram - _start
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j t0
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nop
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.word uboot_end_data
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.word uboot_end
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.word num_got_entries
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in_ram:
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/* Now we want to update GOT */
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lw t3, -4(t0) /* t3 <-- num_got_entries */
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addi t4, gp, 8 /* Skipping first two entries. */
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li t2, 2
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1:
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lw t1, 0(t4)
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beqz t1, 2f
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add t1, t6
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sw t1, 0(t4)
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2:
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addi t2, 1
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blt t2, t3, 1b
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addi t4, 4 /* delay slot */
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/* Clear BSS */
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lw t1, -12(t0) /* t1 <-- uboot_end_data */
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lw t2, -8(t0) /* t2 <-- uboot_end */
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add t1, t6 /* adjust pointers */
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add t2, t6
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sub t1, 4
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1: addi t1, 4
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bltl t1, t2, 1b
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sw zero, 0(t1) /* delay slot */
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move a0, a1
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la t9, board_init_r
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j t9
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move a1, a2 /* delay slot */
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.end relocate_code
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