mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-09 23:23:09 +02:00
4e782d4c71
Huge thanks to Nico Huber for providing working patches ! git-svn-id: svn://svn.openwrt.org/openwrt/branches/buildroot-ng/openwrt@4117 3c298f89-4303-0410-b956-a3cf2f4a3e73
144 lines
5.2 KiB
Diff
144 lines
5.2 KiB
Diff
diff -Naurp -x brcm-boards -x pci linux-2.6.16.7-generic-patched/arch/mips/Kconfig linux-2.6.16.7-patched/arch/mips/Kconfig
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--- linux-2.6.16.7-generic-patched/arch/mips/Kconfig 2006-04-17 23:53:25.000000000 +0200
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+++ linux-2.6.16.7-patched/arch/mips/Kconfig 2006-07-05 15:21:58.000000000 +0200
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@@ -10,7 +10,16 @@ menu "Machine selection"
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choice
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prompt "System type"
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- default SGI_IP22
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+ default MIPS_BRCM
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+
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+config MIPS_BRCM
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+ bool "Support for the Broadcom boards"
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+ select SYS_SUPPORTS_32BIT_KERNEL
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+ select SYS_SUPPORTS_BIG_ENDIAN
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+ select SYS_HAS_CPU_MIPS32_R1
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+ select IRQ_CPU
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+ help
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+ This is a fmaily of boards based on the Broadcom MIPS32
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config MIPS_MTX1
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bool "Support for 4G Systems MTX-1 board"
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@@ -777,6 +786,7 @@ config TOSHIBA_RBTX4938
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endchoice
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+source "arch/mips/brcm-boards/bcm963xx/Kconfig"
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source "arch/mips/ddb5xxx/Kconfig"
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source "arch/mips/gt64120/ev64120/Kconfig"
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source "arch/mips/jazz/Kconfig"
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@@ -1046,7 +1056,7 @@ menu "CPU selection"
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choice
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prompt "CPU type"
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- default CPU_R4X00
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+ default CPU_MIPS32_R1
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config CPU_MIPS32_R1
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bool "MIPS32 Release 1"
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diff -Naurp -x brcm-boards -x pci linux-2.6.16.7-generic-patched/arch/mips/Makefile linux-2.6.16.7-patched/arch/mips/Makefile
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--- linux-2.6.16.7-generic-patched/arch/mips/Makefile 2006-04-17 23:53:25.000000000 +0200
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+++ linux-2.6.16.7-patched/arch/mips/Makefile 2006-07-05 15:21:58.000000000 +0200
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@@ -279,6 +279,20 @@ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/s
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#
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#
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+# Broadcom board
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+#
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+core-$(CONFIG_MIPS_BRCM) += arch/mips/brcm-boards/generic/ arch/mips/brcm-boards/bcm963xx/
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+core-$(CONFIG_MIPS_BRCM) += bcmdrivers/opensource/char/serial/impl1/
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+#core-$(CONFIG_MIPS_BRCM) += bcmdrivers/opensource/char/board/bcm963xx/impl1/
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+#core-$(CONFIG_MIPS_BRCM) += boardparms/bcm963xx/
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+cflags-$(CONFIG_MIPS_BRCM) += -Iinclude/asm-mips/mach-bcm963xx
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+cflags-$(CONFIG_MIPS_BRCM) += -Iarch/mips/brcm-boards/generic/include
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+cflags-$(CONFIG_MIPS_BRCM) += -Ibcmdrivers/opensource/include/bcm963xx
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+cflags-$(CONFIG_MIPS_BRCM) += -Iboardparms/bcm963xx
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+load-$(CONFIG_MIPS_BRCM) += 0xffffffff80010000
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+
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+
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+#
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# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
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#
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core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
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diff -Naurp -x brcm-boards -x pci linux-2.6.16.7-generic-patched/arch/mips/kernel/cpu-probe.c linux-2.6.16.7-patched/arch/mips/kernel/cpu-probe.c
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--- linux-2.6.16.7-generic-patched/arch/mips/kernel/cpu-probe.c 2006-04-17 23:53:25.000000000 +0200
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+++ linux-2.6.16.7-patched/arch/mips/kernel/cpu-probe.c 2006-07-05 15:21:58.000000000 +0200
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@@ -558,6 +558,25 @@ static inline void decode_configs(struct
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return;
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}
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+static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
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+{
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+ decode_configs(c);
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+ switch (c->processor_id & 0xff00) {
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+ case PRID_IMP_BCM6338:
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+ c->cputype = CPU_BCM6338;
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+ break;
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+ case PRID_IMP_BCM6345:
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+ c->cputype = CPU_BCM6345;
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+ break;
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+ case PRID_IMP_BCM6348:
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+ c->cputype = CPU_BCM6348;
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+ break;
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+ default:
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+ c->cputype = CPU_UNKNOWN;
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+ break;
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+ }
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+}
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+
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static inline void cpu_probe_mips(struct cpuinfo_mips *c)
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{
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decode_configs(c);
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@@ -691,6 +710,9 @@ __init void cpu_probe(void)
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case PRID_COMP_LEGACY:
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cpu_probe_legacy(c);
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break;
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+ case PRID_COMP_BROADCOM:
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+ cpu_probe_broadcom(c);
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+ break;
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case PRID_COMP_MIPS:
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cpu_probe_mips(c);
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break;
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diff -Naurp -x brcm-boards -x pci linux-2.6.16.7-generic-patched/arch/mips/kernel/proc.c linux-2.6.16.7-patched/arch/mips/kernel/proc.c
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--- linux-2.6.16.7-generic-patched/arch/mips/kernel/proc.c 2006-04-17 23:53:25.000000000 +0200
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+++ linux-2.6.16.7-patched/arch/mips/kernel/proc.c 2006-07-05 15:21:58.000000000 +0200
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@@ -81,6 +81,9 @@ static const char *cpu_name[] = {
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[CPU_VR4133] = "NEC VR4133",
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[CPU_VR4181] = "NEC VR4181",
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[CPU_VR4181A] = "NEC VR4181A",
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+ [CPU_BCM6338] = "BCM6338",
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+ [CPU_BCM6345] = "BCM6345",
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+ [CPU_BCM6348] = "BCM6348",
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[CPU_SR71000] = "Sandcraft SR71000",
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[CPU_PR4450] = "Philips PR4450",
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};
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diff -Naurp -x brcm-boards -x pci linux-2.6.16.7-generic-patched/arch/mips/mm/c-r4k.c linux-2.6.16.7-patched/arch/mips/mm/c-r4k.c
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--- linux-2.6.16.7-generic-patched/arch/mips/mm/c-r4k.c 2006-04-17 23:53:25.000000000 +0200
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+++ linux-2.6.16.7-patched/arch/mips/mm/c-r4k.c 2006-07-05 15:21:58.000000000 +0200
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@@ -889,6 +889,12 @@ static void __init probe_pcache(void)
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if (!(config & MIPS_CONF_M))
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panic("Don't know how to probe P-caches on this cpu.");
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+ if (c->cputype == CPU_BCM6338 || c->cputype == CPU_BCM6345 || c->cputype == CPU_BCM6348){
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+ printk("brcm mips: enabling icache and dcache...\n");
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+ /* Enable caches */
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+ write_c0_diag(read_c0_diag() | 0xC0000000);
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+ }
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+
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/*
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* So we seem to be a MIPS32 or MIPS64 CPU
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* So let's probe the I-cache ...
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diff -Naurp -x brcm-boards -x pci linux-2.6.16.7-generic-patched/arch/mips/mm/tlbex.c linux-2.6.16.7-patched/arch/mips/mm/tlbex.c
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--- linux-2.6.16.7-generic-patched/arch/mips/mm/tlbex.c 2006-04-17 23:53:25.000000000 +0200
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+++ linux-2.6.16.7-patched/arch/mips/mm/tlbex.c 2006-07-05 15:21:58.000000000 +0200
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@@ -858,6 +858,9 @@ static __init void build_tlb_write_entry
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case CPU_4KSC:
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case CPU_20KC:
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case CPU_25KF:
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+ case CPU_BCM6338:
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+ case CPU_BCM6345:
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+ case CPU_BCM6348:
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tlbw(p);
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break;
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