mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-01 13:05:18 +02:00
257 lines
8.7 KiB
C
257 lines
8.7 KiB
C
/*
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* linux/arch/mips/jz4740/proc.c
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*
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* /proc/jz/ procfs for jz4740 on-chip modules.
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*
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* Copyright (C) 2006 Ingenic Semiconductor Inc.
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* Author: <jlwei@ingenic.cn>
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/sysctl.h>
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#include <linux/proc_fs.h>
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#include <linux/page-flags.h>
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#include <asm/uaccess.h>
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#include <asm/pgtable.h>
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#include <asm/mach-jz4740/regs.h>
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#include <asm/mach-jz4740/clock.h>
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//#define DEBUG 1
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#undef DEBUG
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struct proc_dir_entry *proc_jz_root;
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/*
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* EMC Modules
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*/
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static int emc_read_proc (char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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int len = 0;
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len += sprintf (page+len, "SMCR(0-5): 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", REG_EMC_SMCR0, REG_EMC_SMCR1, REG_EMC_SMCR2, REG_EMC_SMCR3, REG_EMC_SMCR4);
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len += sprintf (page+len, "SACR(0-5): 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n", REG_EMC_SACR0, REG_EMC_SACR1, REG_EMC_SACR2, REG_EMC_SACR3, REG_EMC_SACR4);
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len += sprintf (page+len, "DMCR: 0x%08x\n", REG_EMC_DMCR);
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len += sprintf (page+len, "RTCSR: 0x%04x\n", REG_EMC_RTCSR);
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len += sprintf (page+len, "RTCOR: 0x%04x\n", REG_EMC_RTCOR);
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return len;
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}
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/*
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* Power Manager Module
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*/
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static int pmc_read_proc (char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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int len = 0;
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unsigned long lcr = REG_CPM_LCR;
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unsigned long clkgr = REG_CPM_CLKGR;
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len += sprintf (page+len, "Low Power Mode : %s\n",
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((lcr & CPM_LCR_LPM_MASK) == (CPM_LCR_LPM_IDLE)) ?
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"IDLE" : (((lcr & CPM_LCR_LPM_MASK) == (CPM_LCR_LPM_SLEEP)) ?
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"SLEEP" : "HIBERNATE"));
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len += sprintf (page+len, "Doze Mode : %s\n",
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(lcr & CPM_LCR_DOZE_ON) ? "on" : "off");
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if (lcr & CPM_LCR_DOZE_ON)
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len += sprintf (page+len, " duty : %d\n", (int)((lcr & CPM_LCR_DOZE_DUTY_MASK) >> CPM_LCR_DOZE_DUTY_BIT));
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len += sprintf (page+len, "IPU : %s\n",
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(clkgr & CPM_CLKGR_IPU) ? "stopped" : "running");
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len += sprintf (page+len, "DMAC : %s\n",
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(clkgr & CPM_CLKGR_DMAC) ? "stopped" : "running");
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len += sprintf (page+len, "UHC : %s\n",
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(clkgr & CPM_CLKGR_UHC) ? "stopped" : "running");
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len += sprintf (page+len, "UDC : %s\n",
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(clkgr & CPM_CLKGR_UDC) ? "stopped" : "running");
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len += sprintf (page+len, "LCD : %s\n",
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(clkgr & CPM_CLKGR_LCD) ? "stopped" : "running");
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len += sprintf (page+len, "CIM : %s\n",
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(clkgr & CPM_CLKGR_CIM) ? "stopped" : "running");
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len += sprintf (page+len, "SADC : %s\n",
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(clkgr & CPM_CLKGR_SADC) ? "stopped" : "running");
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len += sprintf (page+len, "MSC : %s\n",
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(clkgr & CPM_CLKGR_MSC) ? "stopped" : "running");
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len += sprintf (page+len, "AIC1 : %s\n",
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(clkgr & CPM_CLKGR_AIC1) ? "stopped" : "running");
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len += sprintf (page+len, "AIC2 : %s\n",
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(clkgr & CPM_CLKGR_AIC2) ? "stopped" : "running");
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len += sprintf (page+len, "SSI : %s\n",
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(clkgr & CPM_CLKGR_SSI) ? "stopped" : "running");
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len += sprintf (page+len, "I2C : %s\n",
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(clkgr & CPM_CLKGR_I2C) ? "stopped" : "running");
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len += sprintf (page+len, "RTC : %s\n",
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(clkgr & CPM_CLKGR_RTC) ? "stopped" : "running");
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len += sprintf (page+len, "TCU : %s\n",
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(clkgr & CPM_CLKGR_TCU) ? "stopped" : "running");
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len += sprintf (page+len, "UART1 : %s\n",
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(clkgr & CPM_CLKGR_UART1) ? "stopped" : "running");
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len += sprintf (page+len, "UART0 : %s\n",
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(clkgr & CPM_CLKGR_UART0) ? "stopped" : "running");
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return len;
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}
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static int pmc_write_proc(struct file *file, const char *buffer, unsigned long count, void *data)
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{
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REG_CPM_CLKGR = simple_strtoul(buffer, 0, 16);
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return count;
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}
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/*
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* Clock Generation Module
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*/
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#define TO_MHZ(x) (x/1000000),(x%1000000)/10000
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#define TO_KHZ(x) (x/1000),(x%1000)/10
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static int cgm_read_proc (char *page, char **start, off_t off,
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int count, int *eof, void *data)
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{
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int len = 0;
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unsigned int cppcr = REG_CPM_CPPCR; /* PLL Control Register */
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unsigned int cpccr = REG_CPM_CPCCR; /* Clock Control Register */
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unsigned int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
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unsigned int od[4] = {1, 2, 2, 4};
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len += sprintf (page+len, "CPPCR : 0x%08x\n", cppcr);
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len += sprintf (page+len, "CPCCR : 0x%08x\n", cpccr);
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len += sprintf (page+len, "PLL : %s\n",
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(cppcr & CPM_CPPCR_PLLEN) ? "ON" : "OFF");
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len += sprintf (page+len, "m:n:o : %d:%d:%d\n",
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__cpm_get_pllm() + 2,
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__cpm_get_plln() + 2,
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od[__cpm_get_pllod()]
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);
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len += sprintf (page+len, "C:H:M:P : %d:%d:%d:%d\n",
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div[__cpm_get_cdiv()],
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div[__cpm_get_hdiv()],
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div[__cpm_get_mdiv()],
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div[__cpm_get_pdiv()]
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);
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len += sprintf (page+len, "PLL Freq : %3d.%02d MHz\n", TO_MHZ(__cpm_get_pllout()));
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len += sprintf (page+len, "CCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_cclk()));
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len += sprintf (page+len, "HCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_hclk()));
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len += sprintf (page+len, "MCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_mclk()));
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len += sprintf (page+len, "PCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_pclk()));
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len += sprintf (page+len, "LCDCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_lcdclk()));
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len += sprintf (page+len, "PIXCLK : %3d.%02d KHz\n", TO_KHZ(__cpm_get_pixclk()));
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len += sprintf (page+len, "I2SCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_i2sclk()));
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len += sprintf (page+len, "USBCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_usbclk()));
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len += sprintf (page+len, "MSCCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_mscclk()));
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len += sprintf (page+len, "EXTALCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_extalclk()));
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len += sprintf (page+len, "RTCCLK : %3d.%02d MHz\n", TO_MHZ(__cpm_get_rtcclk()));
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return len;
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}
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static int cgm_write_proc(struct file *file, const char *buffer, unsigned long count, void *data)
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{
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REG_CPM_CPCCR = simple_strtoul(buffer, 0, 16);
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return count;
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}
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extern void local_flush_tlb_all(void);
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/* CP0 hazard avoidance. */
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#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \
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"nop; nop; nop; nop; nop; nop;\n\t" \
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".set reorder\n\t")
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void show_tlb(void)
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{
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#define ASID_MASK 0xFF
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unsigned long flags;
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unsigned int old_ctx;
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unsigned int entry;
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unsigned int entrylo0, entrylo1, entryhi;
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unsigned int pagemask;
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local_irq_save(flags);
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/* Save old context */
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old_ctx = (read_c0_entryhi() & 0xff);
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printk("TLB content:\n");
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entry = 0;
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while(entry < 32) {
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write_c0_index(entry);
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BARRIER;
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tlb_read();
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BARRIER;
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entryhi = read_c0_entryhi();
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entrylo0 = read_c0_entrylo0();
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entrylo1 = read_c0_entrylo1();
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pagemask = read_c0_pagemask();
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printk("%02d: ASID=%02d%s VA=0x%08x ", entry, entryhi & ASID_MASK, (entrylo0 & entrylo1 & 1) ? "(G)" : " ", entryhi & ~ASID_MASK);
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printk("PA0=0x%08x C0=%x %s%s%s\n", (entrylo0>>6)<<12, (entrylo0>>3) & 7, (entrylo0 & 4) ? "Dirty " : "", (entrylo0 & 2) ? "Valid " : "Invalid ", (entrylo0 & 1) ? "Global" : "");
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printk("\t\t\t PA1=0x%08x C1=%x %s%s%s\n", (entrylo1>>6)<<12, (entrylo1>>3) & 7, (entrylo1 & 4) ? "Dirty " : "", (entrylo1 & 2) ? "Valid " : "Invalid ", (entrylo1 & 1) ? "Global" : "");
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printk("\t\tpagemask=0x%08x", pagemask);
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printk("\tentryhi=0x%08x\n", entryhi);
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printk("\t\tentrylo0=0x%08x", entrylo0);
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printk("\tentrylo1=0x%08x\n", entrylo1);
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entry++;
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}
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BARRIER;
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write_c0_entryhi(old_ctx);
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local_irq_restore(flags);
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}
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/*
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* /proc/jz/xxx entry
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*
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*/
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static int __init jz_proc_init(void)
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{
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struct proc_dir_entry *res;
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proc_jz_root = proc_mkdir("jz", 0);
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/* External Memory Controller */
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res = create_proc_entry("emc", 0644, proc_jz_root);
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if (res) {
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res->read_proc = emc_read_proc;
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res->write_proc = NULL;
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res->data = NULL;
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}
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/* Power Management Controller */
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res = create_proc_entry("pmc", 0644, proc_jz_root);
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if (res) {
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res->read_proc = pmc_read_proc;
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res->write_proc = pmc_write_proc;
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res->data = NULL;
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}
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/* Clock Generation Module */
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res = create_proc_entry("cgm", 0644, proc_jz_root);
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if (res) {
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res->read_proc = cgm_read_proc;
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res->write_proc = cgm_write_proc;
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res->data = NULL;
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}
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return 0;
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}
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__initcall(jz_proc_init);
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