mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-28 11:26:26 +02:00
e4a3634c00
kernel compiles fine, but graphic support is broken to test new kernel version, change target/linux/olpc/Makefile from .23.16 to .24 git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10493 3c298f89-4303-0410-b956-a3cf2f4a3e73
243 lines
6.6 KiB
C
243 lines
6.6 KiB
C
/* This header file defines the registers and suspend/resume
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structures for the Geode GX and LX. The lxfb driver defines
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_GEODELX_ before including this file, which will unlock the
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extra registers that are only valid for LX.
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*/
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#ifndef _GEODE_REGS_H_
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#define _GEODE_REGS_H_
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/* MSRs */
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#define GX_VP_MSR_PAD_SELECT 0xC0002011
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#define LX_VP_MSR_PAD_SELECT 0x48000011
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#define GEODE_MSR_GLCP_DOTPLL 0x4c000015
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#define GLCP_DOTPLL_RESET (1 << 0)
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#define GLCP_DOTPLL_BYPASS (1 << 15)
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#define GLCP_DOTPLL_HALFPIX (1 << 24)
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#define GLCP_DOTPLL_LOCK (1 << 25)
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/* Registers */
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#define VP_FP_START 0x400
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#ifdef _GEODELX_
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#define GP_REG_SIZE 0x7C
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#define DC_REG_SIZE 0xF0
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#define VP_REG_SIZE 0x158
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#define FP_REG_SIZE 0x70
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#else
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#define GP_REG_SIZE 0x50
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#define DC_REG_SIZE 0x90
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#define VP_REG_SIZE 0x138
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#define FP_REG_SIZE 0x70
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#endif
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#define DC_PAL_SIZE 0x105
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struct geoderegs {
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struct {
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u64 padsel;
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u64 dotpll;
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#ifdef _GEODELX_
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u64 dfglcfg;
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u64 dcspare;
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#else
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u64 rstpll;
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#endif
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} msr;
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union {
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unsigned char b[GP_REG_SIZE];
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struct {
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u32 dst_offset; /* 0x00 */
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u32 src_offset; /* 0x04 */
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u32 stride; /* 0x08 */
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u32 wid_height; /* 0x0C */
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u32 src_color_fg; /* 0x10 */
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u32 src_color_bg; /* 0x14 */
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u32 pat_color_0; /* 0x18 */
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u32 pat_color_1; /* 0x1C */
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u32 pat_color_2; /* 0x20 */
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u32 pat_color_3; /* 0x24 */
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u32 pat_color_4; /* 0x28 */
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u32 pat_color_5; /* 0x2C */
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u32 pat_data_0; /* 0x30 */
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u32 pat_data_1; /* 0x34 */
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u32 raster_mode; /* 0x38 */
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u32 vector_mode; /* 0x3C */
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u32 blt_mode; /* 0x40 */
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u32 blit_status; /* 0x4C */
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u32 hst_src; /* 0x48 */
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u32 base_offset; /* 0x4C */
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#ifdef _GEODELX_
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u32 cmd_top; /* 0x50 */
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u32 cmd_bot; /* 0x54 */
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u32 cmd_read; /* 0x58 */
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u32 cmd_write; /* 0x5C */
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u32 ch3_offset; /* 0x60 */
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u32 ch3_mode_str; /* 0x64 */
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u32 ch3_width; /* 0x68 */
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u32 ch3_hsrc; /* 0x6C */
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u32 lut_index; /* 0x70 */
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u32 lut_data; /* 0x74 */
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u32 int_cntrl; /* 0x78 */
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#endif
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} r;
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} gp;
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union {
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unsigned char b[DC_REG_SIZE];
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struct {
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u32 unlock; /* 0x00 */
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u32 gcfg; /* 0x04 */
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u32 dcfg; /* 0x08 */
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u32 arb; /* 0x0C */
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u32 fb_st_offset; /* 0x10 */
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u32 cb_st_offset; /* 0x14 */
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u32 curs_st_offset; /* 0x18 */
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u32 icon_st_offset; /* 0x1C */
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u32 vid_y_st_offset; /* 0x20 */
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u32 vid_u_st_offset; /* 0x24 */
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u32 vid_v_st_offset; /* 0x28 */
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u32 dctop; /* 0x2c */
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u32 line_size; /* 0x30 */
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u32 gfx_pitch; /* 0x34 */
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u32 vid_yuv_pitch; /* 0x38 */
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u32 rsvd2; /* 0x3C */
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u32 h_active_timing; /* 0x40 */
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u32 h_blank_timing; /* 0x44 */
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u32 h_sync_timing; /* 0x48 */
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u32 rsvd3; /* 0x4C */
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u32 v_active_timing; /* 0x50 */
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u32 v_blank_timing; /* 0x54 */
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u32 v_sync_timing; /* 0x58 */
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u32 fbactive; /* 0x5C */
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u32 dc_cursor_x; /* 0x60 */
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u32 dc_cursor_y; /* 0x64 */
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u32 dc_icon_x; /* 0x68 */
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u32 dc_line_cnt; /* 0x6C */
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u32 rsvd5; /* 0x70 - palette address */
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u32 rsvd6; /* 0x74 - palette data */
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u32 dfifo_diag; /* 0x78 */
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u32 cfifo_diag; /* 0x7C */
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u32 dc_vid_ds_delta; /* 0x80 */
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u32 gliu0_mem_offset; /* 0x84 */
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u32 dv_ctl; /* 0x88 - added by LX */
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u32 dv_acc; /* 0x8C */
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#ifdef _GEODELX_
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u32 gfx_scale;
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u32 irq_filt_ctl;
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u32 filt_coeff1;
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u32 filt_coeff2;
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u32 vbi_event_ctl;
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u32 vbi_odd_ctl;
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u32 vbi_hor;
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u32 vbi_ln_odd;
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u32 vbi_ln_event;
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u32 vbi_pitch;
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u32 clr_key;
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u32 clr_key_mask;
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u32 clr_key_x;
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u32 clr_key_y;
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u32 irq;
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u32 rsvd8;
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u32 genlk_ctrl;
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u32 vid_even_y_st_offset; /* 0xD8 */
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u32 vid_even_u_st_offset; /* 0xDC */
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u32 vid_even_v_st_offset; /* 0xE0 */
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u32 v_active_even_timing; /* 0xE4 */
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u32 v_blank_even_timing; /* 0xE8 */
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u32 v_sync_even_timing; /* 0xEC */
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#endif
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} r;
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} dc;
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union {
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unsigned char b[VP_REG_SIZE];
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struct {
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u64 vcfg; /* 0x00 */
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u64 dcfg; /* 0x08 */
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u64 vx; /* 0x10 */
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u64 vy; /* 0x18 */
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u64 vs; /* 0x20 */
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u64 vck; /* 0x28 */
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u64 vcm; /* 0x30 */
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u64 rsvd1; /* 0x38 - Gamma address*/
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u64 rsvd2; /* 0x40 - Gamma data*/
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u64 rsvd3; /* 0x48 */
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u64 misc; /* 0x50 */
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u64 ccs; /* 0x58 */
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u64 rsvd4[3]; /* 0x60-0x70 */
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u64 vdc; /* 0x78 */
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u64 vco; /* 0x80 */
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u64 crc; /* 0x88 */
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u64 crc32; /* 0x90 */
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u64 vde; /* 0x98 */
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u64 cck; /* 0xA0 */
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u64 ccm; /* 0xA8 */
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u64 cc1; /* 0xB0 */
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u64 cc2; /* 0xB8 */
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u64 a1x; /* 0xC0 */
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u64 a1y; /* 0xC8 */
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u64 a1c; /* 0xD0 */
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u64 a1t; /* 0xD8 */
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u64 a2x; /* 0xE0 */
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u64 a2y; /* 0xE8 */
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u64 a2c; /* 0xF0 */
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u64 a2t; /* 0xF8 */
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u64 a3x; /* 0x100 */
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u64 a3y; /* 0x108 */
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u64 a3c; /* 0x110 */
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u64 a3t; /* 0x118 */
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u64 vrr; /* 0x120 */
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u64 awt; /* 0x128 */
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u64 vtm; /* 0x130 */
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#ifdef _GEODELX_
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u64 vye; /* 0x138 */
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u64 a1ye; /* 0x140 */
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u32 a2ye; /* 0x148 */
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u32 a3ye; /* 0x150 */
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#endif
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} r;
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} vp;
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union {
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unsigned char b[FP_REG_SIZE];
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struct {
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u64 pt1; /* 0x400 */
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u64 pt2; /* 0x408 */
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u64 pm; /* 0x410 */
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u64 dfc; /* 0x418 */
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u64 blfsr; /* 0x420 */
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u64 rlfsr; /* 0x428 */
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u64 fmi; /* 0x430 */
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u64 fmd; /* 0x438 */
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u64 rsvd; /* 0x440 */
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u64 dca; /* 0x448 */
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u64 dmd; /* 0x450 */
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u64 crc; /* 0x458 */
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u64 fbb; /* 0x460 */
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u64 crc32; /* 0x468 */
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} r;
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} fp;
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u32 pal[DC_PAL_SIZE];
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u32 gamma[256];
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};
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#endif
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