mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-08-20 13:01:11 +03:00
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16465 3c298f89-4303-0410-b956-a3cf2f4a3e73
2128 lines
55 KiB
Diff
2128 lines
55 KiB
Diff
From 7cc9c853cf4657bc971a3bf8736fa0412f23eea2 Mon Sep 17 00:00:00 2001
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From: Mike A. Chan <mikechan@google.com>
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Date: Tue, 14 Oct 2008 19:46:11 -0700
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Subject: [PATCH 118/134] [ARM] goldfish: Add goldfish platform.
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MIME-Version: 1.0
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Content-Type: text/plain; charset=utf-8
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Content-Transfer-Encoding: 8bit
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Signed-off-by: Mike A. Chan <mikechan@google.com>
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Signed-off-by: Arve Hjønnevåg <arve@android.com>
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---
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arch/arm/Kconfig | 10 +
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arch/arm/Makefile | 1 +
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arch/arm/configs/goldfish_defconfig | 1166 +++++++++++++++++++++
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arch/arm/mach-goldfish/Kconfig | 11 +
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arch/arm/mach-goldfish/Makefile | 9 +
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arch/arm/mach-goldfish/Makefile.boot | 4 +
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arch/arm/mach-goldfish/board-goldfish.c | 122 +++
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arch/arm/mach-goldfish/include/mach/dma.h | 1 +
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arch/arm/mach-goldfish/include/mach/entry-macro.S | 34 +
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arch/arm/mach-goldfish/include/mach/hardware.h | 44 +
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arch/arm/mach-goldfish/include/mach/io.h | 24 +
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arch/arm/mach-goldfish/include/mach/irqs.h | 24 +
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arch/arm/mach-goldfish/include/mach/memory.h | 35 +
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arch/arm/mach-goldfish/include/mach/system.h | 30 +
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arch/arm/mach-goldfish/include/mach/timer.h | 28 +
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arch/arm/mach-goldfish/include/mach/timex.h | 24 +
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arch/arm/mach-goldfish/include/mach/uncompress.h | 40 +
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arch/arm/mach-goldfish/include/mach/vmalloc.h | 21 +
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arch/arm/mach-goldfish/pdev_bus.c | 222 ++++
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arch/arm/mach-goldfish/timer.c | 147 +++
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20 files changed, 1997 insertions(+), 0 deletions(-)
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create mode 100644 arch/arm/configs/goldfish_defconfig
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create mode 100644 arch/arm/mach-goldfish/Kconfig
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create mode 100644 arch/arm/mach-goldfish/Makefile
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create mode 100644 arch/arm/mach-goldfish/Makefile.boot
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create mode 100644 arch/arm/mach-goldfish/board-goldfish.c
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create mode 100644 arch/arm/mach-goldfish/include/mach/dma.h
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create mode 100644 arch/arm/mach-goldfish/include/mach/entry-macro.S
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create mode 100644 arch/arm/mach-goldfish/include/mach/hardware.h
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create mode 100644 arch/arm/mach-goldfish/include/mach/io.h
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create mode 100644 arch/arm/mach-goldfish/include/mach/irqs.h
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create mode 100644 arch/arm/mach-goldfish/include/mach/memory.h
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create mode 100644 arch/arm/mach-goldfish/include/mach/system.h
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create mode 100644 arch/arm/mach-goldfish/include/mach/timer.h
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create mode 100644 arch/arm/mach-goldfish/include/mach/timex.h
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create mode 100644 arch/arm/mach-goldfish/include/mach/uncompress.h
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create mode 100644 arch/arm/mach-goldfish/include/mach/vmalloc.h
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create mode 100644 arch/arm/mach-goldfish/pdev_bus.c
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create mode 100644 arch/arm/mach-goldfish/timer.c
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--- a/arch/arm/Kconfig
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+++ b/arch/arm/Kconfig
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@@ -206,6 +206,14 @@ config ARCH_AAEC2000
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help
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This enables support for systems based on the Agilent AAEC-2000
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+config ARCH_GOLDFISH
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+ bool "Goldfish"
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+ select CPU_ARM926T
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+ select GENERIC_TIME
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+ select GENERIC_CLOCKEVENTS
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+ help
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+ Support for Goldfish Virtual Platform.
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+
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config ARCH_INTEGRATOR
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bool "ARM Ltd. Integrator family"
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select ARM_AMBA
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@@ -620,6 +628,8 @@ config ARCH_W90X900
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endchoice
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+source "arch/arm/mach-goldfish/Kconfig"
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+
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source "arch/arm/mach-clps711x/Kconfig"
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source "arch/arm/mach-ep93xx/Kconfig"
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--- a/arch/arm/Makefile
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+++ b/arch/arm/Makefile
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@@ -138,6 +138,7 @@ endif
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machine-$(CONFIG_ARCH_IMX) := imx
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machine-$(CONFIG_ARCH_H720X) := h720x
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machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
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+ machine-$(CONFIG_ARCH_GOLDFISH) := goldfish
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machine-$(CONFIG_ARCH_REALVIEW) := realview
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machine-$(CONFIG_ARCH_AT91) := at91
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machine-$(CONFIG_ARCH_EP93XX) := ep93xx
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--- /dev/null
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+++ b/arch/arm/configs/goldfish_defconfig
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@@ -0,0 +1,1166 @@
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+#
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+# Automatically generated make config: don't edit
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+# Linux kernel version: 2.6.29
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+# Wed Apr 8 20:40:44 2009
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+#
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+CONFIG_ARM=y
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+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
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+# CONFIG_GENERIC_GPIO is not set
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+CONFIG_GENERIC_TIME=y
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+CONFIG_GENERIC_CLOCKEVENTS=y
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+CONFIG_MMU=y
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+# CONFIG_NO_IOPORT is not set
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+CONFIG_GENERIC_HARDIRQS=y
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+CONFIG_STACKTRACE_SUPPORT=y
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+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
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+CONFIG_LOCKDEP_SUPPORT=y
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+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
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+CONFIG_HARDIRQS_SW_RESEND=y
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+CONFIG_GENERIC_IRQ_PROBE=y
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+CONFIG_RWSEM_GENERIC_SPINLOCK=y
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+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
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+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
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+CONFIG_GENERIC_HWEIGHT=y
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+CONFIG_GENERIC_CALIBRATE_DELAY=y
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+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
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+CONFIG_VECTORS_BASE=0xffff0000
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+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
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+
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+#
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+# General setup
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+#
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+CONFIG_EXPERIMENTAL=y
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+CONFIG_BROKEN_ON_SMP=y
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+CONFIG_INIT_ENV_ARG_LIMIT=32
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+CONFIG_LOCALVERSION=""
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+CONFIG_LOCALVERSION_AUTO=y
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+CONFIG_SWAP=y
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+CONFIG_SYSVIPC=y
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+CONFIG_SYSVIPC_SYSCTL=y
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+# CONFIG_POSIX_MQUEUE is not set
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+# CONFIG_BSD_PROCESS_ACCT is not set
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+# CONFIG_TASKSTATS is not set
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+# CONFIG_AUDIT is not set
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+
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+#
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+# RCU Subsystem
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+#
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+CONFIG_CLASSIC_RCU=y
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+# CONFIG_TREE_RCU is not set
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+# CONFIG_PREEMPT_RCU is not set
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+# CONFIG_TREE_RCU_TRACE is not set
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+# CONFIG_PREEMPT_RCU_TRACE is not set
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+CONFIG_IKCONFIG=y
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+CONFIG_IKCONFIG_PROC=y
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+CONFIG_LOG_BUF_SHIFT=16
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+# CONFIG_GROUP_SCHED is not set
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+# CONFIG_CGROUPS is not set
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+# CONFIG_SYSFS_DEPRECATED_V2 is not set
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+# CONFIG_RELAY is not set
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+CONFIG_NAMESPACES=y
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+# CONFIG_UTS_NS is not set
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+# CONFIG_IPC_NS is not set
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+# CONFIG_USER_NS is not set
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+# CONFIG_PID_NS is not set
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+# CONFIG_NET_NS is not set
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+CONFIG_BLK_DEV_INITRD=y
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+CONFIG_INITRAMFS_SOURCE=""
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+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
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+CONFIG_SYSCTL=y
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+CONFIG_ANON_INODES=y
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+CONFIG_PANIC_TIMEOUT=0
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+# CONFIG_EMBEDDED is not set
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+CONFIG_UID16=y
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+CONFIG_SYSCTL_SYSCALL=y
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+CONFIG_KALLSYMS=y
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+# CONFIG_KALLSYMS_ALL is not set
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+# CONFIG_KALLSYMS_EXTRA_PASS is not set
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+CONFIG_HOTPLUG=y
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+CONFIG_PRINTK=y
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+CONFIG_BUG=y
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+CONFIG_ELF_CORE=y
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+CONFIG_BASE_FULL=y
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+CONFIG_FUTEX=y
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+CONFIG_EPOLL=y
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+CONFIG_SIGNALFD=y
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+CONFIG_TIMERFD=y
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+CONFIG_EVENTFD=y
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+CONFIG_SHMEM=y
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+CONFIG_AIO=y
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+CONFIG_ASHMEM=y
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+CONFIG_VM_EVENT_COUNTERS=y
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+CONFIG_COMPAT_BRK=y
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+CONFIG_SLAB=y
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+# CONFIG_SLUB is not set
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+# CONFIG_SLOB is not set
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+# CONFIG_PROFILING is not set
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+CONFIG_HAVE_OPROFILE=y
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+CONFIG_HAVE_KPROBES=y
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+CONFIG_HAVE_KRETPROBES=y
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+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
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+CONFIG_SLABINFO=y
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+CONFIG_RT_MUTEXES=y
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+CONFIG_BASE_SMALL=0
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+# CONFIG_MODULES is not set
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+CONFIG_BLOCK=y
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+# CONFIG_LBD is not set
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+# CONFIG_BLK_DEV_IO_TRACE is not set
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+# CONFIG_BLK_DEV_BSG is not set
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+# CONFIG_BLK_DEV_INTEGRITY is not set
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+
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+#
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+# IO Schedulers
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+#
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+CONFIG_IOSCHED_NOOP=y
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+CONFIG_IOSCHED_AS=y
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+CONFIG_IOSCHED_DEADLINE=y
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+CONFIG_IOSCHED_CFQ=y
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+CONFIG_DEFAULT_AS=y
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+# CONFIG_DEFAULT_DEADLINE is not set
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+# CONFIG_DEFAULT_CFQ is not set
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+# CONFIG_DEFAULT_NOOP is not set
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+CONFIG_DEFAULT_IOSCHED="anticipatory"
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+CONFIG_FREEZER=y
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+
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+#
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+# System Type
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+#
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+# CONFIG_ARCH_AAEC2000 is not set
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+CONFIG_ARCH_GOLDFISH=y
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+# CONFIG_ARCH_INTEGRATOR is not set
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+# CONFIG_ARCH_REALVIEW is not set
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+# CONFIG_ARCH_VERSATILE is not set
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+# CONFIG_ARCH_AT91 is not set
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+# CONFIG_ARCH_CLPS711X is not set
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+# CONFIG_ARCH_EBSA110 is not set
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+# CONFIG_ARCH_EP93XX is not set
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+# CONFIG_ARCH_FOOTBRIDGE is not set
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+# CONFIG_ARCH_NETX is not set
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+# CONFIG_ARCH_H720X is not set
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+# CONFIG_ARCH_IMX is not set
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+# CONFIG_ARCH_IOP13XX is not set
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+# CONFIG_ARCH_IOP32X is not set
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+# CONFIG_ARCH_IOP33X is not set
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+# CONFIG_ARCH_IXP23XX is not set
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+# CONFIG_ARCH_IXP2000 is not set
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+# CONFIG_ARCH_IXP4XX is not set
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+# CONFIG_ARCH_L7200 is not set
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+# CONFIG_ARCH_KIRKWOOD is not set
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+# CONFIG_ARCH_KS8695 is not set
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+# CONFIG_ARCH_NS9XXX is not set
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+# CONFIG_ARCH_LOKI is not set
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+# CONFIG_ARCH_MV78XX0 is not set
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+# CONFIG_ARCH_MXC is not set
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+# CONFIG_ARCH_ORION5X is not set
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+# CONFIG_ARCH_PNX4008 is not set
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+# CONFIG_ARCH_PXA is not set
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+# CONFIG_ARCH_RPC is not set
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+# CONFIG_ARCH_SA1100 is not set
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+# CONFIG_ARCH_S3C2410 is not set
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+# CONFIG_ARCH_S3C64XX is not set
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+# CONFIG_ARCH_SHARK is not set
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+# CONFIG_ARCH_LH7A40X is not set
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+# CONFIG_ARCH_DAVINCI is not set
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+# CONFIG_ARCH_OMAP is not set
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+# CONFIG_ARCH_MSM is not set
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+# CONFIG_ARCH_W90X900 is not set
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+
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+#
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+# Goldfish Options
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+#
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+CONFIG_MACH_GOLDFISH=y
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+
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+#
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+# Processor Type
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+#
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+CONFIG_CPU_32=y
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+CONFIG_CPU_ARM926T=y
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+CONFIG_CPU_32v5=y
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+CONFIG_CPU_ABRT_EV5TJ=y
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+CONFIG_CPU_PABRT_NOIFAR=y
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+CONFIG_CPU_CACHE_VIVT=y
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+CONFIG_CPU_COPY_V4WB=y
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+CONFIG_CPU_TLB_V4WBI=y
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+CONFIG_CPU_CP15=y
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+CONFIG_CPU_CP15_MMU=y
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+
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+#
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+# Processor Features
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+#
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+CONFIG_ARM_THUMB=y
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+# CONFIG_CPU_ICACHE_DISABLE is not set
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+# CONFIG_CPU_DCACHE_DISABLE is not set
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+# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
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+# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
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+# CONFIG_OUTER_CACHE is not set
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+
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+#
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+# Bus support
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+#
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+# CONFIG_PCI_SYSCALL is not set
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+# CONFIG_ARCH_SUPPORTS_MSI is not set
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+# CONFIG_PCCARD is not set
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+
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+#
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+# Kernel Features
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+#
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+CONFIG_TICK_ONESHOT=y
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+CONFIG_NO_HZ=y
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+CONFIG_HIGH_RES_TIMERS=y
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+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
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+CONFIG_VMSPLIT_3G=y
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+# CONFIG_VMSPLIT_2G is not set
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+# CONFIG_VMSPLIT_1G is not set
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+CONFIG_PAGE_OFFSET=0xC0000000
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+# CONFIG_PREEMPT is not set
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+CONFIG_HZ=100
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+CONFIG_AEABI=y
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+# CONFIG_OABI_COMPAT is not set
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+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
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+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
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+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
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+CONFIG_SELECT_MEMORY_MODEL=y
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+CONFIG_FLATMEM_MANUAL=y
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+# CONFIG_DISCONTIGMEM_MANUAL is not set
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+# CONFIG_SPARSEMEM_MANUAL is not set
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+CONFIG_FLATMEM=y
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+CONFIG_FLAT_NODE_MEM_MAP=y
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+CONFIG_PAGEFLAGS_EXTENDED=y
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+CONFIG_SPLIT_PTLOCK_CPUS=4096
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+# CONFIG_PHYS_ADDR_T_64BIT is not set
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+CONFIG_ZONE_DMA_FLAG=0
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+CONFIG_VIRT_TO_BUS=y
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+CONFIG_UNEVICTABLE_LRU=y
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+CONFIG_ALIGNMENT_TRAP=y
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+
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+#
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+# Boot options
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+#
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+CONFIG_ZBOOT_ROM_TEXT=0x0
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+CONFIG_ZBOOT_ROM_BSS=0x0
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+CONFIG_CMDLINE=""
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+# CONFIG_XIP_KERNEL is not set
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+# CONFIG_KEXEC is not set
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+
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+#
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+# CPU Power Management
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+#
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+# CONFIG_CPU_IDLE is not set
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+
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+#
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+# Floating point emulation
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+#
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+
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+#
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+# At least one emulation must be selected
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+#
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+CONFIG_VFP=y
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+
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+#
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+# Userspace binary formats
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+#
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+CONFIG_BINFMT_ELF=y
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+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
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+CONFIG_HAVE_AOUT=y
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+# CONFIG_BINFMT_AOUT is not set
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+CONFIG_BINFMT_MISC=y
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+
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+#
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+# Power management options
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+#
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+CONFIG_PM=y
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+# CONFIG_PM_DEBUG is not set
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+CONFIG_PM_SLEEP=y
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|
+CONFIG_SUSPEND=y
|
|
+CONFIG_SUSPEND_FREEZER=y
|
|
+CONFIG_HAS_WAKELOCK=y
|
|
+CONFIG_HAS_EARLYSUSPEND=y
|
|
+CONFIG_WAKELOCK=y
|
|
+CONFIG_WAKELOCK_STAT=y
|
|
+CONFIG_USER_WAKELOCK=y
|
|
+CONFIG_EARLYSUSPEND=y
|
|
+# CONFIG_NO_USER_SPACE_SCREEN_ACCESS_CONTROL is not set
|
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+CONFIG_CONSOLE_EARLYSUSPEND=y
|
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+# CONFIG_FB_EARLYSUSPEND is not set
|
|
+# CONFIG_APM_EMULATION is not set
|
|
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
|
+CONFIG_NET=y
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+
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+#
|
|
+# Networking options
|
|
+#
|
|
+CONFIG_COMPAT_NET_DEV_OPS=y
|
|
+CONFIG_PACKET=y
|
|
+CONFIG_PACKET_MMAP=y
|
|
+CONFIG_UNIX=y
|
|
+CONFIG_XFRM=y
|
|
+# CONFIG_XFRM_USER is not set
|
|
+# CONFIG_XFRM_SUB_POLICY is not set
|
|
+# CONFIG_XFRM_MIGRATE is not set
|
|
+# CONFIG_XFRM_STATISTICS is not set
|
|
+CONFIG_XFRM_IPCOMP=y
|
|
+# CONFIG_NET_KEY is not set
|
|
+CONFIG_INET=y
|
|
+CONFIG_IP_MULTICAST=y
|
|
+# CONFIG_IP_ADVANCED_ROUTER is not set
|
|
+CONFIG_IP_FIB_HASH=y
|
|
+CONFIG_IP_PNP=y
|
|
+CONFIG_IP_PNP_DHCP=y
|
|
+CONFIG_IP_PNP_BOOTP=y
|
|
+# CONFIG_IP_PNP_RARP is not set
|
|
+CONFIG_NET_IPIP=y
|
|
+CONFIG_NET_IPGRE=y
|
|
+CONFIG_NET_IPGRE_BROADCAST=y
|
|
+CONFIG_IP_MROUTE=y
|
|
+CONFIG_IP_PIMSM_V1=y
|
|
+CONFIG_IP_PIMSM_V2=y
|
|
+CONFIG_ARPD=y
|
|
+CONFIG_SYN_COOKIES=y
|
|
+CONFIG_INET_AH=y
|
|
+CONFIG_INET_ESP=y
|
|
+CONFIG_INET_IPCOMP=y
|
|
+CONFIG_INET_XFRM_TUNNEL=y
|
|
+CONFIG_INET_TUNNEL=y
|
|
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
|
|
+CONFIG_INET_XFRM_MODE_TUNNEL=y
|
|
+CONFIG_INET_XFRM_MODE_BEET=y
|
|
+# CONFIG_INET_LRO is not set
|
|
+CONFIG_INET_DIAG=y
|
|
+CONFIG_INET_TCP_DIAG=y
|
|
+# CONFIG_TCP_CONG_ADVANCED is not set
|
|
+CONFIG_TCP_CONG_CUBIC=y
|
|
+CONFIG_DEFAULT_TCP_CONG="cubic"
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|
+# CONFIG_TCP_MD5SIG is not set
|
|
+# CONFIG_IPV6 is not set
|
|
+CONFIG_ANDROID_PARANOID_NETWORK=y
|
|
+# CONFIG_NETWORK_SECMARK is not set
|
|
+# CONFIG_NETFILTER is not set
|
|
+# CONFIG_IP_DCCP is not set
|
|
+# CONFIG_IP_SCTP is not set
|
|
+# CONFIG_TIPC is not set
|
|
+# CONFIG_ATM is not set
|
|
+CONFIG_STP=y
|
|
+CONFIG_BRIDGE=y
|
|
+# CONFIG_NET_DSA is not set
|
|
+CONFIG_VLAN_8021Q=y
|
|
+# CONFIG_VLAN_8021Q_GVRP is not set
|
|
+# CONFIG_DECNET is not set
|
|
+CONFIG_LLC=y
|
|
+# CONFIG_LLC2 is not set
|
|
+# CONFIG_IPX is not set
|
|
+# CONFIG_ATALK is not set
|
|
+# CONFIG_X25 is not set
|
|
+# CONFIG_LAPB is not set
|
|
+# CONFIG_ECONET is not set
|
|
+# CONFIG_WAN_ROUTER is not set
|
|
+# CONFIG_NET_SCHED is not set
|
|
+# CONFIG_DCB is not set
|
|
+
|
|
+#
|
|
+# Network testing
|
|
+#
|
|
+# CONFIG_NET_PKTGEN is not set
|
|
+# CONFIG_HAMRADIO is not set
|
|
+# CONFIG_CAN is not set
|
|
+# CONFIG_IRDA is not set
|
|
+# CONFIG_BT is not set
|
|
+# CONFIG_AF_RXRPC is not set
|
|
+# CONFIG_PHONET is not set
|
|
+CONFIG_WIRELESS=y
|
|
+# CONFIG_CFG80211 is not set
|
|
+CONFIG_WIRELESS_OLD_REGULATORY=y
|
|
+# CONFIG_WIRELESS_EXT is not set
|
|
+# CONFIG_LIB80211 is not set
|
|
+# CONFIG_MAC80211 is not set
|
|
+# CONFIG_WIMAX is not set
|
|
+# CONFIG_RFKILL is not set
|
|
+# CONFIG_NET_9P is not set
|
|
+
|
|
+#
|
|
+# Device Drivers
|
|
+#
|
|
+
|
|
+#
|
|
+# Generic Driver Options
|
|
+#
|
|
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
|
+CONFIG_STANDALONE=y
|
|
+CONFIG_PREVENT_FIRMWARE_BUILD=y
|
|
+CONFIG_FW_LOADER=y
|
|
+CONFIG_FIRMWARE_IN_KERNEL=y
|
|
+CONFIG_EXTRA_FIRMWARE=""
|
|
+# CONFIG_DEBUG_DRIVER is not set
|
|
+# CONFIG_DEBUG_DEVRES is not set
|
|
+# CONFIG_SYS_HYPERVISOR is not set
|
|
+CONFIG_CONNECTOR=y
|
|
+CONFIG_PROC_EVENTS=y
|
|
+CONFIG_MTD=y
|
|
+# CONFIG_MTD_DEBUG is not set
|
|
+# CONFIG_MTD_CONCAT is not set
|
|
+# CONFIG_MTD_PARTITIONS is not set
|
|
+
|
|
+#
|
|
+# User Modules And Translation Layers
|
|
+#
|
|
+CONFIG_MTD_CHAR=y
|
|
+CONFIG_MTD_BLKDEVS=y
|
|
+CONFIG_MTD_BLOCK=y
|
|
+# CONFIG_FTL is not set
|
|
+# CONFIG_NFTL is not set
|
|
+# CONFIG_INFTL is not set
|
|
+# CONFIG_RFD_FTL is not set
|
|
+# CONFIG_SSFDC is not set
|
|
+# CONFIG_MTD_OOPS is not set
|
|
+
|
|
+#
|
|
+# RAM/ROM/Flash chip drivers
|
|
+#
|
|
+# CONFIG_MTD_CFI is not set
|
|
+# CONFIG_MTD_JEDECPROBE is not set
|
|
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
|
|
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
|
|
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
|
|
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
|
|
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
|
|
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
|
|
+CONFIG_MTD_CFI_I1=y
|
|
+CONFIG_MTD_CFI_I2=y
|
|
+# CONFIG_MTD_CFI_I4 is not set
|
|
+# CONFIG_MTD_CFI_I8 is not set
|
|
+# CONFIG_MTD_RAM is not set
|
|
+# CONFIG_MTD_ROM is not set
|
|
+# CONFIG_MTD_ABSENT is not set
|
|
+
|
|
+#
|
|
+# Mapping drivers for chip access
|
|
+#
|
|
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
|
+# CONFIG_MTD_PLATRAM is not set
|
|
+
|
|
+#
|
|
+# Self-contained MTD device drivers
|
|
+#
|
|
+# CONFIG_MTD_SLRAM is not set
|
|
+# CONFIG_MTD_PHRAM is not set
|
|
+# CONFIG_MTD_MTDRAM is not set
|
|
+# CONFIG_MTD_BLOCK2MTD is not set
|
|
+
|
|
+#
|
|
+# Disk-On-Chip Device Drivers
|
|
+#
|
|
+# CONFIG_MTD_DOC2000 is not set
|
|
+# CONFIG_MTD_DOC2001 is not set
|
|
+# CONFIG_MTD_DOC2001PLUS is not set
|
|
+CONFIG_MTD_GOLDFISH_NAND=y
|
|
+# CONFIG_MTD_NAND is not set
|
|
+# CONFIG_MTD_ONENAND is not set
|
|
+
|
|
+#
|
|
+# LPDDR flash memory drivers
|
|
+#
|
|
+# CONFIG_MTD_LPDDR is not set
|
|
+
|
|
+#
|
|
+# UBI - Unsorted block images
|
|
+#
|
|
+# CONFIG_MTD_UBI is not set
|
|
+# CONFIG_PARPORT is not set
|
|
+CONFIG_BLK_DEV=y
|
|
+# CONFIG_BLK_DEV_COW_COMMON is not set
|
|
+CONFIG_BLK_DEV_LOOP=y
|
|
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
|
|
+CONFIG_BLK_DEV_NBD=y
|
|
+CONFIG_BLK_DEV_RAM=y
|
|
+CONFIG_BLK_DEV_RAM_COUNT=16
|
|
+CONFIG_BLK_DEV_RAM_SIZE=8192
|
|
+# CONFIG_BLK_DEV_XIP is not set
|
|
+# CONFIG_CDROM_PKTCDVD is not set
|
|
+# CONFIG_ATA_OVER_ETH is not set
|
|
+CONFIG_MISC_DEVICES=y
|
|
+CONFIG_ANDROID_PMEM=y
|
|
+# CONFIG_ENCLOSURE_SERVICES is not set
|
|
+# CONFIG_KERNEL_DEBUGGER_CORE is not set
|
|
+# CONFIG_UID_STAT is not set
|
|
+CONFIG_QEMU_TRACE=y
|
|
+# CONFIG_C2PORT is not set
|
|
+
|
|
+#
|
|
+# EEPROM support
|
|
+#
|
|
+# CONFIG_EEPROM_93CX6 is not set
|
|
+CONFIG_HAVE_IDE=y
|
|
+# CONFIG_IDE is not set
|
|
+
|
|
+#
|
|
+# SCSI device support
|
|
+#
|
|
+# CONFIG_RAID_ATTRS is not set
|
|
+# CONFIG_SCSI is not set
|
|
+# CONFIG_SCSI_DMA is not set
|
|
+# CONFIG_SCSI_NETLINK is not set
|
|
+# CONFIG_ATA is not set
|
|
+# CONFIG_MD is not set
|
|
+CONFIG_NETDEVICES=y
|
|
+# CONFIG_DUMMY is not set
|
|
+# CONFIG_BONDING is not set
|
|
+# CONFIG_MACVLAN is not set
|
|
+# CONFIG_EQUALIZER is not set
|
|
+# CONFIG_TUN is not set
|
|
+# CONFIG_VETH is not set
|
|
+# CONFIG_PHYLIB is not set
|
|
+CONFIG_NET_ETHERNET=y
|
|
+CONFIG_MII=y
|
|
+# CONFIG_AX88796 is not set
|
|
+CONFIG_SMC91X=y
|
|
+# CONFIG_DM9000 is not set
|
|
+# CONFIG_SMC911X is not set
|
|
+# CONFIG_SMSC911X is not set
|
|
+# CONFIG_DNET is not set
|
|
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
|
|
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
|
+# CONFIG_IBM_NEW_EMAC_TAH is not set
|
|
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
|
|
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
|
|
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
|
|
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
|
+# CONFIG_B44 is not set
|
|
+CONFIG_NETDEV_1000=y
|
|
+CONFIG_NETDEV_10000=y
|
|
+
|
|
+#
|
|
+# Wireless LAN
|
|
+#
|
|
+# CONFIG_WLAN_PRE80211 is not set
|
|
+# CONFIG_WLAN_80211 is not set
|
|
+# CONFIG_IWLWIFI_LEDS is not set
|
|
+
|
|
+#
|
|
+# Enable WiMAX (Networking options) to see the WiMAX drivers
|
|
+#
|
|
+# CONFIG_WAN is not set
|
|
+# CONFIG_PPP is not set
|
|
+# CONFIG_SLIP is not set
|
|
+# CONFIG_NETCONSOLE is not set
|
|
+# CONFIG_NETPOLL is not set
|
|
+# CONFIG_NET_POLL_CONTROLLER is not set
|
|
+# CONFIG_ISDN is not set
|
|
+
|
|
+#
|
|
+# Input device support
|
|
+#
|
|
+CONFIG_INPUT=y
|
|
+# CONFIG_INPUT_FF_MEMLESS is not set
|
|
+# CONFIG_INPUT_POLLDEV is not set
|
|
+
|
|
+#
|
|
+# Userland interfaces
|
|
+#
|
|
+CONFIG_INPUT_MOUSEDEV=y
|
|
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
|
|
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
|
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
|
+# CONFIG_INPUT_JOYDEV is not set
|
|
+CONFIG_INPUT_EVDEV=y
|
|
+# CONFIG_INPUT_EVBUG is not set
|
|
+# CONFIG_INPUT_KEYRESET is not set
|
|
+
|
|
+#
|
|
+# Input Device Drivers
|
|
+#
|
|
+CONFIG_INPUT_KEYBOARD=y
|
|
+CONFIG_KEYBOARD_ATKBD=y
|
|
+# CONFIG_KEYBOARD_SUNKBD is not set
|
|
+# CONFIG_KEYBOARD_LKKBD is not set
|
|
+# CONFIG_KEYBOARD_XTKBD is not set
|
|
+# CONFIG_KEYBOARD_NEWTON is not set
|
|
+# CONFIG_KEYBOARD_STOWAWAY is not set
|
|
+CONFIG_KEYBOARD_GOLDFISH_EVENTS=y
|
|
+# CONFIG_INPUT_MOUSE is not set
|
|
+# CONFIG_INPUT_JOYSTICK is not set
|
|
+# CONFIG_INPUT_TABLET is not set
|
|
+# CONFIG_INPUT_TOUCHSCREEN is not set
|
|
+CONFIG_INPUT_MISC=y
|
|
+# CONFIG_INPUT_ATI_REMOTE is not set
|
|
+# CONFIG_INPUT_ATI_REMOTE2 is not set
|
|
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
|
|
+# CONFIG_INPUT_POWERMATE is not set
|
|
+# CONFIG_INPUT_YEALINK is not set
|
|
+# CONFIG_INPUT_CM109 is not set
|
|
+# CONFIG_INPUT_UINPUT is not set
|
|
+# CONFIG_INPUT_GPIO is not set
|
|
+# CONFIG_INPUT_KEYCHORD is not set
|
|
+
|
|
+#
|
|
+# Hardware I/O ports
|
|
+#
|
|
+CONFIG_SERIO=y
|
|
+# CONFIG_SERIO_SERPORT is not set
|
|
+CONFIG_SERIO_LIBPS2=y
|
|
+# CONFIG_SERIO_RAW is not set
|
|
+# CONFIG_GAMEPORT is not set
|
|
+
|
|
+#
|
|
+# Character devices
|
|
+#
|
|
+CONFIG_VT=y
|
|
+CONFIG_CONSOLE_TRANSLATIONS=y
|
|
+CONFIG_VT_CONSOLE=y
|
|
+CONFIG_HW_CONSOLE=y
|
|
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
|
|
+CONFIG_DEVMEM=y
|
|
+CONFIG_DEVKMEM=y
|
|
+# CONFIG_SERIAL_NONSTANDARD is not set
|
|
+
|
|
+#
|
|
+# Serial drivers
|
|
+#
|
|
+# CONFIG_SERIAL_8250 is not set
|
|
+
|
|
+#
|
|
+# Non-8250 serial port support
|
|
+#
|
|
+CONFIG_UNIX98_PTYS=y
|
|
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
|
|
+# CONFIG_LEGACY_PTYS is not set
|
|
+# CONFIG_IPMI_HANDLER is not set
|
|
+CONFIG_HW_RANDOM=y
|
|
+# CONFIG_R3964 is not set
|
|
+# CONFIG_RAW_DRIVER is not set
|
|
+# CONFIG_TCG_TPM is not set
|
|
+# CONFIG_DCC_TTY is not set
|
|
+CONFIG_GOLDFISH_TTY=y
|
|
+# CONFIG_I2C is not set
|
|
+# CONFIG_SPI is not set
|
|
+# CONFIG_W1 is not set
|
|
+CONFIG_POWER_SUPPLY=y
|
|
+# CONFIG_POWER_SUPPLY_DEBUG is not set
|
|
+# CONFIG_PDA_POWER is not set
|
|
+# CONFIG_BATTERY_DS2760 is not set
|
|
+CONFIG_BATTERY_GOLDFISH=y
|
|
+# CONFIG_HWMON is not set
|
|
+# CONFIG_THERMAL is not set
|
|
+# CONFIG_THERMAL_HWMON is not set
|
|
+# CONFIG_WATCHDOG is not set
|
|
+CONFIG_SSB_POSSIBLE=y
|
|
+
|
|
+#
|
|
+# Sonics Silicon Backplane
|
|
+#
|
|
+# CONFIG_SSB is not set
|
|
+
|
|
+#
|
|
+# Multifunction device drivers
|
|
+#
|
|
+# CONFIG_MFD_CORE is not set
|
|
+# CONFIG_MFD_SM501 is not set
|
|
+# CONFIG_HTC_PASIC3 is not set
|
|
+# CONFIG_MFD_TMIO is not set
|
|
+
|
|
+#
|
|
+# Multimedia devices
|
|
+#
|
|
+
|
|
+#
|
|
+# Multimedia core support
|
|
+#
|
|
+# CONFIG_VIDEO_DEV is not set
|
|
+# CONFIG_DVB_CORE is not set
|
|
+# CONFIG_VIDEO_MEDIA is not set
|
|
+
|
|
+#
|
|
+# Multimedia drivers
|
|
+#
|
|
+# CONFIG_DAB is not set
|
|
+
|
|
+#
|
|
+# Graphics support
|
|
+#
|
|
+# CONFIG_VGASTATE is not set
|
|
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
|
|
+CONFIG_FB=y
|
|
+# CONFIG_FIRMWARE_EDID is not set
|
|
+# CONFIG_FB_DDC is not set
|
|
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
|
|
+CONFIG_FB_CFB_FILLRECT=y
|
|
+CONFIG_FB_CFB_COPYAREA=y
|
|
+CONFIG_FB_CFB_IMAGEBLIT=y
|
|
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
|
|
+# CONFIG_FB_SYS_FILLRECT is not set
|
|
+# CONFIG_FB_SYS_COPYAREA is not set
|
|
+# CONFIG_FB_SYS_IMAGEBLIT is not set
|
|
+# CONFIG_FB_FOREIGN_ENDIAN is not set
|
|
+# CONFIG_FB_SYS_FOPS is not set
|
|
+# CONFIG_FB_SVGALIB is not set
|
|
+# CONFIG_FB_MACMODES is not set
|
|
+# CONFIG_FB_BACKLIGHT is not set
|
|
+CONFIG_FB_MODE_HELPERS=y
|
|
+CONFIG_FB_TILEBLITTING=y
|
|
+
|
|
+#
|
|
+# Frame buffer hardware drivers
|
|
+#
|
|
+# CONFIG_FB_UVESA is not set
|
|
+# CONFIG_FB_S1D13XXX is not set
|
|
+CONFIG_FB_GOLDFISH=y
|
|
+# CONFIG_FB_VIRTUAL is not set
|
|
+# CONFIG_FB_METRONOME is not set
|
|
+# CONFIG_FB_MB862XX is not set
|
|
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
|
+
|
|
+#
|
|
+# Display device support
|
|
+#
|
|
+# CONFIG_DISPLAY_SUPPORT is not set
|
|
+
|
|
+#
|
|
+# Console display driver support
|
|
+#
|
|
+# CONFIG_VGA_CONSOLE is not set
|
|
+CONFIG_DUMMY_CONSOLE=y
|
|
+CONFIG_FRAMEBUFFER_CONSOLE=y
|
|
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
|
|
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
|
|
+# CONFIG_FONTS is not set
|
|
+CONFIG_FONT_8x8=y
|
|
+CONFIG_FONT_8x16=y
|
|
+# CONFIG_LOGO is not set
|
|
+# CONFIG_SOUND is not set
|
|
+CONFIG_HID_SUPPORT=y
|
|
+CONFIG_HID=y
|
|
+# CONFIG_HID_DEBUG is not set
|
|
+# CONFIG_HIDRAW is not set
|
|
+# CONFIG_HID_PID is not set
|
|
+
|
|
+#
|
|
+# Special HID drivers
|
|
+#
|
|
+CONFIG_HID_COMPAT=y
|
|
+CONFIG_USB_SUPPORT=y
|
|
+CONFIG_USB_ARCH_HAS_HCD=y
|
|
+# CONFIG_USB_ARCH_HAS_OHCI is not set
|
|
+# CONFIG_USB_ARCH_HAS_EHCI is not set
|
|
+# CONFIG_USB is not set
|
|
+
|
|
+#
|
|
+# Enable Host or Gadget support to see Inventra options
|
|
+#
|
|
+
|
|
+#
|
|
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
|
|
+#
|
|
+# CONFIG_USB_GADGET is not set
|
|
+
|
|
+#
|
|
+# OTG and related infrastructure
|
|
+#
|
|
+CONFIG_MMC=y
|
|
+# CONFIG_MMC_DEBUG is not set
|
|
+# CONFIG_MMC_UNSAFE_RESUME is not set
|
|
+# CONFIG_MMC_EMBEDDED_SDIO is not set
|
|
+# CONFIG_MMC_PARANOID_SD_INIT is not set
|
|
+
|
|
+#
|
|
+# MMC/SD/SDIO Card Drivers
|
|
+#
|
|
+CONFIG_MMC_BLOCK=y
|
|
+CONFIG_MMC_BLOCK_BOUNCE=y
|
|
+CONFIG_MMC_BLOCK_PARANOID_RESUME=y
|
|
+# CONFIG_SDIO_UART is not set
|
|
+# CONFIG_MMC_TEST is not set
|
|
+
|
|
+#
|
|
+# MMC/SD/SDIO Host Controller Drivers
|
|
+#
|
|
+# CONFIG_MMC_SDHCI is not set
|
|
+CONFIG_MMC_GOLDFISH=y
|
|
+# CONFIG_MEMSTICK is not set
|
|
+# CONFIG_ACCESSIBILITY is not set
|
|
+# CONFIG_NEW_LEDS is not set
|
|
+# CONFIG_SWITCH is not set
|
|
+CONFIG_RTC_LIB=y
|
|
+CONFIG_RTC_CLASS=y
|
|
+CONFIG_RTC_HCTOSYS=y
|
|
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
|
|
+# CONFIG_RTC_DEBUG is not set
|
|
+
|
|
+#
|
|
+# RTC interfaces
|
|
+#
|
|
+CONFIG_RTC_INTF_SYSFS=y
|
|
+CONFIG_RTC_INTF_PROC=y
|
|
+CONFIG_RTC_INTF_DEV=y
|
|
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
|
|
+CONFIG_RTC_INTF_ALARM=y
|
|
+# CONFIG_RTC_DRV_TEST is not set
|
|
+
|
|
+#
|
|
+# SPI RTC drivers
|
|
+#
|
|
+
|
|
+#
|
|
+# Platform RTC drivers
|
|
+#
|
|
+# CONFIG_RTC_DRV_CMOS is not set
|
|
+# CONFIG_RTC_DRV_DS1286 is not set
|
|
+# CONFIG_RTC_DRV_DS1511 is not set
|
|
+# CONFIG_RTC_DRV_DS1553 is not set
|
|
+# CONFIG_RTC_DRV_DS1742 is not set
|
|
+# CONFIG_RTC_DRV_STK17TA8 is not set
|
|
+# CONFIG_RTC_DRV_M48T86 is not set
|
|
+# CONFIG_RTC_DRV_M48T35 is not set
|
|
+# CONFIG_RTC_DRV_M48T59 is not set
|
|
+# CONFIG_RTC_DRV_BQ4802 is not set
|
|
+# CONFIG_RTC_DRV_V3020 is not set
|
|
+
|
|
+#
|
|
+# on-CPU RTC drivers
|
|
+#
|
|
+CONFIG_RTC_DRV_GOLDFISH=y
|
|
+# CONFIG_DMADEVICES is not set
|
|
+# CONFIG_REGULATOR is not set
|
|
+# CONFIG_UIO is not set
|
|
+CONFIG_STAGING=y
|
|
+# CONFIG_STAGING_EXCLUDE_BUILD is not set
|
|
+# CONFIG_ECHO is not set
|
|
+
|
|
+#
|
|
+# Android
|
|
+#
|
|
+CONFIG_ANDROID=y
|
|
+CONFIG_ANDROID_BINDER_IPC=y
|
|
+CONFIG_ANDROID_LOGGER=y
|
|
+# CONFIG_ANDROID_RAM_CONSOLE is not set
|
|
+CONFIG_ANDROID_TIMED_OUTPUT=y
|
|
+CONFIG_ANDROID_LOW_MEMORY_KILLER=y
|
|
+
|
|
+#
|
|
+# File systems
|
|
+#
|
|
+# CONFIG_EXT2_FS is not set
|
|
+# CONFIG_EXT3_FS is not set
|
|
+# CONFIG_EXT4_FS is not set
|
|
+# CONFIG_REISERFS_FS is not set
|
|
+# CONFIG_JFS_FS is not set
|
|
+# CONFIG_FS_POSIX_ACL is not set
|
|
+CONFIG_FILE_LOCKING=y
|
|
+# CONFIG_XFS_FS is not set
|
|
+# CONFIG_OCFS2_FS is not set
|
|
+# CONFIG_BTRFS_FS is not set
|
|
+CONFIG_DNOTIFY=y
|
|
+CONFIG_INOTIFY=y
|
|
+CONFIG_INOTIFY_USER=y
|
|
+# CONFIG_QUOTA is not set
|
|
+# CONFIG_AUTOFS_FS is not set
|
|
+# CONFIG_AUTOFS4_FS is not set
|
|
+# CONFIG_FUSE_FS is not set
|
|
+
|
|
+#
|
|
+# CD-ROM/DVD Filesystems
|
|
+#
|
|
+# CONFIG_ISO9660_FS is not set
|
|
+# CONFIG_UDF_FS is not set
|
|
+
|
|
+#
|
|
+# DOS/FAT/NT Filesystems
|
|
+#
|
|
+CONFIG_FAT_FS=y
|
|
+CONFIG_MSDOS_FS=y
|
|
+CONFIG_VFAT_FS=y
|
|
+CONFIG_FAT_DEFAULT_CODEPAGE=437
|
|
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
|
|
+# CONFIG_NTFS_FS is not set
|
|
+
|
|
+#
|
|
+# Pseudo filesystems
|
|
+#
|
|
+CONFIG_PROC_FS=y
|
|
+CONFIG_PROC_SYSCTL=y
|
|
+CONFIG_PROC_PAGE_MONITOR=y
|
|
+CONFIG_SYSFS=y
|
|
+CONFIG_TMPFS=y
|
|
+# CONFIG_TMPFS_POSIX_ACL is not set
|
|
+# CONFIG_HUGETLB_PAGE is not set
|
|
+# CONFIG_CONFIGFS_FS is not set
|
|
+CONFIG_MISC_FILESYSTEMS=y
|
|
+# CONFIG_ADFS_FS is not set
|
|
+# CONFIG_AFFS_FS is not set
|
|
+# CONFIG_HFS_FS is not set
|
|
+# CONFIG_HFSPLUS_FS is not set
|
|
+# CONFIG_BEFS_FS is not set
|
|
+# CONFIG_BFS_FS is not set
|
|
+# CONFIG_EFS_FS is not set
|
|
+CONFIG_YAFFS_FS=y
|
|
+CONFIG_YAFFS_YAFFS1=y
|
|
+# CONFIG_YAFFS_9BYTE_TAGS is not set
|
|
+# CONFIG_YAFFS_DOES_ECC is not set
|
|
+CONFIG_YAFFS_YAFFS2=y
|
|
+CONFIG_YAFFS_AUTO_YAFFS2=y
|
|
+# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
|
|
+# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
|
|
+# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
|
|
+CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
|
|
+# CONFIG_JFFS2_FS is not set
|
|
+# CONFIG_CRAMFS is not set
|
|
+# CONFIG_SQUASHFS is not set
|
|
+# CONFIG_VXFS_FS is not set
|
|
+# CONFIG_MINIX_FS is not set
|
|
+# CONFIG_OMFS_FS is not set
|
|
+# CONFIG_HPFS_FS is not set
|
|
+# CONFIG_QNX4FS_FS is not set
|
|
+# CONFIG_ROMFS_FS is not set
|
|
+# CONFIG_SYSV_FS is not set
|
|
+# CONFIG_UFS_FS is not set
|
|
+CONFIG_NETWORK_FILESYSTEMS=y
|
|
+# CONFIG_NFS_FS is not set
|
|
+CONFIG_NFSD=y
|
|
+CONFIG_NFSD_V3=y
|
|
+# CONFIG_NFSD_V3_ACL is not set
|
|
+# CONFIG_NFSD_V4 is not set
|
|
+CONFIG_LOCKD=y
|
|
+CONFIG_LOCKD_V4=y
|
|
+CONFIG_EXPORTFS=y
|
|
+CONFIG_NFS_COMMON=y
|
|
+CONFIG_SUNRPC=y
|
|
+# CONFIG_SUNRPC_REGISTER_V4 is not set
|
|
+# CONFIG_RPCSEC_GSS_KRB5 is not set
|
|
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
|
+CONFIG_SMB_FS=y
|
|
+# CONFIG_SMB_NLS_DEFAULT is not set
|
|
+# CONFIG_CIFS is not set
|
|
+# CONFIG_NCP_FS is not set
|
|
+# CONFIG_CODA_FS is not set
|
|
+# CONFIG_AFS_FS is not set
|
|
+
|
|
+#
|
|
+# Partition Types
|
|
+#
|
|
+# CONFIG_PARTITION_ADVANCED is not set
|
|
+CONFIG_MSDOS_PARTITION=y
|
|
+CONFIG_NLS=y
|
|
+CONFIG_NLS_DEFAULT="iso8859-1"
|
|
+CONFIG_NLS_CODEPAGE_437=y
|
|
+# CONFIG_NLS_CODEPAGE_737 is not set
|
|
+# CONFIG_NLS_CODEPAGE_775 is not set
|
|
+# CONFIG_NLS_CODEPAGE_850 is not set
|
|
+# CONFIG_NLS_CODEPAGE_852 is not set
|
|
+# CONFIG_NLS_CODEPAGE_855 is not set
|
|
+# CONFIG_NLS_CODEPAGE_857 is not set
|
|
+# CONFIG_NLS_CODEPAGE_860 is not set
|
|
+# CONFIG_NLS_CODEPAGE_861 is not set
|
|
+# CONFIG_NLS_CODEPAGE_862 is not set
|
|
+# CONFIG_NLS_CODEPAGE_863 is not set
|
|
+# CONFIG_NLS_CODEPAGE_864 is not set
|
|
+# CONFIG_NLS_CODEPAGE_865 is not set
|
|
+# CONFIG_NLS_CODEPAGE_866 is not set
|
|
+# CONFIG_NLS_CODEPAGE_869 is not set
|
|
+# CONFIG_NLS_CODEPAGE_936 is not set
|
|
+# CONFIG_NLS_CODEPAGE_950 is not set
|
|
+# CONFIG_NLS_CODEPAGE_932 is not set
|
|
+# CONFIG_NLS_CODEPAGE_949 is not set
|
|
+# CONFIG_NLS_CODEPAGE_874 is not set
|
|
+# CONFIG_NLS_ISO8859_8 is not set
|
|
+# CONFIG_NLS_CODEPAGE_1250 is not set
|
|
+# CONFIG_NLS_CODEPAGE_1251 is not set
|
|
+# CONFIG_NLS_ASCII is not set
|
|
+CONFIG_NLS_ISO8859_1=y
|
|
+# CONFIG_NLS_ISO8859_2 is not set
|
|
+# CONFIG_NLS_ISO8859_3 is not set
|
|
+# CONFIG_NLS_ISO8859_4 is not set
|
|
+# CONFIG_NLS_ISO8859_5 is not set
|
|
+# CONFIG_NLS_ISO8859_6 is not set
|
|
+# CONFIG_NLS_ISO8859_7 is not set
|
|
+# CONFIG_NLS_ISO8859_9 is not set
|
|
+# CONFIG_NLS_ISO8859_13 is not set
|
|
+# CONFIG_NLS_ISO8859_14 is not set
|
|
+# CONFIG_NLS_ISO8859_15 is not set
|
|
+# CONFIG_NLS_KOI8_R is not set
|
|
+# CONFIG_NLS_KOI8_U is not set
|
|
+# CONFIG_NLS_UTF8 is not set
|
|
+# CONFIG_DLM is not set
|
|
+
|
|
+#
|
|
+# Kernel hacking
|
|
+#
|
|
+# CONFIG_PRINTK_TIME is not set
|
|
+CONFIG_ENABLE_WARN_DEPRECATED=y
|
|
+CONFIG_ENABLE_MUST_CHECK=y
|
|
+CONFIG_FRAME_WARN=1024
|
|
+CONFIG_MAGIC_SYSRQ=y
|
|
+# CONFIG_UNUSED_SYMBOLS is not set
|
|
+# CONFIG_DEBUG_FS is not set
|
|
+# CONFIG_HEADERS_CHECK is not set
|
|
+CONFIG_DEBUG_KERNEL=y
|
|
+# CONFIG_DEBUG_SHIRQ is not set
|
|
+# CONFIG_DETECT_SOFTLOCKUP is not set
|
|
+CONFIG_SCHED_DEBUG=y
|
|
+CONFIG_SCHEDSTATS=y
|
|
+# CONFIG_TIMER_STATS is not set
|
|
+# CONFIG_DEBUG_OBJECTS is not set
|
|
+# CONFIG_DEBUG_SLAB is not set
|
|
+# CONFIG_DEBUG_RT_MUTEXES is not set
|
|
+# CONFIG_RT_MUTEX_TESTER is not set
|
|
+# CONFIG_DEBUG_SPINLOCK is not set
|
|
+# CONFIG_DEBUG_MUTEXES is not set
|
|
+# CONFIG_DEBUG_LOCK_ALLOC is not set
|
|
+# CONFIG_PROVE_LOCKING is not set
|
|
+# CONFIG_LOCK_STAT is not set
|
|
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
|
|
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
|
+# CONFIG_DEBUG_KOBJECT is not set
|
|
+CONFIG_DEBUG_BUGVERBOSE=y
|
|
+# CONFIG_DEBUG_INFO is not set
|
|
+# CONFIG_DEBUG_VM is not set
|
|
+# CONFIG_DEBUG_WRITECOUNT is not set
|
|
+CONFIG_DEBUG_MEMORY_INIT=y
|
|
+# CONFIG_DEBUG_LIST is not set
|
|
+# CONFIG_DEBUG_SG is not set
|
|
+# CONFIG_DEBUG_NOTIFIERS is not set
|
|
+CONFIG_FRAME_POINTER=y
|
|
+# CONFIG_BOOT_PRINTK_DELAY is not set
|
|
+# CONFIG_RCU_TORTURE_TEST is not set
|
|
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
|
+# CONFIG_BACKTRACE_SELF_TEST is not set
|
|
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
|
|
+# CONFIG_FAULT_INJECTION is not set
|
|
+# CONFIG_LATENCYTOP is not set
|
|
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
|
|
+CONFIG_HAVE_FUNCTION_TRACER=y
|
|
+
|
|
+#
|
|
+# Tracers
|
|
+#
|
|
+# CONFIG_FUNCTION_TRACER is not set
|
|
+# CONFIG_IRQSOFF_TRACER is not set
|
|
+# CONFIG_SCHED_TRACER is not set
|
|
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
|
|
+# CONFIG_BOOT_TRACER is not set
|
|
+# CONFIG_TRACE_BRANCH_PROFILING is not set
|
|
+# CONFIG_STACK_TRACER is not set
|
|
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
|
|
+# CONFIG_SAMPLES is not set
|
|
+CONFIG_HAVE_ARCH_KGDB=y
|
|
+# CONFIG_KGDB is not set
|
|
+# CONFIG_DEBUG_USER is not set
|
|
+# CONFIG_DEBUG_ERRORS is not set
|
|
+# CONFIG_DEBUG_STACK_USAGE is not set
|
|
+# CONFIG_DEBUG_LL is not set
|
|
+
|
|
+#
|
|
+# Security options
|
|
+#
|
|
+# CONFIG_KEYS is not set
|
|
+# CONFIG_SECURITY is not set
|
|
+# CONFIG_SECURITYFS is not set
|
|
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
|
+CONFIG_CRYPTO=y
|
|
+
|
|
+#
|
|
+# Crypto core or helper
|
|
+#
|
|
+# CONFIG_CRYPTO_FIPS is not set
|
|
+CONFIG_CRYPTO_ALGAPI=y
|
|
+CONFIG_CRYPTO_ALGAPI2=y
|
|
+CONFIG_CRYPTO_AEAD=y
|
|
+CONFIG_CRYPTO_AEAD2=y
|
|
+CONFIG_CRYPTO_BLKCIPHER=y
|
|
+CONFIG_CRYPTO_BLKCIPHER2=y
|
|
+CONFIG_CRYPTO_HASH=y
|
|
+CONFIG_CRYPTO_HASH2=y
|
|
+CONFIG_CRYPTO_RNG2=y
|
|
+CONFIG_CRYPTO_MANAGER=y
|
|
+CONFIG_CRYPTO_MANAGER2=y
|
|
+# CONFIG_CRYPTO_GF128MUL is not set
|
|
+# CONFIG_CRYPTO_NULL is not set
|
|
+# CONFIG_CRYPTO_CRYPTD is not set
|
|
+CONFIG_CRYPTO_AUTHENC=y
|
|
+
|
|
+#
|
|
+# Authenticated Encryption with Associated Data
|
|
+#
|
|
+# CONFIG_CRYPTO_CCM is not set
|
|
+# CONFIG_CRYPTO_GCM is not set
|
|
+# CONFIG_CRYPTO_SEQIV is not set
|
|
+
|
|
+#
|
|
+# Block modes
|
|
+#
|
|
+CONFIG_CRYPTO_CBC=y
|
|
+# CONFIG_CRYPTO_CTR is not set
|
|
+# CONFIG_CRYPTO_CTS is not set
|
|
+CONFIG_CRYPTO_ECB=y
|
|
+# CONFIG_CRYPTO_LRW is not set
|
|
+CONFIG_CRYPTO_PCBC=y
|
|
+# CONFIG_CRYPTO_XTS is not set
|
|
+
|
|
+#
|
|
+# Hash modes
|
|
+#
|
|
+CONFIG_CRYPTO_HMAC=y
|
|
+# CONFIG_CRYPTO_XCBC is not set
|
|
+
|
|
+#
|
|
+# Digest
|
|
+#
|
|
+# CONFIG_CRYPTO_CRC32C is not set
|
|
+# CONFIG_CRYPTO_MD4 is not set
|
|
+CONFIG_CRYPTO_MD5=y
|
|
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
|
|
+# CONFIG_CRYPTO_RMD128 is not set
|
|
+# CONFIG_CRYPTO_RMD160 is not set
|
|
+# CONFIG_CRYPTO_RMD256 is not set
|
|
+# CONFIG_CRYPTO_RMD320 is not set
|
|
+CONFIG_CRYPTO_SHA1=y
|
|
+# CONFIG_CRYPTO_SHA256 is not set
|
|
+# CONFIG_CRYPTO_SHA512 is not set
|
|
+# CONFIG_CRYPTO_TGR192 is not set
|
|
+# CONFIG_CRYPTO_WP512 is not set
|
|
+
|
|
+#
|
|
+# Ciphers
|
|
+#
|
|
+# CONFIG_CRYPTO_AES is not set
|
|
+# CONFIG_CRYPTO_ANUBIS is not set
|
|
+# CONFIG_CRYPTO_ARC4 is not set
|
|
+# CONFIG_CRYPTO_BLOWFISH is not set
|
|
+# CONFIG_CRYPTO_CAMELLIA is not set
|
|
+# CONFIG_CRYPTO_CAST5 is not set
|
|
+# CONFIG_CRYPTO_CAST6 is not set
|
|
+CONFIG_CRYPTO_DES=y
|
|
+# CONFIG_CRYPTO_FCRYPT is not set
|
|
+# CONFIG_CRYPTO_KHAZAD is not set
|
|
+# CONFIG_CRYPTO_SALSA20 is not set
|
|
+# CONFIG_CRYPTO_SEED is not set
|
|
+# CONFIG_CRYPTO_SERPENT is not set
|
|
+# CONFIG_CRYPTO_TEA is not set
|
|
+# CONFIG_CRYPTO_TWOFISH is not set
|
|
+
|
|
+#
|
|
+# Compression
|
|
+#
|
|
+CONFIG_CRYPTO_DEFLATE=y
|
|
+# CONFIG_CRYPTO_LZO is not set
|
|
+
|
|
+#
|
|
+# Random Number Generation
|
|
+#
|
|
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
|
+CONFIG_CRYPTO_HW=y
|
|
+
|
|
+#
|
|
+# Library routines
|
|
+#
|
|
+CONFIG_BITREVERSE=y
|
|
+CONFIG_GENERIC_FIND_LAST_BIT=y
|
|
+# CONFIG_CRC_CCITT is not set
|
|
+# CONFIG_CRC16 is not set
|
|
+# CONFIG_CRC_T10DIF is not set
|
|
+# CONFIG_CRC_ITU_T is not set
|
|
+CONFIG_CRC32=y
|
|
+# CONFIG_CRC7 is not set
|
|
+# CONFIG_LIBCRC32C is not set
|
|
+CONFIG_ZLIB_INFLATE=y
|
|
+CONFIG_ZLIB_DEFLATE=y
|
|
+CONFIG_PLIST=y
|
|
+CONFIG_HAS_IOMEM=y
|
|
+CONFIG_HAS_IOPORT=y
|
|
+CONFIG_HAS_DMA=y
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/Kconfig
|
|
@@ -0,0 +1,11 @@
|
|
+if ARCH_GOLDFISH
|
|
+
|
|
+menu "Goldfish Options"
|
|
+
|
|
+config MACH_GOLDFISH
|
|
+ bool "Goldfish (Virtual Platform)"
|
|
+ select CPU_ARM926T
|
|
+
|
|
+endmenu
|
|
+
|
|
+endif
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/Makefile
|
|
@@ -0,0 +1,9 @@
|
|
+#
|
|
+# Makefile for the linux kernel.
|
|
+#
|
|
+
|
|
+# Object file lists.
|
|
+
|
|
+obj-y := pdev_bus.o timer.o
|
|
+obj-$(CONFIG_MACH_GOLDFISH) += board-goldfish.o
|
|
+
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/Makefile.boot
|
|
@@ -0,0 +1,4 @@
|
|
+ zreladdr-y := 0x00008000
|
|
+params_phys-y := 0x00000100
|
|
+initrd_phys-y := 0x00800000
|
|
+
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/board-goldfish.c
|
|
@@ -0,0 +1,122 @@
|
|
+/* arch/arm/mach-goldfish/board-goldfish.c
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#include <linux/kernel.h>
|
|
+#include <linux/init.h>
|
|
+#include <linux/interrupt.h>
|
|
+#include <linux/irq.h>
|
|
+#include <linux/platform_device.h>
|
|
+#include <linux/delay.h>
|
|
+#include <linux/mtd/mtd.h>
|
|
+#include <linux/mtd/nand.h>
|
|
+#include <linux/mtd/partitions.h>
|
|
+#include <linux/input.h>
|
|
+
|
|
+#include <mach/hardware.h>
|
|
+#include <asm/io.h>
|
|
+#include <asm/mach-types.h>
|
|
+#include <asm/mach/arch.h>
|
|
+#include <asm/mach/flash.h>
|
|
+#include <asm/mach/map.h>
|
|
+#include <asm/mach/time.h>
|
|
+
|
|
+int GOLDFISH_READY = 0;
|
|
+
|
|
+static struct resource goldfish_pdev_bus_resources[] = {
|
|
+ {
|
|
+ .start = GOLDFISH_PDEV_BUS_BASE,
|
|
+ .end = GOLDFISH_PDEV_BUS_BASE + GOLDFISH_PDEV_BUS_END - 1,
|
|
+ .flags = IORESOURCE_IO,
|
|
+ },
|
|
+ {
|
|
+ .start = IRQ_PDEV_BUS,
|
|
+ .end = IRQ_PDEV_BUS,
|
|
+ .flags = IORESOURCE_IRQ,
|
|
+ }
|
|
+};
|
|
+
|
|
+
|
|
+struct platform_device goldfish_pdev_bus_device = {
|
|
+ .name = "goldfish_pdev_bus",
|
|
+ .id = -1,
|
|
+ .num_resources = ARRAY_SIZE(goldfish_pdev_bus_resources),
|
|
+ .resource = goldfish_pdev_bus_resources
|
|
+};
|
|
+
|
|
+static void __init goldfish_init(void)
|
|
+{
|
|
+ platform_device_register(&goldfish_pdev_bus_device);
|
|
+}
|
|
+
|
|
+void goldfish_mask_irq(unsigned int irq)
|
|
+{
|
|
+ writel(irq, IO_ADDRESS(GOLDFISH_INTERRUPT_BASE) + GOLDFISH_INTERRUPT_DISABLE);
|
|
+}
|
|
+
|
|
+void goldfish_unmask_irq(unsigned int irq)
|
|
+{
|
|
+ writel(irq, IO_ADDRESS(GOLDFISH_INTERRUPT_BASE) + GOLDFISH_INTERRUPT_ENABLE);
|
|
+}
|
|
+
|
|
+static struct irq_chip goldfish_irq_chip = {
|
|
+ .name = "goldfish",
|
|
+ .mask = goldfish_mask_irq,
|
|
+ .mask_ack = goldfish_mask_irq,
|
|
+ .unmask = goldfish_unmask_irq,
|
|
+};
|
|
+
|
|
+void goldfish_init_irq(void)
|
|
+{
|
|
+ unsigned int i;
|
|
+ uint32_t int_base = IO_ADDRESS(GOLDFISH_INTERRUPT_BASE);
|
|
+
|
|
+ /*
|
|
+ * Disable all interrupt sources
|
|
+ */
|
|
+ writel(1, int_base + GOLDFISH_INTERRUPT_DISABLE_ALL);
|
|
+
|
|
+ for (i = 0; i < NR_IRQS; i++) {
|
|
+ set_irq_chip(i, &goldfish_irq_chip);
|
|
+ set_irq_handler(i, handle_level_irq);
|
|
+ set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
|
|
+ }
|
|
+}
|
|
+
|
|
+static struct map_desc goldfish_io_desc[] __initdata = {
|
|
+ {
|
|
+ .virtual = IO_BASE,
|
|
+ .pfn = __phys_to_pfn(IO_START),
|
|
+ .length = IO_SIZE,
|
|
+ .type = MT_DEVICE
|
|
+ },
|
|
+};
|
|
+
|
|
+static void __init goldfish_map_io(void)
|
|
+{
|
|
+ iotable_init(goldfish_io_desc, ARRAY_SIZE(goldfish_io_desc));
|
|
+ GOLDFISH_READY = 1;
|
|
+}
|
|
+
|
|
+extern struct sys_timer goldfish_timer;
|
|
+
|
|
+MACHINE_START(GOLDFISH, "Goldfish")
|
|
+ .phys_io = 0xff000000,
|
|
+ .io_pg_offst = ((0xfe000000) >> 18) & 0xfffc,
|
|
+ .boot_params = 0x00000100,
|
|
+ .map_io = goldfish_map_io,
|
|
+ .init_irq = goldfish_init_irq,
|
|
+ .init_machine = goldfish_init,
|
|
+ .timer = &goldfish_timer,
|
|
+MACHINE_END
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/include/mach/dma.h
|
|
@@ -0,0 +1 @@
|
|
+/* include/asm-arm/arch-goldfish/dma.h */
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/include/mach/entry-macro.S
|
|
@@ -0,0 +1,34 @@
|
|
+/* include/asm-arm/arch-goldfish/entry-macro.S
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#include <mach/hardware.h>
|
|
+#include <mach/irqs.h>
|
|
+
|
|
+ .macro disable_fiq
|
|
+ .endm
|
|
+
|
|
+ .macro get_irqnr_preamble, base, tmp
|
|
+ .endm
|
|
+
|
|
+ .macro arch_ret_to_user, tmp1, tmp2
|
|
+ .endm
|
|
+
|
|
+ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
|
|
+ ldr \base, =IO_ADDRESS(GOLDFISH_INTERRUPT_BASE)
|
|
+ ldr \irqnr, [\base, #GOLDFISH_INTERRUPT_NUMBER]
|
|
+ ldr \irqstat, [\base, #GOLDFISH_INTERRUPT_STATUS]
|
|
+ teq \irqstat, #0
|
|
+ /* EQ will be set if no irqs pending */
|
|
+ .endm
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/include/mach/hardware.h
|
|
@@ -0,0 +1,44 @@
|
|
+/* include/asm-arm/arch-goldfish/hardware.h
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#ifndef __ASM_ARCH_HARDWARE_H
|
|
+#define __ASM_ARCH_HARDWARE_H
|
|
+
|
|
+#include <asm/sizes.h>
|
|
+
|
|
+/*
|
|
+ * Where in virtual memory the IO devices (timers, system controllers
|
|
+ * and so on)
|
|
+ */
|
|
+#define IO_BASE 0xfe000000 // VA of IO
|
|
+#define IO_SIZE 0x00800000 // How much?
|
|
+#define IO_START 0xff000000 // PA of IO
|
|
+
|
|
+#define GOLDFISH_INTERRUPT_BASE (0x0)
|
|
+#define GOLDFISH_INTERRUPT_STATUS (0x00) // number of pending interrupts
|
|
+#define GOLDFISH_INTERRUPT_NUMBER (0x04)
|
|
+#define GOLDFISH_INTERRUPT_DISABLE_ALL (0x08)
|
|
+#define GOLDFISH_INTERRUPT_DISABLE (0x0c)
|
|
+#define GOLDFISH_INTERRUPT_ENABLE (0x10)
|
|
+
|
|
+#define GOLDFISH_PDEV_BUS_BASE (0x1000)
|
|
+#define GOLDFISH_PDEV_BUS_END (0x100)
|
|
+
|
|
+#define GOLDFISH_TIMER_BASE (0x3000)
|
|
+
|
|
+/* macro to get at IO space when running virtually */
|
|
+#define IO_ADDRESS(x) ((x) + IO_BASE)
|
|
+
|
|
+#endif
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/include/mach/io.h
|
|
@@ -0,0 +1,24 @@
|
|
+/* include/asm-arm/arch-goldfish/io.h
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#ifndef __ASM_ARM_ARCH_IO_H
|
|
+#define __ASM_ARM_ARCH_IO_H
|
|
+
|
|
+#define IO_SPACE_LIMIT 0xffffffff
|
|
+
|
|
+#define __io(a) ((void __iomem *)(a))
|
|
+#define __mem_pci(a) (a)
|
|
+
|
|
+#endif
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/include/mach/irqs.h
|
|
@@ -0,0 +1,24 @@
|
|
+/* include/asm-arm/arch-goldfish/irqs.h
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#ifndef __ASM_ARCH_IRQS_H
|
|
+#define __ASM_ARCH_IRQS_H
|
|
+
|
|
+#define IRQ_PDEV_BUS (1)
|
|
+#define IRQ_TIMER (3)
|
|
+
|
|
+#define NR_IRQS (256)
|
|
+
|
|
+#endif
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/include/mach/memory.h
|
|
@@ -0,0 +1,35 @@
|
|
+/* include/asm-arm/arch-goldfish/memory.h
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#ifndef __ASM_ARCH_MEMORY_H
|
|
+#define __ASM_ARCH_MEMORY_H
|
|
+
|
|
+/*
|
|
+ * Physical DRAM offset.
|
|
+ */
|
|
+#define PHYS_OFFSET UL(0x00000000)
|
|
+#define BUS_OFFSET UL(0x00000000)
|
|
+
|
|
+/*
|
|
+ * Virtual view <-> DMA view memory address translations
|
|
+ * virt_to_bus: Used to translate the virtual address to an
|
|
+ * address suitable to be passed to set_dma_addr
|
|
+ * bus_to_virt: Used to convert an address for DMA operations
|
|
+ * to an address that the kernel can use.
|
|
+ */
|
|
+#define __virt_to_bus(x) (x - PAGE_OFFSET + BUS_OFFSET)
|
|
+#define __bus_to_virt(x) (x - BUS_OFFSET + PAGE_OFFSET)
|
|
+
|
|
+#endif
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/include/mach/system.h
|
|
@@ -0,0 +1,30 @@
|
|
+/* include/asm-arm/arch-goldfish/system.h
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#ifndef __ASM_ARCH_SYSTEM_H
|
|
+#define __ASM_ARCH_SYSTEM_H
|
|
+
|
|
+#include <asm/proc-fns.h>
|
|
+
|
|
+static inline void arch_idle(void)
|
|
+{
|
|
+ cpu_do_idle();
|
|
+}
|
|
+
|
|
+static inline void arch_reset(char mode, const char *cmd)
|
|
+{
|
|
+}
|
|
+
|
|
+#endif
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/include/mach/timer.h
|
|
@@ -0,0 +1,28 @@
|
|
+/* include/asm-arm/arch-goldfish/timer.h
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#ifndef __ASM_ARCH_TIMER_H
|
|
+#define __ASM_ARCH_TIMER_H
|
|
+
|
|
+enum {
|
|
+ TIMER_TIME_LOW = 0x00, // get low bits of current time and update TIMER_TIME_HIGH
|
|
+ TIMER_TIME_HIGH = 0x04, // get high bits of time at last TIMER_TIME_LOW read
|
|
+ TIMER_ALARM_LOW = 0x08, // set low bits of alarm and activate it
|
|
+ TIMER_ALARM_HIGH = 0x0c, // set high bits of next alarm
|
|
+ TIMER_CLEAR_INTERRUPT = 0x10,
|
|
+ TIMER_CLEAR_ALARM = 0x14
|
|
+};
|
|
+
|
|
+#endif
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/include/mach/timex.h
|
|
@@ -0,0 +1,24 @@
|
|
+/* include/asm-arm/arch-goldfish/timex.h
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#ifndef __ASM_ARCH_TIMEX_H
|
|
+#define __ASM_ARCH_TIMEX_H
|
|
+
|
|
+/*
|
|
+ * ??
|
|
+ */
|
|
+#define CLOCK_TICK_RATE (50000000 / 16)
|
|
+
|
|
+#endif
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/include/mach/uncompress.h
|
|
@@ -0,0 +1,40 @@
|
|
+/* include/asm-arm/arch-goldfish/uncompress.h
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#ifndef __ASM_ARCH_UNCOMPRESS_H
|
|
+#define __ASM_ARCH_UNCOMPRESS_H
|
|
+
|
|
+#define GOLDFISH_TTY_PUT_CHAR (*(volatile unsigned int *)0xff002000)
|
|
+
|
|
+/*
|
|
+ * This does not append a newline
|
|
+ */
|
|
+static void putc(int c)
|
|
+{
|
|
+ GOLDFISH_TTY_PUT_CHAR = c;
|
|
+}
|
|
+
|
|
+static inline void flush(void)
|
|
+{
|
|
+}
|
|
+
|
|
+/*
|
|
+ * nothing to do
|
|
+ */
|
|
+#define arch_decomp_setup()
|
|
+
|
|
+#define arch_decomp_wdog()
|
|
+
|
|
+#endif
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/include/mach/vmalloc.h
|
|
@@ -0,0 +1,21 @@
|
|
+/* include/asm-arm/arch-goldfish/vmalloc.h
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#ifndef __ASM_ARCH_VMALLOC_H
|
|
+#define __ASM_ARCH_VMALLOC_H
|
|
+
|
|
+#define VMALLOC_END (PAGE_OFFSET + 0x3c000000)
|
|
+
|
|
+#endif
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/pdev_bus.c
|
|
@@ -0,0 +1,222 @@
|
|
+/* arch/arm/mach-goldfish/pdev_bus.c
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#include <linux/kernel.h>
|
|
+#include <linux/init.h>
|
|
+#include <linux/interrupt.h>
|
|
+#include <linux/irq.h>
|
|
+#include <linux/platform_device.h>
|
|
+
|
|
+#include <mach/hardware.h>
|
|
+#include <asm/io.h>
|
|
+#include <asm/mach-types.h>
|
|
+#include <asm/mach/arch.h>
|
|
+
|
|
+#define PDEV_BUS_OP_DONE (0x00)
|
|
+#define PDEV_BUS_OP_REMOVE_DEV (0x04)
|
|
+#define PDEV_BUS_OP_ADD_DEV (0x08)
|
|
+
|
|
+#define PDEV_BUS_OP_INIT (0x00)
|
|
+
|
|
+#define PDEV_BUS_OP (0x00)
|
|
+#define PDEV_BUS_GET_NAME (0x04)
|
|
+#define PDEV_BUS_NAME_LEN (0x08)
|
|
+#define PDEV_BUS_ID (0x0c)
|
|
+#define PDEV_BUS_IO_BASE (0x10)
|
|
+#define PDEV_BUS_IO_SIZE (0x14)
|
|
+#define PDEV_BUS_IRQ (0x18)
|
|
+#define PDEV_BUS_IRQ_COUNT (0x1c)
|
|
+
|
|
+struct pdev_bus_dev {
|
|
+ struct list_head list;
|
|
+ struct platform_device pdev;
|
|
+ struct resource resources[0];
|
|
+};
|
|
+
|
|
+static void goldfish_pdev_worker(struct work_struct *work);
|
|
+
|
|
+static uint32_t pdev_bus_base;
|
|
+static uint32_t pdev_bus_irq;
|
|
+static LIST_HEAD(pdev_bus_new_devices);
|
|
+static LIST_HEAD(pdev_bus_registered_devices);
|
|
+static LIST_HEAD(pdev_bus_removed_devices);
|
|
+static DECLARE_WORK(pdev_bus_worker, goldfish_pdev_worker);
|
|
+
|
|
+
|
|
+static void goldfish_pdev_worker(struct work_struct *work)
|
|
+{
|
|
+ int ret;
|
|
+ struct pdev_bus_dev *pos, *n;
|
|
+
|
|
+ list_for_each_entry_safe(pos, n, &pdev_bus_removed_devices, list) {
|
|
+ list_del(&pos->list);
|
|
+ platform_device_unregister(&pos->pdev);
|
|
+ kfree(pos);
|
|
+ }
|
|
+ list_for_each_entry_safe(pos, n, &pdev_bus_new_devices, list) {
|
|
+ list_del(&pos->list);
|
|
+ ret = platform_device_register(&pos->pdev);
|
|
+ if(ret) {
|
|
+ printk("goldfish_pdev_worker failed to register device, %s\n", pos->pdev.name);
|
|
+ }
|
|
+ else {
|
|
+ printk("goldfish_pdev_worker registered %s\n", pos->pdev.name);
|
|
+ }
|
|
+ list_add(&pos->list, &pdev_bus_registered_devices);
|
|
+ }
|
|
+}
|
|
+
|
|
+static void goldfish_pdev_remove(void)
|
|
+{
|
|
+ struct pdev_bus_dev *pos, *n;
|
|
+ uint32_t base;
|
|
+
|
|
+ base = readl(pdev_bus_base + PDEV_BUS_IO_BASE);
|
|
+
|
|
+ list_for_each_entry_safe(pos, n, &pdev_bus_new_devices, list) {
|
|
+ if(pos->resources[0].start == base) {
|
|
+ list_del(&pos->list);
|
|
+ kfree(pos);
|
|
+ return;
|
|
+ }
|
|
+ }
|
|
+ list_for_each_entry_safe(pos, n, &pdev_bus_registered_devices, list) {
|
|
+ if(pos->resources[0].start == base) {
|
|
+ list_del(&pos->list);
|
|
+ list_add(&pos->list, &pdev_bus_removed_devices);
|
|
+ schedule_work(&pdev_bus_worker);
|
|
+ return;
|
|
+ }
|
|
+ };
|
|
+ printk("goldfish_pdev_remove could not find device at %x\n", base);
|
|
+}
|
|
+
|
|
+static int goldfish_new_pdev(void)
|
|
+{
|
|
+ struct pdev_bus_dev *dev;
|
|
+ uint32_t name_len;
|
|
+ uint32_t irq = -1, irq_count;
|
|
+ int resource_count = 2;
|
|
+ uint32_t base;
|
|
+ char *name;
|
|
+
|
|
+ base = readl(pdev_bus_base + PDEV_BUS_IO_BASE);
|
|
+
|
|
+ irq_count = readl(pdev_bus_base + PDEV_BUS_IRQ_COUNT);
|
|
+ name_len = readl(pdev_bus_base + PDEV_BUS_NAME_LEN);
|
|
+ if(irq_count)
|
|
+ resource_count++;
|
|
+
|
|
+ dev = kzalloc(sizeof(*dev) + sizeof(struct resource) * resource_count + name_len + 1, GFP_ATOMIC);
|
|
+ if(dev == NULL)
|
|
+ return -ENOMEM;
|
|
+
|
|
+ dev->pdev.num_resources = resource_count;
|
|
+ dev->pdev.resource = (struct resource *)(dev + 1);
|
|
+ dev->pdev.name = name = (char *)(dev->pdev.resource + resource_count);
|
|
+ dev->pdev.dev.coherent_dma_mask = ~0;
|
|
+
|
|
+ writel(name, pdev_bus_base + PDEV_BUS_GET_NAME);
|
|
+ name[name_len] = '\0';
|
|
+ dev->pdev.id = readl(pdev_bus_base + PDEV_BUS_ID);
|
|
+ dev->pdev.resource[0].start = base;
|
|
+ dev->pdev.resource[0].end = base + readl(pdev_bus_base + PDEV_BUS_IO_SIZE) - 1;
|
|
+ dev->pdev.resource[0].flags = IORESOURCE_MEM;
|
|
+ if(irq_count) {
|
|
+ irq = readl(pdev_bus_base + PDEV_BUS_IRQ);
|
|
+ dev->pdev.resource[1].start = irq;
|
|
+ dev->pdev.resource[1].end = irq + irq_count - 1;
|
|
+ dev->pdev.resource[1].flags = IORESOURCE_IRQ;
|
|
+ }
|
|
+
|
|
+ printk("goldfish_new_pdev %s at %x irq %d\n", name, base, irq);
|
|
+ list_add(&dev->list, &pdev_bus_new_devices);
|
|
+ schedule_work(&pdev_bus_worker);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static irqreturn_t goldfish_pdev_bus_interrupt(int irq, void *dev_id)
|
|
+{
|
|
+ irqreturn_t ret = IRQ_NONE;
|
|
+ while(1) {
|
|
+ uint32_t op = readl(pdev_bus_base + PDEV_BUS_OP);
|
|
+ switch(op) {
|
|
+ case PDEV_BUS_OP_DONE:
|
|
+ return IRQ_NONE;
|
|
+
|
|
+ case PDEV_BUS_OP_REMOVE_DEV:
|
|
+ goldfish_pdev_remove();
|
|
+ break;
|
|
+
|
|
+ case PDEV_BUS_OP_ADD_DEV:
|
|
+ goldfish_new_pdev();
|
|
+ break;
|
|
+ }
|
|
+ ret = IRQ_HANDLED;
|
|
+ }
|
|
+}
|
|
+
|
|
+static int __devinit goldfish_pdev_bus_probe(struct platform_device *pdev)
|
|
+{
|
|
+ int ret;
|
|
+ struct resource *r;
|
|
+ r = platform_get_resource(pdev, IORESOURCE_IO, 0);
|
|
+ if(r == NULL)
|
|
+ return -EINVAL;
|
|
+ pdev_bus_base = IO_ADDRESS(r->start);
|
|
+
|
|
+ r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
+ if(r == NULL)
|
|
+ return -EINVAL;
|
|
+ pdev_bus_irq = r->start;
|
|
+
|
|
+ ret = request_irq(pdev_bus_irq, goldfish_pdev_bus_interrupt, IRQF_SHARED, "goldfish_pdev_bus", pdev);
|
|
+ if(ret)
|
|
+ goto err_request_irq_failed;
|
|
+
|
|
+ writel(PDEV_BUS_OP_INIT, pdev_bus_base + PDEV_BUS_OP);
|
|
+
|
|
+err_request_irq_failed:
|
|
+ return ret;
|
|
+}
|
|
+
|
|
+static int __devexit goldfish_pdev_bus_remove(struct platform_device *pdev)
|
|
+{
|
|
+ free_irq(pdev_bus_irq, pdev);
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static struct platform_driver goldfish_pdev_bus_driver = {
|
|
+ .probe = goldfish_pdev_bus_probe,
|
|
+ .remove = __devexit_p(goldfish_pdev_bus_remove),
|
|
+ .driver = {
|
|
+ .name = "goldfish_pdev_bus"
|
|
+ }
|
|
+};
|
|
+
|
|
+static int __init goldfish_pdev_bus_init(void)
|
|
+{
|
|
+ return platform_driver_register(&goldfish_pdev_bus_driver);
|
|
+}
|
|
+
|
|
+static void __exit goldfish_pdev_bus_exit(void)
|
|
+{
|
|
+ platform_driver_unregister(&goldfish_pdev_bus_driver);
|
|
+}
|
|
+
|
|
+module_init(goldfish_pdev_bus_init);
|
|
+module_exit(goldfish_pdev_bus_exit);
|
|
+
|
|
--- /dev/null
|
|
+++ b/arch/arm/mach-goldfish/timer.c
|
|
@@ -0,0 +1,147 @@
|
|
+/* arch/arm/mach-goldfish/timer.c
|
|
+**
|
|
+** Copyright (C) 2007 Google, Inc.
|
|
+**
|
|
+** This software is licensed under the terms of the GNU General Public
|
|
+** License version 2, as published by the Free Software Foundation, and
|
|
+** may be copied, distributed, and modified under those terms.
|
|
+**
|
|
+** This program is distributed in the hope that it will be useful,
|
|
+** but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+** GNU General Public License for more details.
|
|
+**
|
|
+*/
|
|
+
|
|
+#include <linux/clockchips.h>
|
|
+#include <linux/interrupt.h>
|
|
+#include <linux/irq.h>
|
|
+
|
|
+#include <mach/timer.h>
|
|
+#include <mach/hardware.h>
|
|
+#include <asm/io.h>
|
|
+#include <asm/mach/time.h>
|
|
+
|
|
+#include <linux/platform_device.h>
|
|
+
|
|
+static DEFINE_SPINLOCK(goldfish_timer_lock);
|
|
+static int goldfish_timer_ready;
|
|
+
|
|
+static irqreturn_t goldfish_timer_interrupt(int irq, void *dev_id)
|
|
+{
|
|
+ uint32_t timer_base = IO_ADDRESS(GOLDFISH_TIMER_BASE);
|
|
+ struct clock_event_device *evt = dev_id;
|
|
+
|
|
+ writel(1, timer_base + TIMER_CLEAR_INTERRUPT);
|
|
+ if (evt->event_handler)
|
|
+ evt->event_handler(evt);
|
|
+ return IRQ_HANDLED;
|
|
+}
|
|
+
|
|
+static cycle_t goldfish_timer_read(struct clocksource *cs)
|
|
+{
|
|
+ uint32_t timer_base = IO_ADDRESS(GOLDFISH_TIMER_BASE);
|
|
+ unsigned long irqflags;
|
|
+ cycle_t rv;
|
|
+
|
|
+ spin_lock_irqsave(&goldfish_timer_lock, irqflags);
|
|
+ rv = readl(timer_base + TIMER_TIME_LOW);
|
|
+ rv |= (int64_t)readl(timer_base + TIMER_TIME_HIGH) << 32;
|
|
+ spin_unlock_irqrestore(&goldfish_timer_lock, irqflags);
|
|
+ return rv;
|
|
+}
|
|
+
|
|
+static int goldfish_timer_set_next_event(unsigned long cycles,
|
|
+ struct clock_event_device *evt)
|
|
+{
|
|
+ uint32_t timer_base = IO_ADDRESS(GOLDFISH_TIMER_BASE);
|
|
+ unsigned long irqflags;
|
|
+ uint64_t alarm;
|
|
+
|
|
+ spin_lock_irqsave(&goldfish_timer_lock, irqflags);
|
|
+ alarm = readl(timer_base + TIMER_TIME_LOW);
|
|
+ alarm |= (int64_t)readl(timer_base + TIMER_TIME_HIGH) << 32;
|
|
+ alarm += cycles;
|
|
+ writel(alarm >> 32, timer_base + TIMER_ALARM_HIGH);
|
|
+ writel(alarm, timer_base + TIMER_ALARM_LOW);
|
|
+ spin_unlock_irqrestore(&goldfish_timer_lock, irqflags);
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static void goldfish_timer_set_mode(enum clock_event_mode mode,
|
|
+ struct clock_event_device *evt)
|
|
+{
|
|
+ uint32_t timer_base = IO_ADDRESS(GOLDFISH_TIMER_BASE);
|
|
+ switch (mode) {
|
|
+ case CLOCK_EVT_MODE_RESUME:
|
|
+ case CLOCK_EVT_MODE_PERIODIC:
|
|
+ break;
|
|
+ case CLOCK_EVT_MODE_ONESHOT:
|
|
+ break;
|
|
+ case CLOCK_EVT_MODE_UNUSED:
|
|
+ case CLOCK_EVT_MODE_SHUTDOWN:
|
|
+ writel(1, timer_base + TIMER_CLEAR_ALARM);
|
|
+ break;
|
|
+ }
|
|
+}
|
|
+
|
|
+unsigned long long sched_clock(void)
|
|
+{
|
|
+ if(goldfish_timer_ready)
|
|
+ return ktime_to_ns(ktime_get());
|
|
+ else
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static struct clock_event_device goldfish_clockevent = {
|
|
+ .name = "goldfish_timer",
|
|
+ .features = CLOCK_EVT_FEAT_ONESHOT,
|
|
+ .max_delta_ns = ULONG_MAX,
|
|
+ .min_delta_ns = 1,
|
|
+ .mult = 1,
|
|
+ .shift = 0,
|
|
+ .rating = 200,
|
|
+ .set_next_event = goldfish_timer_set_next_event,
|
|
+ .set_mode = goldfish_timer_set_mode,
|
|
+};
|
|
+
|
|
+static struct clocksource goldfish_clocksource = {
|
|
+ .name = "goldfish_timer",
|
|
+ .rating = 200,
|
|
+ .read = goldfish_timer_read,
|
|
+ .mult = 1,
|
|
+ .mask = CLOCKSOURCE_MASK(64),
|
|
+ .shift = 0,
|
|
+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
|
+};
|
|
+
|
|
+static struct irqaction goldfish_timer_irq = {
|
|
+ .name = "Goldfish Timer Tick",
|
|
+ .flags = IRQF_DISABLED | IRQF_TIMER,
|
|
+ .handler = goldfish_timer_interrupt,
|
|
+ .dev_id = &goldfish_clockevent,
|
|
+};
|
|
+
|
|
+static void __init goldfish_timer_init(void)
|
|
+{
|
|
+ int res;
|
|
+
|
|
+ res = clocksource_register(&goldfish_clocksource);
|
|
+ if (res)
|
|
+ printk(KERN_ERR "goldfish_timer_init: "
|
|
+ "clocksource_register failed\n");
|
|
+
|
|
+ res = setup_irq(IRQ_TIMER, &goldfish_timer_irq);
|
|
+ if (res)
|
|
+ printk(KERN_ERR "goldfish_timer_init: setup_irq failed\n");
|
|
+
|
|
+ goldfish_clockevent.cpumask = cpumask_of(0);
|
|
+ clockevents_register_device(&goldfish_clockevent);
|
|
+
|
|
+ goldfish_timer_ready = 1;
|
|
+}
|
|
+
|
|
+struct sys_timer goldfish_timer = {
|
|
+ .init = goldfish_timer_init,
|
|
+};
|
|
+
|