Changed src in Beta with example to all 4 PWM at 100%

2025-04-21 12:27:27 +03:00 · 2010-10-30 22:27:00 -05:00
parent 8f2a9cc1d6
commit cc225fc088
49 changed files with 38495 additions and 19983 deletions
--- a/Examples/Beta1/logic/build/xst/work/hdllib.ref
+++ b/Examples/Beta1/logic/build/xst/work/hdllib.ref
@@ -1,4 +1,4 @@
-MO PWM NULL ../PWM.v vlg50/_p_w_m.bin 1288481438
-MO beta NULL ../beta.v vlg5C/beta.bin 1288481438
-MO PuenteH NULL ../PuenteH.v vlg69/_puente_h.bin 1288481438
-MO enco NULL ../enco.v vlg6D/enco.bin 1288481438
+MO PWM NULL ../PWM.v vlg50/_p_w_m.bin 1288492397
+MO beta NULL ../beta.v vlg5C/beta.bin 1288492397
+MO PuenteH NULL ../PuenteH.v vlg69/_puente_h.bin 1288492397
+MO enco NULL ../enco.v vlg6D/enco.bin 1288492397
--- a/Examples/Beta1/logic/build/xst/work/vlg50/_p_w_m.bin
+++ b/Examples/Beta1/logic/build/xst/work/vlg50/_p_w_m.bin
--- a/Examples/Beta1/logic/build/xst/work/vlg5C/beta.bin
+++ b/Examples/Beta1/logic/build/xst/work/vlg5C/beta.bin
--- a/Examples/Beta1/logic/build/xst/work/vlg69/_puente_h.bin
+++ b/Examples/Beta1/logic/build/xst/work/vlg69/_puente_h.bin
--- a/Examples/Beta1/logic/build/xst/work/vlg6D/enco.bin
+++ b/Examples/Beta1/logic/build/xst/work/vlg6D/enco.bin