1
0
mirror of git://projects.qi-hardware.com/wernermisc.git synced 2024-11-15 10:30:37 +02:00
wernermisc/bacon/case/case.fpd

146 lines
3.6 KiB
Plaintext
Raw Normal View History

/*
* Draw a rounded edge in one quadrant
*
* Draw a arc from corner point vc plus rector ra to vc+rb. vc+ra is stored
* in va and vc+rb is stored in vb.
*/
#define Q(va, vb, vc, ra, rb) \
va: vec vc ra; \
vb: vec vc rb; \
vc##_center: vec va rb; \
arc vc##_center va vb
/*
* Rectangle with rounded corners.
*
* pfx is the prefix for all the names generated by this macro. origin is the
* lower left corner. w and h are the width and height. r is the radius of the
* corners.
*/
#define RRECT_SETUP(pfx, origin, w, h, r) \
pfx##ll: vec origin(0mm, 0mm); \
pfx##lr: vec pfx##ll(w, 0mm); \
pfx##ul: vec pfx##ll(0mm, h); \
pfx##ur: vec pfx##ll(w, h); \
Q(pfx##lly, pfx##llx, pfx##ll, (0mm, r), (r, 0mm)); \
Q(pfx##lrx, pfx##lry, pfx##lr, (-r, 0mm), (0mm, r)); \
Q(pfx##ulx, pfx##uly, pfx##ul, (r, 0mm), (0mm, -r)); \
Q(pfx##ury, pfx##urx, pfx##ur, (0mm, -r), (-r, 0mm))
#define RRECT_DRAW_LINES(pfx) \
line pfx##llx pfx##lrx; \
line pfx##ulx pfx##urx; \
line pfx##lly pfx##uly; \
line pfx##lry pfx##ury
#define RRECT(pfx, origin, w, h, r) \
RRECT_SETUP(pfx, origin, w, h, r); \
RRECT_DRAW_LINES(pfx)
/* ----- Top part ---------------------------------------------------------- */
frame top_outline {
RRECT(edge_, @, width, length, ro_edge)
}
frame top_window {
loop if = 1, top_window
set off = topborder+topridge
frame top_outline @
win_orig: vec @(off+pcbgap+win_x0, off)
RRECT(win_, win_orig, win_x1-win_x0, length-2*off, win_r)
cmp_orig: vec @(off+pcbgap+cmp_x0, off+pcbgap+cmp_y0)
RRECT(cmp_, cmp_orig, cmp_x1-cmp_x0, cmp_y1-cmp_y0, cmp_r)
}
frame top_pcb {
loop if = 1, top_pcb
set off = topborder+topridge
frame top_outline @
ll: vec @(off, off)
RRECT(pcb_, ll, width-2*off, length-2*off, ri_ridge)
}
frame top_ridge {
loop if = 1, top_ridge
set inside = topborder+topridge
ro: vec @(topborder, topborder)
RRECT(ridge_o_, ro, width-2*topborder, length-2*topborder, ro_ridge)
ri: vec ro(topridge, topridge)
RRECT(ridge_i_, ri, width-2*inside, length-2*inside, ri_ridge)
}
frame top_surface {
loop if = 1, top_surface
frame top_outline @
}
/* ----- Main -------------------------------------------------------------- */
package "top-$part-$z"
unit mm
table
{ part, z, top_surface, top_window, top_pcb, top_ridge }
{ "top_surface", 2.5, 1, 0, 0, 0 }
{ "top_window", 1.5, 0, 1, 0, 0 }
// { "top_pcb", 0.5, 0, 0, 1, 0 }
{ "top_ridge", 0.5, 0, 0, 0, 1 }
table
{ pcbw, pcbl, pcbgap }
{ 20mm, 45mm, 0.2mm }
table
/* window position relative to left edge of PCB */
{ topridge, topborder, win_x0, win_x1, win_r }
{ 1.0mm, 1.0mm, 1.0mm, 5.0mm, 1.6mm }
table
/* component area position relative to lower left corner of PCB */
{ cmp_x0, cmp_y0, cmp_x1, cmp_y1, cmp_r }
{ 6.5mm, 1.0mm, 19.5mm, 30.0mm, 2.0mm }
set width = pcbw+2*(pcbgap+topridge+topborder)
set length = pcbl+2*(pcbgap+topridge+topborder)
set ri_ridge = 2.0mm
set ro_ridge = ri_ridge+topridge
/*
* ro_edge is an outer edge, so we can make the radius smaller than ro_ridge,
* for added strength and less fruity esthetics.
*/
set ro_edge = 1.5mm
frame top_ridge @
frame top_pcb @
frame top_window @
frame top_surface @
measx top_outline.edge_ul -> top_outline.edge_ur 4mm
measy top_outline.edge_ll -> top_outline.edge_ul 4mm
measx top_pcb.pcb_ul -> top_pcb.pcb_ur 3mm
measy top_pcb.pcb_ll -> top_pcb.pcb_ul 3mm
measx top_ridge.ridge_o_ul -> top_ridge.ridge_o_ur 4mm
measy top_ridge.ridge_o_ll -> top_ridge.ridge_o_ul 4mm
measx top_ridge.ridge_i_ul -> top_ridge.ridge_i_ur 3mm
measy top_ridge.ridge_i_ll -> top_ridge.ridge_i_ul 3mm