From 59901f52c59a4506db60bf820ca270f4309664bf Mon Sep 17 00:00:00 2001 From: Werner Almesberger Date: Sat, 12 Feb 2011 10:27:03 -0300 Subject: [PATCH] zprobe: improvised digital high-Z probe - zprobe.pro, zprobe.sch, zprobe.cmp, zprobe.brd: Z-probe design - 74hc04-3.lib: schematics symbol for triple 7404-style inverter - ssop8-p-0_50a.fpd: footprint for Toshiba TC7W04FK - Makefile: combined design automation and module conversion --- zprobe/74hc04-3.lib | 21 ++ zprobe/Makefile | 34 +++ zprobe/ssop8-p-0_50a.fpd | 64 +++++ zprobe/zprobe.brd | 527 +++++++++++++++++++++++++++++++++++++++ zprobe/zprobe.cmp | 87 +++++++ zprobe/zprobe.pro | 68 +++++ zprobe/zprobe.sch | 195 +++++++++++++++ 7 files changed, 996 insertions(+) create mode 100644 zprobe/74hc04-3.lib create mode 100644 zprobe/Makefile create mode 100644 zprobe/ssop8-p-0_50a.fpd create mode 100644 zprobe/zprobe.brd create mode 100644 zprobe/zprobe.cmp create mode 100644 zprobe/zprobe.pro create mode 100644 zprobe/zprobe.sch diff --git a/zprobe/74hc04-3.lib b/zprobe/74hc04-3.lib new file mode 100644 index 0000000..05b36fa --- /dev/null +++ b/zprobe/74hc04-3.lib @@ -0,0 +1,21 @@ +EESchema-LIBRARY Version 2.3 Date: Sat Feb 12 09:32:55 2011 +# +# TC7W04 +# +DEF TC7W04 U 0 40 Y Y 1 F N +F0 "U" -500 250 60 H V C CNN +F1 "TC7W04" 0 0 60 H V C CNN +DRAW +S -400 300 400 -300 0 1 0 N +X 1A 1 -300 -600 300 U 50 50 1 1 I +X 3Y 2 -100 -600 300 U 50 50 1 1 O +X 2A 3 100 -600 300 U 50 50 1 1 I +X GND 4 300 -600 300 U 50 50 1 1 W +X 2Y 5 300 600 300 D 50 50 1 1 O +X 3A 6 100 600 300 D 50 50 1 1 I +X 1Y 7 -100 600 300 D 50 50 1 1 O +X VCC 8 -300 600 300 D 50 50 1 1 W +ENDDRAW +ENDDEF +# +#End Library diff --git a/zprobe/Makefile b/zprobe/Makefile new file mode 100644 index 0000000..18e5a10 --- /dev/null +++ b/zprobe/Makefile @@ -0,0 +1,34 @@ +PLOT_BRD = pcbnew --plot=ps_a4 --ps-pads-drill-opt=none --fill-all-zones + +NAME = zprobe + +.PHONY: all sch brd front back clean + +all: ssop8-p-0_50a.mod + @echo "make what ? target: sch brd front back clean" + @exit 1 + +%.mod: %.fpd + fped -k $< >$@ || { rm -f $@; exit 1; } + +sch: + eeschema `pwd`/$(NAME).sch + +brd: + pcbnew `pwd`/$(NAME).brd + +front: $(NAME)-Front.ps + lpr $< + +back: $(NAME)-Back.ps + lpr $< + +%-Front.ps: %.brd + $(PLOT_BRD) -l Front --mirror $< + +%-Back.ps: %.brd + $(PLOT_BRD) -l Back $< + +clean: + rm -f $(NAME)-Front.ps $(NAME)-Back.ps + rm -f $(NAME).drl $(NAME)-PCB_Edges.gbr diff --git a/zprobe/ssop8-p-0_50a.fpd b/zprobe/ssop8-p-0_50a.fpd new file mode 100644 index 0000000..217eb82 --- /dev/null +++ b/zprobe/ssop8-p-0_50a.fpd @@ -0,0 +1,64 @@ +/* MACHINE-GENERATED ! */ + +frame pad { + __0: vec @(px/2, py/2) + __1: vec @(-px/2, -py/2) + pad "$n" . __0 +} + +frame top { + set x = e*(N/4-i+0.5) + + set y = cy + + set n = i+N/2 + + __0: vec @(x, y) + frame pad . +} + +frame bottom { + set x = e*(i-N/4-0.5) + + set y = -cy + + set n = i + + __0: vec @(x, -cy) + frame pad . +} + +frame pins { + loop i = 1, N/2 + + frame bottom @ + frame top @ +} + +frame outline { + __0: vec @(ox/2, oy/2) + __1: vec @(ox/2, -oy/2) + line __0 . w + __2: vec @(-ox/2, oy/2) + __3: vec @(-ox/2, -oy/2) + line . __2 w +} + +package "SSOP8-P-0.50A" +unit mm + +table + { N, ox, oy, cy, px, py, e } + { 8, 2mm, 2.3mm, (2.3mm+3.1mm)/4, 0.2mm, (3.1mm-2.3mm)/2+0.4mm, 0.5mm } + +set w = 5mil + +frame outline @ +frame pins @ +measy outline.__3 >> outline.__2 1.2mm +measy pad.__0 -> pad.__1 1mm +measy pad.__1 >> pad.__0 2mm +measx outline.__2 >> outline.__0 1.7mm +measx top.__0 -> top.__0 1mm +measx pad.__1 -> pad.__0 -0.5mm +measy pad.__1 -> pad.__0 -3mm diff --git a/zprobe/zprobe.brd b/zprobe/zprobe.brd new file mode 100644 index 0000000..e7390d6 --- /dev/null +++ b/zprobe/zprobe.brd @@ -0,0 +1,527 @@ +PCBNEW-BOARD Version 1 date Sat Feb 12 10:16:38 2011 + +# Created by Pcbnew(2010-12-27 BZR 2685)-unstable + +$GENERAL +LayerCount 2 +Ly 1FFF8001 +EnabledLayers 12208001 +Links 14 +NoConn 0 +Di 53410 37574 58290 42176 +Ndraw 9 +Ntrack 40 +Nzone 0 +BoardThickness 630 +Nmodule 12 +Nnets 8 +$EndGENERAL + +$SHEETDESCR +Sheet A4 11700 8267 +Title "" +Date "12 feb 2011" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndSHEETDESCR + +$SETUP +InternalUnit 0.000100 INCH +ZoneGridSize 250 +Layers 2 +Layer[0] Back signal +Layer[15] Front signal +TrackWidth 100 +TrackClearence 90 +ZoneClearence 200 +TrackMinWidth 80 +DrawSegmWidth 150 +EdgeSegmWidth 50 +ViaSize 350 +ViaDrill 250 +ViaMinSize 350 +ViaMinDrill 200 +MicroViaSize 200 +MicroViaDrill 50 +MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 +TextPcbWidth 80 +TextPcbSize 500 500 +EdgeModWidth 150 +TextModSize 600 600 +TextModWidth 120 +PadSize 600 600 +PadDrill 320 +Pad2MaskClearance 100 +AuxiliaryAxisOrg 0 0 +$EndSETUP + +$EQUIPOT +Na 0 "" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 1 "N-000001" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 2 "N-000003" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 3 "N-000004" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 4 "N-000005" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 5 "N-000006" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 6 "N-000007" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 7 "N-000008" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 90 +TrackWidth 100 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "N-000001" +AddNet "N-000003" +AddNet "N-000004" +AddNet "N-000005" +AddNet "N-000006" +AddNet "N-000007" +AddNet "N-000008" +$EndNCLASS +$MODULE 0603 +Po 55500 40100 2700 15 4D3AED1A 4D567E17 ~~ +Li 0603 +Sc 4D567E17 +AR /4D56752C +Op 0 0 0 +At SMD +T0 0 -150 200 200 2700 40 N V 25 N"C1" +T1 0 150 200 200 2700 40 N I 25 N"100nF" +DS -531 275 -531 -275 50 21 +DS -531 -275 531 -275 50 21 +DS 531 -275 531 275 50 21 +DS 531 275 -531 275 50 21 +$PAD +Sh "1" R 276 354 0 0 2700 +Dr 0 0 0 +At SMD N 00888000 +Ne 7 "N-000008" +Po -295 0 +$EndPAD +$PAD +Sh "2" R 276 354 0 0 2700 +Dr 0 0 0 +At SMD N 00888000 +Ne 6 "N-000007" +Po 295 0 +$EndPAD +$EndMODULE 0603 +$MODULE PAD_120x60 +Po 54100 38500 900 15 4D4ADC05 4D567E18 ~~ +Li PAD_120x60 +Sc 4D567E18 +AR /4D5675CE +Op 0 0 0 +At SMD +T0 0 -150 200 200 900 40 N V 25 N"P4" +T1 0 150 200 200 900 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 1200 600 0 0 900 +Dr 0 0 0 +At SMD N 00808000 +Ne 5 "N-000006" +Po 0 0 +$EndPAD +$EndMODULE PAD_120x60 +$MODULE PAD_120x60 +Po 56600 38500 900 15 4D4ADC05 4D567E1A ~~ +Li PAD_120x60 +Sc 4D567E1A +AR /4D5675CF +Op 0 0 0 +At SMD +T0 0 -150 200 200 900 40 N V 25 N"P8" +T1 0 150 200 200 900 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 1200 600 0 0 900 +Dr 0 0 0 +At SMD N 00808000 +Ne 6 "N-000007" +Po 0 0 +$EndPAD +$EndMODULE PAD_120x60 +$MODULE PAD_120x60 +Po 55100 38500 900 15 4D4ADC05 4D567E1C ~~ +Li PAD_120x60 +Sc 4D567E1C +AR /4D5675D9 +Op 0 0 0 +At SMD +T0 0 -150 200 200 900 40 N V 25 N"P5" +T1 0 150 200 200 900 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 1200 600 0 0 900 +Dr 0 0 0 +At SMD N 00808000 +Ne 6 "N-000007" +Po 0 0 +$EndPAD +$EndMODULE PAD_120x60 +$MODULE PAD_120x60 +Po 57600 38500 900 15 4D4ADC05 4D567E1E ~~ +Li PAD_120x60 +Sc 4D567E1E +AR /4D5675DB +Op 0 0 0 +At SMD +T0 0 -150 200 200 900 40 N V 25 N"P7" +T1 0 150 200 200 900 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 1200 600 0 0 900 +Dr 0 0 0 +At SMD N 00808000 +Ne 4 "N-000005" +Po 0 0 +$EndPAD +$EndMODULE PAD_120x60 +$MODULE PAD_2mm +Po 55500 41400 900 15 4D4ADC05 4D567E1F ~~ +Li PAD_2mm +Sc 4D567E1F +AR /4D5674A3 +Op 0 0 0 +At SMD +T0 0 -150 200 200 900 40 N V 25 N"P2" +T1 0 150 200 200 900 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 786 196 0 0 900 +Dr 0 0 0 +At SMD N 00808000 +Ne 6 "N-000007" +Po 0 0 +$EndPAD +$EndMODULE PAD_2mm +$MODULE PAD_2mm +Po 56100 41400 900 15 4D4ADC05 4D567E21 ~~ +Li PAD_2mm +Sc 4D567E21 +AR /4D5674AA +Op 0 0 0 +At SMD +T0 0 -150 200 200 900 40 N V 25 N"P3" +T1 0 150 200 200 900 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 786 196 0 0 900 +Dr 0 0 0 +At SMD N 00808000 +Ne 2 "N-000003" +Po 0 0 +$EndPAD +$EndMODULE PAD_2mm +$MODULE PAD_2mm +Po 56700 41400 900 15 4D4ADC05 4D567E23 ~~ +Li PAD_2mm +Sc 4D567E23 +AR /4D5674AC +Op 0 0 0 +At SMD +T0 0 -150 200 200 900 40 N V 25 N"P6" +T1 0 150 200 200 900 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 786 196 0 0 900 +Dr 0 0 0 +At SMD N 00808000 +Ne 3 "N-000004" +Po 0 0 +$EndPAD +$EndMODULE PAD_2mm +$MODULE PAD_2mm +Po 54900 41400 900 15 4D4ADC05 4D567E25 ~~ +Li PAD_2mm +Sc 4D567E25 +AR /4D5674AE +Op 0 0 0 +At SMD +T0 0 -150 200 200 900 40 N V 25 N"P1" +T1 0 150 200 200 900 40 N I 25 N"CONN_1" +$PAD +Sh "1" O 786 196 0 0 900 +Dr 0 0 0 +At SMD N 00808000 +Ne 7 "N-000008" +Po 0 0 +$EndPAD +$EndMODULE PAD_2mm +$MODULE SSOP8-P-0.50A +Po 56500 40100 0 15 4D567CFE 4D567E26 ~~ +Li SSOP8-P-0.50A +Sc 4D567E26 +AR /4D56749B +Op 0 0 0 +At SMD +T0 0 -150 200 200 0 40 N V 25 N"U1" +T1 0 150 200 200 0 40 N I 25 N"TC7W04" +DS 393 -452 393 452 50 21 +DS -393 452 -393 -452 50 21 +$PAD +Sh "1" R 79 314 0 0 0 +Dr 0 0 0 +At SMD N 00888000 +Ne 2 "N-000003" +Po -294 531 +$EndPAD +$PAD +Sh "5" R 79 314 0 0 0 +Dr 0 0 0 +At SMD N 00888000 +Ne 4 "N-000005" +Po 294 -531 +$EndPAD +$PAD +Sh "2" R 78 314 0 0 0 +Dr 0 0 0 +At SMD N 00888000 +Ne 0 "" +Po -98 531 +$EndPAD +$PAD +Sh "6" R 78 314 0 0 0 +Dr 0 0 0 +At SMD N 00888000 +Ne 6 "N-000007" +Po 98 -531 +$EndPAD +$PAD +Sh "3" R 78 314 0 0 0 +Dr 0 0 0 +At SMD N 00888000 +Ne 3 "N-000004" +Po 98 531 +$EndPAD +$PAD +Sh "7" R 78 314 0 0 0 +Dr 0 0 0 +At SMD N 00888000 +Ne 5 "N-000006" +Po -98 -531 +$EndPAD +$PAD +Sh "4" R 79 314 0 0 0 +Dr 0 0 0 +At SMD N 00888000 +Ne 6 "N-000007" +Po 294 531 +$EndPAD +$PAD +Sh "8" R 79 314 0 0 0 +Dr 0 0 0 +At SMD N 00888000 +Ne 7 "N-000008" +Po -294 -531 +$EndPAD +$EndMODULE SSOP8-P-0.50A +$MODULE 0603 +Po 54300 40100 900 15 4D3AED1A 4D568774 ~~ +Li 0603 +Sc 4D568774 +AR /4D5686D8 +Op 0 0 0 +At SMD +T0 0 -150 200 200 900 40 N V 25 N"R1" +T1 0 150 200 200 900 40 N I 25 N"100" +DS -531 275 -531 -275 50 21 +DS -531 -275 531 -275 50 21 +DS 531 -275 531 275 50 21 +DS 531 275 -531 275 50 21 +$PAD +Sh "1" R 276 354 0 0 900 +Dr 0 0 0 +At SMD N 00888000 +Ne 7 "N-000008" +Po -295 0 +$EndPAD +$PAD +Sh "2" R 276 354 0 0 900 +Dr 0 0 0 +At SMD N 00888000 +Ne 1 "N-000001" +Po 295 0 +$EndPAD +$EndMODULE 0603 +$MODULE 0603 +Po 54900 40100 2700 15 4D3AED1A 4D568776 ~~ +Li 0603 +Sc 4D568776 +AR /4D5686DC +Op 0 0 0 +At SMD +T0 0 -150 200 200 2700 40 N V 25 N"D1" +T1 0 150 200 200 2700 40 N I 25 N"LTST-C190KRKT" +DS -531 275 -531 -275 50 21 +DS -531 -275 531 -275 50 21 +DS 531 -275 531 275 50 21 +DS 531 275 -531 275 50 21 +$PAD +Sh "1" R 276 354 0 0 2700 +Dr 0 0 0 +At SMD N 00888000 +Ne 1 "N-000001" +Po -295 0 +$EndPAD +$PAD +Sh "2" R 276 354 0 0 2700 +Dr 0 0 0 +At SMD N 00888000 +Ne 6 "N-000007" +Po 295 0 +$EndPAD +$EndMODULE 0603 +$TEXTPCB +Te "11.9x11.4 mm" +Po 55800 42800 500 500 80 0 +De 25 1 0 Normal +$EndTEXTPCB +$TEXTPCB +Te "AB" +Po 57500 41400 500 500 80 0 +De 15 1 0 Normal +$EndTEXTPCB +$TEXTPCB +Te "VG" +Po 54200 41400 500 500 80 0 +De 15 1 0 Normal +$EndTEXTPCB +$TEXTPCB +Te "GB" +Po 57500 40400 500 500 80 0 +De 15 1 0 Normal +$EndTEXTPCB +$TEXTPCB +Te "AG" +Po 57500 39700 500 500 80 0 +De 15 1 0 Normal +$EndTEXTPCB +$DRAWSEGMENT +Po 0 58200 42100 58200 37600 50 +De 28 0 900 0 0 +$EndDRAWSEGMENT +$DRAWSEGMENT +Po 0 53500 37600 53500 42100 50 +De 28 0 900 0 0 +$EndDRAWSEGMENT +$DRAWSEGMENT +Po 0 58200 42100 53500 42100 50 +De 28 0 900 0 0 +$EndDRAWSEGMENT +$DRAWSEGMENT +Po 0 53500 37600 58200 37600 50 +De 28 0 900 0 0 +$EndDRAWSEGMENT +$TRACK +Po 0 54300 39805 54900 39805 100 -1 +De 15 0 1 0 C00 +Po 0 56206 40631 56206 40894 100 -1 +De 15 0 2 0 800 +Po 0 56100 41000 56100 41400 100 -1 +De 15 0 2 0 400 +Po 0 56206 40894 56100 41000 100 -1 +De 15 0 2 0 0 +Po 0 56598 40631 56598 40898 100 -1 +De 15 0 3 0 800 +Po 0 56700 41000 56700 41400 100 -1 +De 15 0 3 0 400 +Po 0 56598 40898 56700 41000 100 -1 +De 15 0 3 0 0 +Po 0 56794 39569 56794 39506 100 -1 +De 15 0 4 0 800 +Po 0 57600 38700 57600 38500 100 -1 +De 15 0 4 0 400 +Po 0 56794 39506 57600 38700 100 -1 +De 15 0 4 0 0 +Po 0 56402 39569 56402 39302 100 -1 +De 15 0 5 0 800 +Po 0 54100 38700 54100 38500 100 -1 +De 15 0 5 0 400 +Po 0 54700 39300 54100 38700 100 -1 +De 15 0 5 0 0 +Po 0 55400 39300 54700 39300 100 -1 +De 15 0 5 0 0 +Po 0 55500 39200 55400 39300 100 -1 +De 15 0 5 0 0 +Po 0 56300 39200 55500 39200 100 -1 +De 15 0 5 0 0 +Po 0 56402 39302 56300 39200 100 -1 +De 15 0 5 0 0 +Po 0 54900 40395 55500 40395 100 -1 +De 15 0 6 0 C00 +Po 0 56598 39569 56598 40100 100 -1 +De 15 0 6 0 800 +Po 0 55500 40395 55505 40395 100 -1 +De 15 0 6 0 800 +Po 0 55505 40395 55800 40100 100 -1 +De 15 0 6 0 0 +Po 0 55800 40100 56598 40100 100 -1 +De 15 0 6 0 0 +Po 0 56794 40194 56794 40631 100 -1 +De 15 0 6 0 400 +Po 0 56598 40100 56700 40100 100 -1 +De 15 0 6 0 0 +Po 0 56700 40100 56794 40194 100 -1 +De 15 0 6 0 0 +Po 0 56600 38500 55100 38500 100 -1 +De 15 0 6 0 C00 +Po 0 56598 39569 56598 38502 100 -1 +De 15 0 6 0 800 +Po 0 56598 38502 56600 38500 100 -1 +De 15 0 6 0 400 +Po 0 55500 40395 55500 41400 100 -1 +De 15 0 6 0 C00 +Po 0 54900 41400 54900 41200 100 -1 +De 15 0 7 0 800 +Po 0 54300 40600 54300 40395 100 -1 +De 15 0 7 0 400 +Po 0 54900 41200 54300 40600 100 -1 +De 15 0 7 0 0 +Po 0 54300 40395 54305 40395 100 -1 +De 15 0 7 0 800 +Po 0 55205 40100 55500 39805 100 -1 +De 15 0 7 0 400 +Po 0 54600 40100 55205 40100 100 -1 +De 15 0 7 0 0 +Po 0 54305 40395 54600 40100 100 -1 +De 15 0 7 0 0 +Po 0 56206 39569 56206 39506 100 -1 +De 15 0 7 0 800 +Po 0 55905 39400 55500 39805 100 -1 +De 15 0 7 0 400 +Po 0 56100 39400 55905 39400 100 -1 +De 15 0 7 0 0 +Po 0 56206 39506 56100 39400 100 -1 +De 15 0 7 0 0 +$EndTRACK +$ZONE +$EndZONE +$EndBOARD diff --git a/zprobe/zprobe.cmp b/zprobe/zprobe.cmp new file mode 100644 index 0000000..95b8ece --- /dev/null +++ b/zprobe/zprobe.cmp @@ -0,0 +1,87 @@ +Cmp-Mod V01 Created by CvPCB (2010-12-27 BZR 2685)-unstable date = Sat Feb 12 10:13:19 2011 + +BeginCmp +TimeStamp = /4D56752C; +Reference = C1; +ValeurCmp = 100nF; +IdModule = 0603; +EndCmp + +BeginCmp +TimeStamp = /4D5686DC; +Reference = D1; +ValeurCmp = LTST-C190KRKT; +IdModule = 0603; +EndCmp + +BeginCmp +TimeStamp = /4D5674AE; +Reference = P1; +ValeurCmp = CONN_1; +IdModule = PAD_2mm; +EndCmp + +BeginCmp +TimeStamp = /4D5674A3; +Reference = P2; +ValeurCmp = CONN_1; +IdModule = PAD_2mm; +EndCmp + +BeginCmp +TimeStamp = /4D5674AA; +Reference = P3; +ValeurCmp = CONN_1; +IdModule = PAD_2mm; +EndCmp + +BeginCmp +TimeStamp = /4D5675CE; +Reference = P4; +ValeurCmp = CONN_1; +IdModule = PAD_120x60; +EndCmp + +BeginCmp +TimeStamp = /4D5675D9; +Reference = P5; +ValeurCmp = CONN_1; +IdModule = PAD_120x60; +EndCmp + +BeginCmp +TimeStamp = /4D5674AC; +Reference = P6; +ValeurCmp = CONN_1; +IdModule = PAD_2mm; +EndCmp + +BeginCmp +TimeStamp = /4D5675DB; +Reference = P7; +ValeurCmp = CONN_1; +IdModule = PAD_120x60; +EndCmp + +BeginCmp +TimeStamp = /4D5675CF; +Reference = P8; +ValeurCmp = CONN_1; +IdModule = PAD_120x60; +EndCmp + +BeginCmp +TimeStamp = /4D5686D8; +Reference = R1; +ValeurCmp = 100; +IdModule = 0603; +EndCmp + +BeginCmp +TimeStamp = /4D56749B; +Reference = U1; +ValeurCmp = TC7W04; +IdModule = SSOP8-P-0.50A; +EndCmp + +EndListe diff --git a/zprobe/zprobe.pro b/zprobe/zprobe.pro new file mode 100644 index 0000000..51d488d --- /dev/null +++ b/zprobe/zprobe.pro @@ -0,0 +1,68 @@ +update=Sat Feb 12 10:16:40 2011 +last_client=pcbnew +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=60 +PrintMonochrome=1 +ShowSheetReferenceAndTitleBlock=1 +[eeschema/libraries] +LibName1=power +LibName2=device +LibName3=conn +LibName4=./74hc04-3 +[cvpcb] +version=1 +NetIExt=net +[cvpcb/libraries] +EquName1=devcms +[pcbnew] +version=1 +PadDrlX=320 +PadDimH=600 +PadDimV=600 +BoardThickness=630 +SgPcb45=1 +TxtPcbV=500 +TxtPcbH=500 +TxtModV=600 +TxtModH=600 +TxtModW=120 +VEgarde=100 +DrawLar=150 +EdgeLar=50 +TxtLar=80 +MSegLar=150 +LastNetListRead=zprobe.net +[pcbnew/libraries] +LibDir= +LibName1=../../kicad-libs/modules/stdpass +LibName2=../../kicad-libs/modules/pads +LibName3=./ssop8-p-0_50a diff --git a/zprobe/zprobe.sch b/zprobe/zprobe.sch new file mode 100644 index 0000000..b63d3d6 --- /dev/null +++ b/zprobe/zprobe.sch @@ -0,0 +1,195 @@ +EESchema Schematic File Version 2 date Sat Feb 12 10:13:03 2011 +LIBS:power +LIBS:device +LIBS:conn +LIBS:74hc04-3 +EELAYER 24 0 +EELAYER END +$Descr A4 11700 8267 +Sheet 1 1 +Title "" +Date "12 feb 2011" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +Wire Wire Line + 3850 4150 3850 3950 +Connection ~ 4100 3250 +Wire Wire Line + 4100 3250 3850 3250 +Wire Wire Line + 3850 3250 3850 3450 +Connection ~ 4100 3150 +Wire Wire Line + 4100 5150 4100 2950 +Connection ~ 5650 3150 +Wire Wire Line + 5650 2950 5650 3150 +Wire Wire Line + 5300 2950 5300 3350 +Connection ~ 4500 3150 +Wire Wire Line + 4100 3150 4900 3150 +Wire Wire Line + 4900 3150 4900 3350 +Wire Wire Line + 4500 3750 4500 3150 +Wire Wire Line + 4500 4150 4500 5150 +Wire Wire Line + 4900 5150 4900 4550 +Wire Wire Line + 5300 4550 5300 5150 +Wire Wire Line + 5500 4550 5500 4850 +Connection ~ 4500 4850 +Wire Wire Line + 5100 3350 5100 2950 +Wire Wire Line + 6050 3150 5300 3150 +Connection ~ 5300 3150 +Wire Wire Line + 4500 4850 6050 4850 +Connection ~ 5500 4850 +Wire Wire Line + 5500 2950 5500 3350 +Wire Wire Line + 6050 4850 6050 2950 +Connection ~ 6050 3150 +Wire Wire Line + 3850 4550 3850 4750 +Wire Wire Line + 3850 4750 4500 4750 +Connection ~ 4500 4750 +$Comp +L LED D1 +U 1 1 4D5686DC +P 3850 4350 +F 0 "D1" H 3850 4450 50 0000 C CNN +F 1 "LTST-C190KRKT" H 3850 4250 50 0000 C CNN + 1 3850 4350 + 0 -1 1 0 +$EndComp +$Comp +L R R1 +U 1 1 4D5686D8 +P 3850 3700 +F 0 "R1" V 3930 3700 50 0000 C CNN +F 1 "100" V 3850 3700 50 0000 C CNN + 1 3850 3700 + -1 0 0 -1 +$EndComp +$Comp +L PWR_FLAG #FLG01 +U 1 1 4D5676CD +P 6050 2950 +F 0 "#FLG01" H 6050 3220 30 0001 C CNN +F 1 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