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mirror of git://projects.qi-hardware.com/wernermisc.git synced 2024-11-15 12:27:11 +02:00

labsw/: first draft layout complete

This commit is contained in:
Werner Almesberger 2011-08-27 13:18:08 -03:00
parent c0bfec4d8e
commit 80084df8a5
4 changed files with 1800 additions and 934 deletions

View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri Aug 26 01:18:37 2011 EESchema Schematic File Version 2 date Sat Aug 27 13:17:47 2011
LIBS:power LIBS:power
LIBS:device LIBS:device
LIBS:conn LIBS:conn
@ -12,7 +12,7 @@ EELAYER END
$Descr A4 11700 8267 $Descr A4 11700 8267
Sheet 2 3 Sheet 2 3
Title "Lab Switch (Back panel)" Title "Lab Switch (Back panel)"
Date "26 aug 2011" Date "27 aug 2011"
Rev "0" Rev "0"
Comp "Werner Almesberger" Comp "Werner Almesberger"
Comment1 "" Comment1 ""
@ -20,6 +20,38 @@ Comment2 ""
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@ -36,9 +68,9 @@ Text GLabel 3300 1850 0 60 Output ~ 0
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Vmax = 80 V\nImax = 5...50 mA Vmax = 80 V\nImax = 5...50 mA
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Vmin = 1.5 V\nImin = 100 uA\nVmax = 30 V\nImax = 30 mA Vmin = 1.5 V\nImin = 100 uA\nVmax = 30 V\nImax = 30 mA
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View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri Aug 26 01:32:28 2011 EESchema Schematic File Version 2 date Sat Aug 27 13:17:47 2011
LIBS:power LIBS:power
LIBS:device LIBS:device
LIBS:conn LIBS:conn
@ -12,7 +12,7 @@ EELAYER END
$Descr A4 11700 8267 $Descr A4 11700 8267
Sheet 3 3 Sheet 3 3
Title "Lab Switch (Front panel)" Title "Lab Switch (Front panel)"
Date "26 aug 2011" Date "27 aug 2011"
Rev "0" Rev "0"
Comp "Werner Almesberger" Comp "Werner Almesberger"
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri Aug 26 01:18:37 2011 EESchema Schematic File Version 2 date Sat Aug 27 13:17:47 2011
LIBS:power LIBS:power
LIBS:device LIBS:device
LIBS:conn LIBS:conn
@ -12,7 +12,7 @@ EELAYER END
$Descr A4 11700 8267 $Descr A4 11700 8267
Sheet 1 3 Sheet 1 3
Title "Lab Switch (Overview and CPU)" Title "Lab Switch (Overview and CPU)"
Date "26 aug 2011" Date "27 aug 2011"
Rev "0" Rev "0"
Comp "Werner Almesberger" Comp "Werner Almesberger"
Comment1 "" Comment1 ""
@ -20,6 +20,10 @@ Comment2 ""
Comment3 "" Comment3 ""
Comment4 "" Comment4 ""
$EndDescr $EndDescr
Text Label 3250 3900 0 60 ~ 0
DM
Text Label 3250 3750 0 60 ~ 0
DP
Connection ~ 4250 3750 Connection ~ 4250 3750
Wire Wire Line Wire Wire Line
4250 4550 4250 3750 4250 4550 4250 3750
@ -167,50 +171,50 @@ F 1 "+5V" H 3650 3640 50 0000 C CNN
1 3650 3550 1 3650 3550
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
Text GLabel 6950 5400 3 60 Output ~ 0
OUT_4
Text GLabel 7100 5400 3 60 Output ~ 0
OUT_3
Text GLabel 7250 5400 3 60 Output ~ 0
OUT_2
Text GLabel 7400 5400 3 60 Output ~ 0 Text GLabel 7400 5400 3 60 Output ~ 0
OUT_4
Text GLabel 7250 5400 3 60 Output ~ 0
OUT_3
Text GLabel 7100 5400 3 60 Output ~ 0
OUT_2
Text GLabel 6950 5400 3 60 Output ~ 0
OUT_1 OUT_1
Text GLabel 7550 5400 3 60 Output ~ 0
CH2_OPT
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CH2_RELAY CH2_OPT
Text GLabel 8750 4350 2 60 Output ~ 0 Text GLabel 8750 4350 2 60 Output ~ 0
CH2_RELAY
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CH1_OPT CH1_OPT
Text GLabel 8750 4200 2 60 Output ~ 0 Text GLabel 8750 4200 2 60 Output ~ 0
CH1_RELAY CH1_RELAY
NoConn ~ 8550 4050 NoConn ~ 8550 4050
NoConn ~ 8550 3900 NoConn ~ 8550 3900
Text GLabel 8750 3750 2 60 Output ~ 0
LED_CH2_G
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LED_CH2_R
Text GLabel 8750 3450 2 60 Output ~ 0 Text GLabel 8750 3450 2 60 Output ~ 0
LED_CH1_G LED_CH2_G
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LED_CH1_R LED_CH2_R
Text GLabel 7700 2200 1 60 Output ~ 0 Text GLabel 7700 2200 1 60 Output ~ 0
LED_MAIN_G LED_CH1_G
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LED_CH1_R
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LED_MAIN_G
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LED_MAIN_R LED_MAIN_R
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IN_4 IN_4
Text GLabel 7400 2200 1 60 Input ~ 0
BUT_CH2
Text GLabel 7250 2200 1 60 Input ~ 0 Text GLabel 7250 2200 1 60 Input ~ 0
BUT_CH2
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BUT_CH1 BUT_CH1
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BUT_MAIN BUT_MAIN
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IN_2
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IN_2
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C2D C2D