diff --git a/Makefile b/Makefile
index 8766d49..c5ce257 100644
--- a/Makefile
+++ b/Makefile
@@ -47,7 +47,7 @@ FLASH_TOOL_PATH = ./inflash
 FLASH_TOOL_BIN_PATH = $(FLASH_TOOL_PATH)/bin
 STAGE1_PATH = $(FLASH_TOOL_PATH)/xburst_stage1
 STAGE2_PATH = $(FLASH_TOOL_PATH)/xburst_stage2
-CROSS_COMPILE ?= mipsel-linux-
+CROSS_COMPILE ?= mipsel-openwrt-linux-
 
 CFLAGS="-O2"
 
diff --git a/inflash/src/cmd.c b/inflash/src/cmd.c
index 5805e07..f9f6e64 100644
--- a/inflash/src/cmd.c
+++ b/inflash/src/cmd.c
@@ -749,10 +749,10 @@ int debug_memory(int obj, unsigned int start, unsigned int size)
 	usleep(100);
 	usb_read_data_from_ingenic(&ingenic_dev, buffer, 8);
 	if (buffer[0] != 0)
-		printf("\n Test memory fail! Last error address is %x !",
+		printf("\n Test memory fail! Last error address is %x !\n",
 		       buffer[0]);
 	else
-		printf("\n Test memory pass!");
+		printf("\n Test memory pass!\n");
 
 	return 1;
 }
diff --git a/inflash/src/cmd.h b/inflash/src/cmd.h
index cd3ab59..69f5da9 100644
--- a/inflash/src/cmd.h
+++ b/inflash/src/cmd.h
@@ -21,5 +21,7 @@ int init_nand_in();
 int nand_prog(void);
 int nand_query(void);
 int nand_erase(struct nand_in *nand_in);
+int debug_memory(int obj, unsigned int start, unsigned int size);
+int debug_gpio(int obj, unsigned char ops, unsigned char pin);
 
 #endif  /* __CMD_H__ */
diff --git a/inflash/src/command_line.c b/inflash/src/command_line.c
index 1c1ab97..7ec17e3 100644
--- a/inflash/src/command_line.c
+++ b/inflash/src/command_line.c
@@ -115,7 +115,7 @@ int handle_nerase(void)
 		printf("\n 1:start block number"
 		       "\n 2:block length"
 		       "\n 3:device index number"
-		       "\n 4:flash chip index number");
+		       "\n 4:flash chip index number\n");
 		return -1;
 	}
 
@@ -144,7 +144,7 @@ int handle_nmark(void)
 		printf(" nerase (1) (2) (3) ");
 		printf("\n 1:bad block number"
 		       "\n 2:device index number"
-		       "\n 3:flash chip index number ");
+		       "\n 3:flash chip index number\n");
 		return -1;
 	}
 	init_nand_in();
@@ -171,7 +171,7 @@ int handle_memtest(void)
 		printf(" memtest (1) [2] [3] ");
 		printf("\n 1:device index number"
 		       "\n 2:SDRAM start address"
-		       "\n 3:test size      ");
+		       "\n 3:test size\n");
 		return -1;
 	}
 
@@ -191,6 +191,20 @@ int handle_memtest(void)
 	return 1;
 }
 
+int handle_gpio(int mode)
+{
+	if (com_argc < 3) {
+		printf("\n Usage:"
+		       " gpios (1) (2) "
+		       "\n 1:GPIO pin number"
+		       "\n 2:device index number\n");
+		return -1;
+	}
+
+	debug_gpio(atoi(com_argv[2]), mode, atoi(com_argv[1]));
+	return 1;
+}
+
 int command_interpret(char * com_buf)
 {
 	char *buf = com_buf;
@@ -263,6 +277,12 @@ int command_handle(char *buf)
 		printf("\n exiting inflash software\n");
 		return -1;	/* return -1 to break the main.c while
 				 * then run usb_ingenic_cleanup*/
+	case 18:
+		handle_gpio(2);
+		break;
+	case 19:
+		handle_gpio(3);
+		break;
 	case 20:
 		boot(STAGE1_FILE_PATH, STAGE2_FILE_PATH);
 		break;
@@ -273,7 +293,7 @@ int command_handle(char *buf)
 		handle_memtest();
 		break;
 	default:
-		printf("\n command not support or input error!");
+		printf("\n command not support or input error!\n");
 		break;
 	}
 
diff --git a/inflash/src/ingenic_cfg.c b/inflash/src/ingenic_cfg.c
index 2518d83..faa02d1 100644
--- a/inflash/src/ingenic_cfg.c
+++ b/inflash/src/ingenic_cfg.c
@@ -141,37 +141,37 @@ int parse_configure(struct hand *hand, char * file_path)
 	hand_init_def(hand);
 
 	cfg_opt_t opts[] = {
-		CFG_SIMPLE_INT("EXTCLK", &hand->fw_args.ext_clk),
-		CFG_SIMPLE_INT("CPUSPEED", &hand->fw_args.cpu_speed),
-		CFG_SIMPLE_INT("PHMDIV", &hand->fw_args.phm_div),
-		CFG_SIMPLE_INT("BOUDRATE", &hand->fw_args.boudrate),
-		CFG_SIMPLE_INT("USEUART", &hand->fw_args.use_uart),
+		CFG_INT("EXTCLK", &hand->fw_args.ext_clk, CFGF_NONE),
+		CFG_INT("CPUSPEED", &hand->fw_args.cpu_speed, CFGF_NONE),
+		CFG_INT("PHMDIV", &hand->fw_args.phm_div, CFGF_NONE),
+		CFG_INT("BOUDRATE", &hand->fw_args.boudrate, CFGF_NONE),
+		CFG_INT("USEUART", &hand->fw_args.use_uart, CFGF_NONE),
 
-		CFG_SIMPLE_INT("BUSWIDTH", &hand->fw_args.bus_width),
-		CFG_SIMPLE_INT("BANKS", &hand->fw_args.bank_num),
-		CFG_SIMPLE_INT("ROWADDR", &hand->fw_args.row_addr),
-		CFG_SIMPLE_INT("COLADDR", &hand->fw_args.col_addr),
+		CFG_INT("BUSWIDTH", &hand->fw_args.bus_width, CFGF_NONE),
+		CFG_INT("BANKS", &hand->fw_args.bank_num, CFGF_NONE),
+		CFG_INT("ROWADDR", &hand->fw_args.row_addr, CFGF_NONE),
+		CFG_INT("COLADDR", &hand->fw_args.col_addr, CFGF_NONE),
 
-		CFG_SIMPLE_INT("ISMOBILE", &hand->fw_args.is_mobile),
-		CFG_SIMPLE_INT("ISBUSSHARE", &hand->fw_args.is_busshare),
-		CFG_SIMPLE_INT("DEBUGOPS", &hand->fw_args.debug_ops),
-		CFG_SIMPLE_INT("PINNUM", &hand->fw_args.pin_num),
-		CFG_SIMPLE_INT("START", &hand->fw_args.start),
-		CFG_SIMPLE_INT("SIZE", &hand->fw_args.size),
+		CFG_INT("ISMOBILE", &hand->fw_args.is_mobile, CFGF_NONE),
+		CFG_INT("ISBUSSHARE", &hand->fw_args.is_busshare, CFGF_NONE),
+		CFG_INT("DEBUGOPS", &hand->fw_args.debug_ops, CFGF_NONE),
+		CFG_INT("PINNUM", &hand->fw_args.pin_num, CFGF_NONE),
+		CFG_INT("START", &hand->fw_args.start, CFGF_NONE),
+		CFG_INT("SIZE", &hand->fw_args.size, CFGF_NONE),
 
-		CFG_SIMPLE_INT("NAND_BUSWIDTH", &hand->nand_bw),
-		CFG_SIMPLE_INT("NAND_ROWCYCLES", &hand->nand_rc),
-		CFG_SIMPLE_INT("NAND_PAGESIZE", &hand->nand_ps),
-		CFG_SIMPLE_INT("NAND_PAGEPERBLOCK", &hand->nand_ppb),
-		CFG_SIMPLE_INT("NAND_FORCEERASE", &hand->nand_force_erase),
-		CFG_SIMPLE_INT("NAND_OOBSIZE", &hand->nand_os),
-		CFG_SIMPLE_INT("NAND_ECCPOS", &hand->nand_eccpos),
-		CFG_SIMPLE_INT("NAND_BADBLOCKPOS", &hand->nand_bbpos),
-		CFG_SIMPLE_INT("NAND_BADBLOCKPAGE", &hand->nand_bbpage),
-		CFG_SIMPLE_INT("NAND_PLANENUM", &hand->nand_plane),
-		CFG_SIMPLE_INT("NAND_BCHBIT", &hand->nand_bchbit),
-		CFG_SIMPLE_INT("NAND_WPPIN", &hand->nand_wppin),
-		CFG_SIMPLE_INT("NAND_BLOCKPERCHIP", &hand->nand_bpc),
+		CFG_INT("NAND_BUSWIDTH", &hand->nand_bw, CFGF_NONE),
+		CFG_INT("NAND_ROWCYCLES", &hand->nand_rc, CFGF_NONE),
+		CFG_INT("NAND_PAGESIZE", &hand->nand_ps, CFGF_NONE),
+		CFG_INT("NAND_PAGEPERBLOCK", &hand->nand_ppb, CFGF_NONE),
+		CFG_INT("NAND_FORCEERASE", &hand->nand_force_erase, CFGF_NONE),
+		CFG_INT("NAND_OOBSIZE", &hand->nand_os, CFGF_NONE),
+		CFG_INT("NAND_ECCPOS", &hand->nand_eccpos, CFGF_NONE),
+		CFG_INT("NAND_BADBLOCKPOS", &hand->nand_bbpos, CFGF_NONE),
+		CFG_INT("NAND_BADBLOCKPAGE", &hand->nand_bbpage, CFGF_NONE),
+		CFG_INT("NAND_PLANENUM", &hand->nand_plane, CFGF_NONE),
+		CFG_INT("NAND_BCHBIT", &hand->nand_bchbit, CFGF_NONE),
+		CFG_INT("NAND_WPPIN", &hand->nand_wppin, CFGF_NONE),
+		CFG_INT("NAND_BLOCKPERCHIP", &hand->nand_bpc, CFGF_NONE),
 
 		CFG_END()
 	};
diff --git a/inflash/xburst_stage1/debug.c b/inflash/xburst_stage1/debug.c
index 7043e1c..c243e52 100644
--- a/inflash/xburst_stage1/debug.c
+++ b/inflash/xburst_stage1/debug.c
@@ -71,11 +71,9 @@ void gpio_test(unsigned char ops, unsigned char pin)
 
 void do_debug()
 {
-	switch (fw_args->debug_ops)
-	{
+	switch (fw_args->debug_ops) {
 	case 1:      /* sdram check */
-		switch (CPU_ID)
-		{
+		switch (CPU_ID) {
 		case 0x4740:
 			gpio_init_4740();
 			serial_init();
@@ -86,7 +84,8 @@ void do_debug()
 			serial_init();
 			sdram_init_4750();
 			break;
-		default:;
+		default:
+			;
 		}
 		REG8(USB_REG_INDEX) = 1;
 		REG32(USB_FIFO_EP1) = check_sdram(fw_args->start, fw_args->size);
diff --git a/inflash/xburst_stage1/main.c b/inflash/xburst_stage1/main.c
index 6520015..69a60ba 100644
--- a/inflash/xburst_stage1/main.c
+++ b/inflash/xburst_stage1/main.c
@@ -36,7 +36,7 @@ volatile u32 CFG_EXTAL;
 volatile u8 PHM_DIV;
 volatile u8 IS_SHARE;
 extern int pllout2;
-#if 1
+#if 0
 void test_load_args(void)
 {
 	CPU_ID = 0x4740 ;
@@ -68,11 +68,12 @@ void load_args(void)
 		CFG_CPU_SPEED = 192000000;
 	}
 	PHM_DIV = fw_args->phm_div;
-	if ( fw_args->use_uart > 3 ) fw_args->use_uart = 0;
+	if (fw_args->use_uart > 3) 
+		fw_args->use_uart = 0;
 	UART_BASE = UART0_BASE + fw_args->use_uart * 0x1000;
 	CONFIG_BAUDRATE = fw_args->boudrate;
-	SDRAM_BW16 = fw_args->bus_width;
-	SDRAM_BANK4 = fw_args->bank_num;
+	SDRAM_BW16 = fw_args->bus_width == 0 ? 32 : 16;
+	SDRAM_BANK4 = fw_args->bank_num * 4;
 	SDRAM_ROW = fw_args->row_addr;
 	SDRAM_COL = fw_args->col_addr;
 	CONFIG_MOBILE_SDRAM = fw_args->is_mobile;
@@ -81,7 +82,7 @@ void load_args(void)
 
 void c_main(void)
 {
-	test_load_args();
+	load_args();
 
 	if (fw_args->debug_ops > 0) {
 		do_debug();
@@ -105,7 +106,7 @@ void c_main(void)
 		return;
 	}
 #if 1
-	serial_puts("Setup fw args as:\n");
+	serial_puts("Setup xburst CPU args as:\n");
 	serial_put_hex(CPU_ID);
 	serial_put_hex(CFG_EXTAL);
 	serial_put_hex(CFG_CPU_SPEED);
@@ -119,5 +120,6 @@ void c_main(void)
 	serial_put_hex(pllout2);
 	serial_put_hex(REG_CPM_CPCCR);
 #endif
-	serial_puts("Fw run finish !\n");
+	serial_puts("xburst stage1 run finish !\n");
+	load_args();
 }