From 7dc41fd85595b0e78b8bed6e0f6889137f7ea2f1 Mon Sep 17 00:00:00 2001 From: Xiangfu Liu Date: Mon, 7 Jun 2010 18:12:20 +0800 Subject: [PATCH] renmae 4740 function end with _4740 Signed-off-by: Xiangfu Liu --- xbboot/target-stage1/board-jz4740.c | 10 +++++----- xbboot/target-stage1/board-jz4740.h | 10 +++++----- xbboot/target-stage1/stage1.c | 10 +++++----- 3 files changed, 15 insertions(+), 15 deletions(-) diff --git a/xbboot/target-stage1/board-jz4740.c b/xbboot/target-stage1/board-jz4740.c index 4c66b26..84fc7ea 100644 --- a/xbboot/target-stage1/board-jz4740.c +++ b/xbboot/target-stage1/board-jz4740.c @@ -11,7 +11,7 @@ #include "serial.h" #include "board-jz4740.h" -void gpio_init() +void gpio_init_4740() { __gpio_as_nand(); __gpio_as_sdram_32bit(); @@ -38,7 +38,7 @@ void gpio_init() __gpio_clear_pin(GPIO_LCD_CS); } -void pll_init() +void pll_init_4740() { register unsigned int cfcr, plcr1; int n2FR[33] = { @@ -92,7 +92,7 @@ static void serial_setbaud() *uart_lcr = tmp; } -void serial_init() +void serial_init_4740() { volatile u8* uart_fcr = (volatile u8*)(ARG_UART_BASE + OFF_FCR); volatile u8* uart_lcr = (volatile u8*)(ARG_UART_BASE + OFF_LCR); @@ -126,7 +126,7 @@ void serial_init() #define SDRAM_TRWL 7 /* Write Latency Time */ #define SDRAM_TREF 15625 /* Refresh period: 4096 refresh cycles/64ms */ -void sdram_init() +void sdram_init_4740() { register unsigned int dmcr0, dmcr, sdmode, tmp, cpu_clk, mem_clk, ns; @@ -229,7 +229,7 @@ void sdram_init() /* everything is ok now */ } -void nand_init() +void nand_init_4740() { REG_EMC_SMCR1 = 0x094c4400; REG_EMC_NFCSR |= EMC_NFCSR_NFE1 | EMC_NFCSR_NFCE1; //__nand_enable() diff --git a/xbboot/target-stage1/board-jz4740.h b/xbboot/target-stage1/board-jz4740.h index c005502..898011f 100644 --- a/xbboot/target-stage1/board-jz4740.h +++ b/xbboot/target-stage1/board-jz4740.h @@ -9,11 +9,11 @@ #ifndef __BOARD_JZ4740_H__ #define __BOARD_JZ4740_H__ -void gpio_init(); -void pll_init(); -void serial_init(); -void sdram_init(); -void nand_init(); +void gpio_init_4740(); +void pll_init_4740(); +void serial_init_4740(); +void sdram_init_4740(); +void nand_init_4740(); // tbd: do they have to be copied into globals? or just reference STAGE1_ARGS_ADDR? volatile u32 ARG_EXTAL; diff --git a/xbboot/target-stage1/stage1.c b/xbboot/target-stage1/stage1.c index 77e0ee2..f403582 100644 --- a/xbboot/target-stage1/stage1.c +++ b/xbboot/target-stage1/stage1.c @@ -33,11 +33,11 @@ void c_main(void) switch (ARG_CPU_ID) { case 0x4740: - gpio_init(); - serial_init(); - pll_init(); - sdram_init(); - nand_init(); + gpio_init_4740(); + serial_init_4740(); + pll_init_4740(); + sdram_init_4740(); + nand_init_4740(); break; case 0x4760: break;