mirror of
git://projects.qi-hardware.com/xburst-tools.git
synced 2024-11-23 09:46:15 +02:00
a3b9071e22
add usb-boot to keep the device code.
82 lines
1.5 KiB
C
82 lines
1.5 KiB
C
#include "jz4750.h"
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#include "configs.h"
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extern fw_args_t * fw_args;
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unsigned int check_sdram(unsigned int saddr, unsigned int size)
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{
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unsigned int addr,err = 0;
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serial_puts("\nCheck SDRAM ... \n");
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saddr += 0xa0000000;
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size += saddr;
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serial_put_hex(saddr);
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serial_put_hex(size);
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saddr &= 0xfffffffc; //must word align
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for (addr = saddr; addr < size; addr += 4)
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{
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*(volatile unsigned int *)addr = addr;
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if (*(volatile unsigned int *)addr != addr)
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{
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serial_put_hex(addr);
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err = addr;
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}
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}
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if (err)
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serial_puts("Check SDRAM fail!\n");
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else
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serial_puts("Check SDRAM pass!\n");
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return err;
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}
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void gpio_test(unsigned char ops, unsigned char pin)
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{
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__gpio_as_output(pin);
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if (ops)
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{
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serial_puts("\nGPIO set ");
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serial_put_hex(pin);
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__gpio_set_pin(pin);
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}
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else
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{
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serial_puts("\nGPIO clear ");
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serial_put_hex(pin);
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__gpio_clear_pin(pin);
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}
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// __gpio_as_input(pin);
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}
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void do_debug()
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{
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switch (fw_args->debug_ops)
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{
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case 1: //sdram check
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switch (CPU_ID)
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{
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case 0x4740:
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gpio_init_4740();
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serial_init();
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sdram_init_4740();
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break;
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case 0x4750:
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gpio_init_4750();
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serial_init();
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sdram_init_4750();
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break;
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default:;
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}
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REG8(USB_REG_INDEX) = 1;
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REG32(USB_FIFO_EP1) = check_sdram(fw_args->start, fw_args->size);
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REG32(USB_FIFO_EP1) = 0x0;
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REG8(USB_REG_INCSR) |= USB_INCSR_INPKTRDY;
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break;
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case 2: //set gpio
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gpio_test(1, fw_args->pin_num);
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break;
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case 3: //clear gpio
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gpio_test(0, fw_args->pin_num);
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break;
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}
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}
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