xue/sim/ibis/micron_ddr2/readme.txt

2Gb DDR2 SDRAM IBIS models

The u49a IBIS models include On Die Termination (ODT) characteristics.  ODT is
modeled through the use of [Submodel] power and ground clamp I-V curves that
add the termination characteristics to the regular power and ground clamp
characteristics when the I/O is functioning as an input.  ODT applies to the
DQ, DQS/DQS#, RDQS/RDQS#, and DM signals.  Use the [Model Selector] to choose
between 50, 75, or 150 ohm ODT settings. 

NOTE: C_comp is lower for the ODT-enabled models versus the normal I/O model.
The C_comp value is set to match the input state of the DQ I/O as measured from
the HSPICE model.  Due to the C_comp differences between the DQ model and the
DQ_ODT* models, the output characteristics of the models will look different
when simulated.  So, to match most closely with the HSPICE model, simulate with
the DQ_FULL or DQ_HALF model for ALL Output simulations.  Use the ODT models
ONLY for Input simulations. 

All the speed grades are combined into a single IBIS file
Use the models labeled with 533 for the DDR2-400/533 speeds and the models 
labeled with 800 for the DDR2-667/800 speeds.

u49a.ibs Packaged model for commercial temperatures
u49a_bd.ibs Bare Die model
u49a_it.ibs Packaged model for industrial temperatures

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