xue/kicad/xue-rnc/xue-rnc.cmp

Cmp-Mod V01 Created by CvPCB (2010-07-15 BZR 2414)-unstable date = Mon 09 Aug 2010 09:53:42 PM COT

BeginCmp
TimeStamp = /4C4320F3/4C5D7F9F;
Reference = C1;
ValeurCmp = 1uF;
IdModule  = 0603;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D80ED;
Reference = C2;
ValeurCmp = C;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7FA1;
Reference = C3;
ValeurCmp = 100nF;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D80F0;
Reference = C4;
ValeurCmp = C;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7FA3;
Reference = C5;
ValeurCmp = 100nF;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D8104;
Reference = C6;
ValeurCmp = C;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7FA5;
Reference = C7;
ValeurCmp = 1uF;
IdModule  = 0603;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7FA7;
Reference = C8;
ValeurCmp = 100nF;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D8114;
Reference = C9;
ValeurCmp = C;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7E41;
Reference = C10;
ValeurCmp = 100nF;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7E43;
Reference = C11;
ValeurCmp = 100nF;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7DCB;
Reference = C12;
ValeurCmp = 47nF;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C5F1EDC/4C5F2033;
Reference = C13;
ValeurCmp = 1uF;
IdModule  = 0603;
EndCmp

BeginCmp
TimeStamp = /4C5F1EDC/4C5F2037;
Reference = C14;
ValeurCmp = 1uF;
IdModule  = 0603;
EndCmp

BeginCmp
TimeStamp = /4C5F1EDC/4C5F2039;
Reference = C15;
ValeurCmp = 470nF;
IdModule  = 0603;
EndCmp

BeginCmp
TimeStamp = /4C5F1EDC/4C5F2D1E;
Reference = C16;
ValeurCmp = 4.7nF;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C5F1EDC/4C5F2B55;
Reference = F1;
ValeurCmp = MICROSMD075F;
IdModule  = 1210;
EndCmp

BeginCmp
TimeStamp = /4C4227FE/4B76F5E2;
Reference = J1;
ValeurCmp = MICROSD;
IdModule  = MICROSD-500901;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D6F5A;
Reference = J4;
ValeurCmp = RJ45-48025;
IdModule  = SD-48025;
EndCmp

BeginCmp
TimeStamp = /4C5F1EDC/4C5F23DD;
Reference = J5;
ValeurCmp = USB-48204-0001;
IdModule  = USB-48204;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D80F3;
Reference = L1;
ValeurCmp = INDUCTOR;
IdModule  = 0603;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7FB7;
Reference = L2;
ValeurCmp = FB;
IdModule  = 0603;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D810A;
Reference = L3;
ValeurCmp = INDUCTOR;
IdModule  = 0603;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7F39;
Reference = R1;
ValeurCmp = 4.7K;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7ECF;
Reference = R2;
ValeurCmp = 6.65K;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7AFE;
Reference = R3;
ValeurCmp = 49.9;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7AFC;
Reference = R4;
ValeurCmp = 49.9;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7AF7;
Reference = R5;
ValeurCmp = 49.9;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7AF9;
Reference = R6;
ValeurCmp = 49.9;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D719D;
Reference = R7;
ValeurCmp = 220;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D71DB;
Reference = R8;
ValeurCmp = 220;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C5D7DC4;
Reference = R9;
ValeurCmp = 1M;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C5F1EDC/4C5F2D27;
Reference = R10;
ValeurCmp = 1M;
IdModule  = 0402;
EndCmp

BeginCmp
TimeStamp = /4C431A63/4C431E53;
Reference = U1;
ValeurCmp = XC6SLX45FGG484;
IdModule  = FGG484bga-p10;
EndCmp

BeginCmp
TimeStamp = /4C421DD3/4C609B99;
Reference = U2;
ValeurCmp = MT46V32M16TG;
IdModule  = TSOP-66;
EndCmp

BeginCmp
TimeStamp = /4C421DD3/4C609C8E;
Reference = U3;
ValeurCmp = MT46V32M16TG;
IdModule  = TSOP-66;
EndCmp

BeginCmp
TimeStamp = /4C4320F3/4C432132;
Reference = U4;
ValeurCmp = K8001;
IdModule  = LQFP48;
EndCmp

BeginCmp
TimeStamp = /4C4227FE/4B76F108;
Reference = U5;
ValeurCmp = NAND;
IdModule  = NAND-48TSOP;
EndCmp

BeginCmp
TimeStamp = /4C5F1EDC/4C5F2025;
Reference = U6;
ValeurCmp = MIC2550AYTS;
IdModule  = TSSOP-14;
EndCmp

BeginCmp
TimeStamp = /4C5F1EDC/4C5F2CA7;
Reference = V1;
ValeurCmp = V0402MHS03;
IdModule  = 0603;
EndCmp

BeginCmp
TimeStamp = /4C5F1EDC/4C5F2CA3;
Reference = V2;
ValeurCmp = V0402MHS03;
IdModule  = 0603;
EndCmp

EndListe
annotate 2010-08-10 05:55:50 +03:00			`Cmp-Mod V01 Created by CvPCB (2010-07-15 BZR 2414)-unstable date = Mon 09 Aug 2010 09:53:42 PM COT`
Phy 2010-08-08 20:15:44 +03:00
			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7F9F;`
			`Reference = C1;`
			`ValeurCmp = 1uF;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0603;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D80ED;`
			`Reference = C2;`
			`ValeurCmp = C;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7FA1;`
			`Reference = C3;`
Phy 2010-08-08 20:15:44 +03:00			`ValeurCmp = 100nF;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D80F0;`
			`Reference = C4;`
			`ValeurCmp = C;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7FA3;`
			`Reference = C5;`
Phy 2010-08-08 20:15:44 +03:00			`ValeurCmp = 100nF;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D8104;`
			`Reference = C6;`
			`ValeurCmp = C;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C4320F3/4C5D7FA5;`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`Reference = C7;`
Phy 2010-08-08 20:15:44 +03:00			`ValeurCmp = 1uF;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0603;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C4320F3/4C5D7FA7;`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`Reference = C8;`
Phy 2010-08-08 20:15:44 +03:00			`ValeurCmp = 100nF;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D8114;`
			`Reference = C9;`
Phy 2010-08-08 20:15:44 +03:00			`ValeurCmp = C;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7E41;`
			`Reference = C10;`
			`ValeurCmp = 100nF;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7E43;`
			`Reference = C11;`
			`ValeurCmp = 100nF;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7DCB;`
			`Reference = C12;`
			`ValeurCmp = 47nF;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C5F1EDC/4C5F2033;`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`Reference = C13;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`ValeurCmp = 1uF;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0603;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C5F1EDC/4C5F2037;`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`Reference = C14;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`ValeurCmp = 1uF;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0603;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C5F1EDC/4C5F2039;`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`Reference = C15;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`ValeurCmp = 470nF;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0603;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C5F1EDC/4C5F2D1E;`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`Reference = C16;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`ValeurCmp = 4.7nF;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C5F1EDC/4C5F2B55;`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`Reference = F1;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`ValeurCmp = MICROSMD075F;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 1210;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`
initial import 2010-07-24 14:58:53 +03:00
			`BeginCmp`
			`TimeStamp = /4C4227FE/4B76F5E2;`
			`Reference = J1;`
			`ValeurCmp = MICROSD;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`IdModule = MICROSD-500901;`
initial import 2010-07-24 14:58:53 +03:00			`EndCmp`

Phy 2010-08-08 20:15:44 +03:00			`BeginCmp`
			`TimeStamp = /4C4320F3/4C5D6F5A;`
			`Reference = J4;`
			`ValeurCmp = RJ45-48025;`
			`IdModule = SD-48025;`
			`EndCmp`

Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`BeginCmp`
			`TimeStamp = /4C5F1EDC/4C5F23DD;`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`Reference = J5;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`ValeurCmp = USB-48204-0001;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = USB-48204;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`EndCmp`

Phy 2010-08-08 20:15:44 +03:00			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D80F3;`
			`Reference = L1;`
			`ValeurCmp = INDUCTOR;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0603;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7FB7;`
			`Reference = L2;`
			`ValeurCmp = FB;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0603;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C4320F3/4C5D810A;`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`Reference = L3;`
Phy 2010-08-08 20:15:44 +03:00			`ValeurCmp = INDUCTOR;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0603;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7F39;`
			`Reference = R1;`
			`ValeurCmp = 4.7K;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7ECF;`
			`Reference = R2;`
			`ValeurCmp = 6.65K;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7AFE;`
			`Reference = R3;`
Phy 2010-08-08 20:15:44 +03:00			`ValeurCmp = 49.9;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7AFC;`
			`Reference = R4;`
Phy 2010-08-08 20:15:44 +03:00			`ValeurCmp = 49.9;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7AF7;`
			`Reference = R5;`
Phy 2010-08-08 20:15:44 +03:00			`ValeurCmp = 49.9;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7AF9;`
			`Reference = R6;`
Phy 2010-08-08 20:15:44 +03:00			`ValeurCmp = 49.9;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D719D;`
			`Reference = R7;`
			`ValeurCmp = 220;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D71DB;`
			`Reference = R8;`
			`ValeurCmp = 220;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C4320F3/4C5D7DC4;`
			`Reference = R9;`
			`ValeurCmp = 1M;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C5F1EDC/4C5F2D27;`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`Reference = R10;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`ValeurCmp = 1M;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0402;`
Phy 2010-08-08 20:15:44 +03:00			`EndCmp`

initial import 2010-07-24 14:58:53 +03:00			`BeginCmp`
			`TimeStamp = /4C431A63/4C431E53;`
			`Reference = U1;`
			`ValeurCmp = XC6SLX45FGG484;`
			`IdModule = FGG484bga-p10;`
			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C421DD3/4C609B99;`
initial import 2010-07-24 14:58:53 +03:00			`Reference = U2;`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`ValeurCmp = MT46V32M16TG;`
			`IdModule = TSOP-66;`
initial import 2010-07-24 14:58:53 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C421DD3/4C609C8E;`
initial import 2010-07-24 14:58:53 +03:00			`Reference = U3;`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`ValeurCmp = MT46V32M16TG;`
			`IdModule = TSOP-66;`
initial import 2010-07-24 14:58:53 +03:00			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C4320F3/4C432132;`
			`Reference = U4;`
			`ValeurCmp = K8001;`
			`IdModule = LQFP48;`
			`EndCmp`

			`BeginCmp`
			`TimeStamp = /4C4227FE/4B76F108;`
			`Reference = U5;`
			`ValeurCmp = NAND;`
			`IdModule = NAND-48TSOP;`
			`EndCmp`

Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`BeginCmp`
			`TimeStamp = /4C5F1EDC/4C5F2025;`
			`Reference = U6;`
			`ValeurCmp = MIC2550AYTS;`
			`IdModule = TSSOP-14;`
			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C5F1EDC/4C5F2CA7;`
			`Reference = V1;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`ValeurCmp = V0402MHS03;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0603;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`EndCmp`

			`BeginCmp`
ddr footprint changed 2010-08-10 05:29:52 +03:00			`TimeStamp = /4C5F1EDC/4C5F2CA3;`
			`Reference = V2;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`ValeurCmp = V0402MHS03;`
annotate 2010-08-10 05:55:50 +03:00			`IdModule = 0603;`
Ethernet-phy and USB connected to FPGA 2010-08-09 23:37:18 +03:00			`EndCmp`

initial import 2010-07-24 14:58:53 +03:00			`EndListe`