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Code

Somthing routing

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This commit is contained in:
Juan64Bits 2010-08-18 20:15:48 -05:00
parent ef7e11688c
commit 048e8b4322
2 changed files with 273 additions and 13 deletions
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284
kicad/xue-rnc/xue-rnc.brd
View File

@ -1,16 +1,16 @@
PCBNEW-BOARD Version 1 date Tue 17 Aug 2010 07:47:02 PM COT PCBNEW-BOARD Version 1 date Wed 18 Aug 2010 08:14:41 PM COT
# Created by Pcbnew(2010-07-27 BZR 2423)-unstable # Created by Pcbnew(2010-04-19 BZR 23xx)-unstable
$GENERAL $GENERAL
LayerCount 6 LayerCount 6
Ly 1FFF801F Ly 1FFF801F
EnabledLayers 1FFF801F EnabledLayers 13FF801F
Links 640 Links 640
NoConn 640 NoConn 628
Di 45200 13510 70149 50668 Di 45200 13470 70189 50668
Ndraw 7 Ndraw 7
Ntrack 0 Ntrack 115
Nzone 0 Nzone 0
BoardThickness 630 BoardThickness 630
Nmodule 144 Nmodule 144
@ -20,7 +20,7 @@ $EndGENERAL
$SHEETDESCR $SHEETDESCR
Sheet A4 11700 8267 Sheet A4 11700 8267
Title "" Title ""
Date "18 aug 2010" Date "19 aug 2010"
Rev "" Rev ""
Comp "" Comp ""
Comment1 "" Comment1 ""
@ -34,13 +34,13 @@ InternalUnit 0.000100 INCH
ZoneGridSize 250 ZoneGridSize 250
Layers 6 Layers 6
Layer[0] Back signal Layer[0] Back signal
Layer[1] Inner2 signal Layer[1] Inner2 power
Layer[2] Inner3 signal Layer[2] Inner3 signal
Layer[3] Inner4 signal Layer[3] Inner4 signal
Layer[4] Inner5 signal Layer[4] Inner5 power
Layer[15] Front signal Layer[15] Front signal
TrackWidth 39 TrackWidth 39
TrackClearence 39 TrackClearence 59
ZoneClearence 200 ZoneClearence 200
TrackMinWidth 39 TrackMinWidth 39
DrawSegmWidth 150 DrawSegmWidth 150
@ -1052,7 +1052,7 @@ $EndEQUIPOT
$NCLASS $NCLASS
Name "Default" Name "Default"
Desc "This is the default net class." Desc "This is the default net class."
Clearance 39 Clearance 59
TrackWidth 39 TrackWidth 39
ViaDia 197 ViaDia 197
ViaDrill 79 ViaDrill 79
@ -1305,6 +1305,36 @@ AddNet "N-000432"
AddNet "N-000433" AddNet "N-000433"
AddNet "VCCO2" AddNet "VCCO2"
$EndNCLASS $EndNCLASS
$NCLASS
Name "ADDRESS/DDR"
Desc ""
Clearance 59
TrackWidth 39
ViaDia 197
ViaDrill 79
uViaDia 197
uViaDrill 79
$EndNCLASS
$NCLASS
Name "CLK#CLK/DDR"
Desc ""
Clearance 39
TrackWidth 39
ViaDia 197
ViaDrill 79
uViaDia 197
uViaDrill 79
$EndNCLASS
$NCLASS
Name "DATA/DDR"
Desc ""
Clearance 79
TrackWidth 39
ViaDia 197
ViaDrill 79
uViaDia 197
uViaDrill 79
$EndNCLASS
$MODULE 1206 $MODULE 1206
Po 63750 39693 1800 15 4C5FF890 4C61D1D4 ~~ Po 63750 39693 1800 15 4C5FF890 4C61D1D4 ~~
Li 1206 Li 1206
@ -11630,7 +11660,7 @@ Po -295 177
$EndPAD $EndPAD
$EndMODULE R_PACK4-0402 $EndMODULE R_PACK4-0402
$MODULE 0402 $MODULE 0402
Po 51300 33300 900 0 4C5FF890 4C6B1F81 ~~ Po 51370 33417 900 0 4C5FF890 4C6B1F81 ~~
Li 0402 Li 0402
Sc 4C6B1F81 Sc 4C6B1F81
AR /4C431A63/4C6B1B90 AR /4C431A63/4C6B1B90
@ -11844,6 +11874,236 @@ Po 0 45474 14765 67127 14765 150
De 28 0 900 0 0 De 28 0 900 0 0
$EndDRAWSEGMENT $EndDRAWSEGMENT
$TRACK $TRACK
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De 3 0 11 0 0
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De 15 0 11 0 400
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Po 3 52335 32799 52335 32799 197 -1
De 15 1 129 0 0
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Po 3 53520 32791 53520 32791 197 -1
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Po 0 53520 32791 53711 32982 39 -1
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Po 0 53711 33001 53711 32982 39 -1
De 15 0 134 0 C00
Po 0 49823 31105 49676 31105 39 -1
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Po 0 54084 33788 54104 33788 39 -1
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Po 0 53894 33598 54084 33788 39 -1
De 15 0 135 0 400
Po 3 53894 33598 53894 33598 197 -1
De 15 1 135 0 0
Po 0 53894 32819 53894 33598 39 -1
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Po 0 53343 32268 53894 32819 39 -1
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Po 0 50980 32268 53343 32268 39 -1
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Po 0 49653 30941 50980 32268 39 -1
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Po 3 49567 30996 49567 30996 197 -1
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De 0 0 135 0 0
$EndTRACK $EndTRACK
$ZONE $ZONE
$EndZONE $EndZONE

2
kicad/xue-rnc/xue-rnc.pro
View File

@ -1,4 +1,4 @@
update=Tue 17 Aug 2010 07:49:00 PM COT update=Wed 18 Aug 2010 07:03:19 PM COT
version=1 version=1
last_client=pcbnew last_client=pcbnew
[common] [common]