From 4402fb5f07fd451e4efa157edda7753387bdc80e Mon Sep 17 00:00:00 2001
From: Juan64Bits <juan64bits@Maximus.(none)>
Date: Fri, 3 Sep 2010 10:34:54 -0500
Subject: [PATCH] ERC report generated.

---
 kicad/xue-rnc/DBG_PRG.sch       |    4 +-
 kicad/xue-rnc/DRAM.sch          |   68 +-
 kicad/xue-rnc/FPGA_0_2_PROG.sch |    4 +-
 kicad/xue-rnc/FPGA_1_3.sch      |    4 +-
 kicad/xue-rnc/NV_MEMORIES.sch   |   36 +-
 kicad/xue-rnc/PSU.sch           |  244 ++--
 kicad/xue-rnc/USB.sch           |   96 +-
 kicad/xue-rnc/eth_phy.sch       |    4 +-
 kicad/xue-rnc/xue-rnc-cache.lib |    2 +-
 kicad/xue-rnc/xue-rnc.brd       |  108 +-
 kicad/xue-rnc/xue-rnc.erc       |  503 +++++++++
 kicad/xue-rnc/xue-rnc.net       | 1831 +++++++++++++++----------------
 kicad/xue-rnc/xue-rnc.pro       |    8 +-
 kicad/xue-rnc/xue-rnc.sch       |    4 +-
 14 files changed, 1708 insertions(+), 1208 deletions(-)
 create mode 100644 kicad/xue-rnc/xue-rnc.erc

diff --git a/kicad/xue-rnc/DBG_PRG.sch b/kicad/xue-rnc/DBG_PRG.sch
index 9d984ec..6952ba5 100644
--- a/kicad/xue-rnc/DBG_PRG.sch
+++ b/kicad/xue-rnc/DBG_PRG.sch
@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu 02 Sep 2010 12:54:07 PM COT
+EESchema Schematic File Version 2  date Fri 03 Sep 2010 10:34:12 AM COT
 LIBS:power
 LIBS:r_pack2
 LIBS:v0402mhs03
@@ -51,7 +51,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 4 9
 Title ""
-Date "2 sep 2010"
+Date "3 sep 2010"
 Rev ""
 Comp ""
 Comment1 ""
diff --git a/kicad/xue-rnc/DRAM.sch b/kicad/xue-rnc/DRAM.sch
index 676bcef..ed5d1f3 100644
--- a/kicad/xue-rnc/DRAM.sch
+++ b/kicad/xue-rnc/DRAM.sch
@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu 02 Sep 2010 12:54:07 PM COT
+EESchema Schematic File Version 2  date Fri 03 Sep 2010 10:34:12 AM COT
 LIBS:power
 LIBS:r_pack2
 LIBS:v0402mhs03
@@ -51,7 +51,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 7 9
 Title ""
-Date "2 sep 2010"
+Date "3 sep 2010"
 Rev ""
 Comp ""
 Comment1 ""
@@ -535,19 +535,19 @@ Entry Wire Line
 Entry Wire Line
 	10100 4400 10200 4500
 $Comp
-L GND #PWR088
+L GND #PWR087
 U 1 1 4C699C4D
 P 9950 2100
-F 0 "#PWR088" H 9950 2100 30  0001 C CNN
+F 0 "#PWR087" H 9950 2100 30  0001 C CNN
 F 1 "GND" H 9950 2030 30  0001 C CNN
 	1    9950 2100
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR089
+L GND #PWR088
 U 1 1 4C699C48
 P 4550 2150
-F 0 "#PWR089" H 4550 2150 30  0001 C CNN
+F 0 "#PWR088" H 4550 2150 30  0001 C CNN
 F 1 "GND" H 4550 2080 30  0001 C CNN
 	1    4550 2150
 	1    0    0    -1  
@@ -605,37 +605,37 @@ F 2 "1206" H 6900 6000 60  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR090
+L GND #PWR089
 U 1 1 4C61D1D3
 P 6900 6200
-F 0 "#PWR090" H 6900 6200 30  0001 C CNN
+F 0 "#PWR089" H 6900 6200 30  0001 C CNN
 F 1 "GND" H 6900 6130 30  0001 C CNN
 	1    6900 6200
 	1    0    0    -1  
 $EndComp
 $Comp
-L +2.5V #PWR091
+L +2.5V #PWR090
 U 1 1 4C61D1D2
 P 6900 5800
-F 0 "#PWR091" H 6900 5750 20  0001 C CNN
+F 0 "#PWR090" H 6900 5750 20  0001 C CNN
 F 1 "+2.5V" H 6900 5900 30  0000 C CNN
 	1    6900 5800
 	1    0    0    -1  
 $EndComp
 $Comp
-L +2.5V #PWR092
+L +2.5V #PWR091
 U 1 1 4C61D192
 P 1700 5800
-F 0 "#PWR092" H 1700 5750 20  0001 C CNN
+F 0 "#PWR091" H 1700 5750 20  0001 C CNN
 F 1 "+2.5V" H 1700 5900 30  0000 C CNN
 	1    1700 5800
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR093
+L GND #PWR092
 U 1 1 4C61D17F
 P 1700 6200
-F 0 "#PWR093" H 1700 6200 30  0001 C CNN
+F 0 "#PWR092" H 1700 6200 30  0001 C CNN
 F 1 "GND" H 1700 6130 30  0001 C CNN
 	1    1700 6200
 	1    0    0    -1  
@@ -651,19 +651,19 @@ F 2 "1206" H 1700 6000 60  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L +2.5V #PWR094
+L +2.5V #PWR093
 U 1 1 4C61CFCF
 P 3050 1750
-F 0 "#PWR094" H 3050 1700 20  0001 C CNN
+F 0 "#PWR093" H 3050 1700 20  0001 C CNN
 F 1 "+2.5V" H 3050 1850 30  0000 C CNN
 	1    3050 1750
 	1    0    0    -1  
 $EndComp
 $Comp
-L +2.5V #PWR095
+L +2.5V #PWR094
 U 1 1 4C61CFC6
 P 8400 1700
-F 0 "#PWR095" H 8400 1650 20  0001 C CNN
+F 0 "#PWR094" H 8400 1650 20  0001 C CNN
 F 1 "+2.5V" H 8400 1800 30  0000 C CNN
 	1    8400 1700
 	1    0    0    -1  
@@ -729,37 +729,37 @@ F 2 "0603" H 7450 6000 60  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L +2.5V #PWR096
+L +2.5V #PWR095
 U 1 1 4C61CF9F
 P 8300 5750
-F 0 "#PWR096" H 8300 5700 20  0001 C CNN
+F 0 "#PWR095" H 8300 5700 20  0001 C CNN
 F 1 "+2.5V" H 8300 5850 30  0000 C CNN
 	1    8300 5750
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR097
+L GND #PWR096
 U 1 1 4C61CF9E
 P 8300 6350
-F 0 "#PWR097" H 8300 6350 30  0001 C CNN
+F 0 "#PWR096" H 8300 6350 30  0001 C CNN
 F 1 "GND" H 8300 6280 30  0001 C CNN
 	1    8300 6350
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR098
+L GND #PWR097
 U 1 1 4C61CF90
 P 3050 6350
-F 0 "#PWR098" H 3050 6350 30  0001 C CNN
+F 0 "#PWR097" H 3050 6350 30  0001 C CNN
 F 1 "GND" H 3050 6280 30  0001 C CNN
 	1    3050 6350
 	1    0    0    -1  
 $EndComp
 $Comp
-L +2.5V #PWR099
+L +2.5V #PWR098
 U 1 1 4C61CF89
 P 3050 5750
-F 0 "#PWR099" H 3050 5700 20  0001 C CNN
+F 0 "#PWR098" H 3050 5700 20  0001 C CNN
 F 1 "+2.5V" H 3050 5850 30  0000 C CNN
 	1    3050 5750
 	1    0    0    -1  
@@ -845,19 +845,19 @@ F 2 "0402" H 9950 1750 60  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L +2.5V #PWR0100
+L +2.5V #PWR099
 U 1 1 4C61CE2F
 P 9950 800
-F 0 "#PWR0100" H 9950 750 20  0001 C CNN
+F 0 "#PWR099" H 9950 750 20  0001 C CNN
 F 1 "+2.5V" H 9950 900 30  0000 C CNN
 	1    9950 800 
 	1    0    0    -1  
 $EndComp
 $Comp
-L +2.5V #PWR0101
+L +2.5V #PWR0100
 U 1 1 4C61CDF1
 P 4550 850
-F 0 "#PWR0101" H 4550 800 20  0001 C CNN
+F 0 "#PWR0100" H 4550 800 20  0001 C CNN
 F 1 "+2.5V" H 4550 950 30  0000 C CNN
 	1    4550 850 
 	1    0    0    -1  
@@ -940,10 +940,10 @@ $EndComp
 Text HLabel 5000 5350 2    60   BiDi ~ 0
 M0_DQ[0..15]
 $Comp
-L GND #PWR0102
+L GND #PWR0101
 U 1 1 4C58A712
 P 3000 5200
-F 0 "#PWR0102" H 3000 5200 30  0001 C CNN
+F 0 "#PWR0101" H 3000 5200 30  0001 C CNN
 F 1 "GND" H 3000 5130 30  0001 C CNN
 	1    3000 5200
 	1    0    0    -1  
@@ -1219,10 +1219,10 @@ Entry Wire Line
 Entry Wire Line
 	10100 3600 10200 3700
 $Comp
-L GND #PWR0103
+L GND #PWR0102
 U 1 1 4C437C3F
 P 8350 5150
-F 0 "#PWR0103" H 8350 5150 30  0001 C CNN
+F 0 "#PWR0102" H 8350 5150 30  0001 C CNN
 F 1 "GND" H 8350 5080 30  0001 C CNN
 	1    8350 5150
 	1    0    0    -1  
diff --git a/kicad/xue-rnc/FPGA_0_2_PROG.sch b/kicad/xue-rnc/FPGA_0_2_PROG.sch
index 46605e2..e9c129c 100644
--- a/kicad/xue-rnc/FPGA_0_2_PROG.sch
+++ b/kicad/xue-rnc/FPGA_0_2_PROG.sch
@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu 02 Sep 2010 12:54:07 PM COT
+EESchema Schematic File Version 2  date Fri 03 Sep 2010 10:34:12 AM COT
 LIBS:power
 LIBS:r_pack2
 LIBS:v0402mhs03
@@ -51,7 +51,7 @@ EELAYER END
 $Descr A3 16535 11700
 Sheet 2 9
 Title ""
-Date "2 sep 2010"
+Date "3 sep 2010"
 Rev ""
 Comp ""
 Comment1 ""
diff --git a/kicad/xue-rnc/FPGA_1_3.sch b/kicad/xue-rnc/FPGA_1_3.sch
index d973460..2e6d688 100644
--- a/kicad/xue-rnc/FPGA_1_3.sch
+++ b/kicad/xue-rnc/FPGA_1_3.sch
@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu 02 Sep 2010 12:54:07 PM COT
+EESchema Schematic File Version 2  date Fri 03 Sep 2010 10:34:12 AM COT
 LIBS:power
 LIBS:r_pack2
 LIBS:v0402mhs03
@@ -51,7 +51,7 @@ EELAYER END
 $Descr A3 16535 11700
 Sheet 3 9
 Title ""
-Date "2 sep 2010"
+Date "3 sep 2010"
 Rev ""
 Comp ""
 Comment1 ""
diff --git a/kicad/xue-rnc/NV_MEMORIES.sch b/kicad/xue-rnc/NV_MEMORIES.sch
index f63b334..13e8206 100644
--- a/kicad/xue-rnc/NV_MEMORIES.sch
+++ b/kicad/xue-rnc/NV_MEMORIES.sch
@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu 02 Sep 2010 12:54:07 PM COT
+EESchema Schematic File Version 2  date Fri 03 Sep 2010 10:34:12 AM COT
 LIBS:power
 LIBS:r_pack2
 LIBS:v0402mhs03
@@ -51,7 +51,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 4 9
 Title ""
-Date "2 sep 2010"
+Date "3 sep 2010"
 Rev ""
 Comp ""
 Comment1 ""
@@ -244,19 +244,19 @@ F 1 "100nF" H 4000 5400 50  0000 L CNN
 	-1   0    0    1   
 $EndComp
 $Comp
-L GND #PWR057
+L GND #PWR056
 U 1 1 4C65D6AB
 P 9350 3150
-F 0 "#PWR057" H 9350 3150 30  0001 C CNN
+F 0 "#PWR056" H 9350 3150 30  0001 C CNN
 F 1 "GND" H 9350 3080 30  0001 C CNN
 	1    9350 3150
 	1    0    0    -1  
 $EndComp
 $Comp
-L +3.3V #PWR058
+L +3.3V #PWR057
 U 1 1 4C65D69B
 P 9350 2650
-F 0 "#PWR058" H 9350 2610 30  0001 C CNN
+F 0 "#PWR057" H 9350 2610 30  0001 C CNN
 F 1 "+3.3V" H 9350 2760 30  0000 C CNN
 	1    9350 2650
 	1    0    0    -1  
@@ -320,10 +320,10 @@ SPI_DQ[0..3]
 Text HLabel 2450 1700 0    60   Input ~ 0
 SPI_FLASH_CS#
 $Comp
-L GND #PWR059
+L GND #PWR058
 U 1 1 4C65ABE9
 P 2650 2450
-F 0 "#PWR059" H 2650 2450 30  0001 C CNN
+F 0 "#PWR058" H 2650 2450 30  0001 C CNN
 F 1 "GND" H 2650 2380 30  0001 C CNN
 	1    2650 2450
 	1    0    0    -1  
@@ -356,19 +356,19 @@ Entry Wire Line
 Entry Wire Line
 	8150 3150 8250 3050
 $Comp
-L +3.3V #PWR060
+L +3.3V #PWR059
 U 1 1 4C646C14
 P 7950 2900
-F 0 "#PWR060" H 7950 2860 30  0001 C CNN
+F 0 "#PWR059" H 7950 2860 30  0001 C CNN
 F 1 "+3.3V" H 7950 3010 30  0000 C CNN
 	1    7950 2900
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR061
+L GND #PWR060
 U 1 1 4C646BEA
 P 7950 3000
-F 0 "#PWR061" H 7950 3000 30  0001 C CNN
+F 0 "#PWR060" H 7950 3000 30  0001 C CNN
 F 1 "GND" H 7950 2930 30  0001 C CNN
 	1    7950 3000
 	1    0    0    -1  
@@ -418,10 +418,10 @@ SD_DAT3
 Text Label 4200 6100 0    30   ~ 0
 SD_CMD
 $Comp
-L GND #PWR062
+L GND #PWR061
 U 1 1 4C61D875
 P 3950 5800
-F 0 "#PWR062" H 3950 5800 30  0001 C CNN
+F 0 "#PWR061" H 3950 5800 30  0001 C CNN
 F 1 "GND" H 3950 5730 30  0001 C CNN
 	1    3950 5800
 	1    0    0    -1  
@@ -433,19 +433,19 @@ SD_DAT0
 Text Label 4200 5850 0    30   ~ 0
 SD_DAT1
 $Comp
-L GND #PWR063
+L GND #PWR062
 U 1 1 4C438ADC
 P 5800 6200
-F 0 "#PWR063" H 5800 6200 30  0001 C CNN
+F 0 "#PWR062" H 5800 6200 30  0001 C CNN
 F 1 "GND" H 5800 6130 30  0001 C CNN
 	1    5800 6200
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR064
+L GND #PWR063
 U 1 1 4C438AD5
 P 5350 6550
-F 0 "#PWR064" H 5350 6550 30  0001 C CNN
+F 0 "#PWR063" H 5350 6550 30  0001 C CNN
 F 1 "GND" H 5350 6480 30  0001 C CNN
 	1    5350 6550
 	1    0    0    -1  
diff --git a/kicad/xue-rnc/PSU.sch b/kicad/xue-rnc/PSU.sch
index e5a3f50..80ad06d 100644
--- a/kicad/xue-rnc/PSU.sch
+++ b/kicad/xue-rnc/PSU.sch
@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu 02 Sep 2010 12:54:07 PM COT
+EESchema Schematic File Version 2  date Fri 03 Sep 2010 10:34:12 AM COT
 LIBS:power
 LIBS:r_pack2
 LIBS:v0402mhs03
@@ -51,7 +51,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 5 9
 Title ""
-Date "2 sep 2010"
+Date "3 sep 2010"
 Rev ""
 Comp ""
 Comment1 ""
@@ -59,8 +59,26 @@ Comment2 ""
 Comment3 ""
 Comment4 ""
 $EndDescr
-Text Label 7200 5500 0    50   ~ 10
-WATCHDOG
+Wire Wire Line
+	2200 1100 2200 1600
+Wire Wire Line
+	4450 750  4850 750 
+Wire Wire Line
+	7750 5100 8250 5100
+Wire Wire Line
+	8250 6100 7750 6100
+Wire Wire Line
+	6050 3050 6050 3100
+Wire Wire Line
+	2550 1000 2850 1000
+Wire Wire Line
+	2550 1000 2550 1150
+Wire Wire Line
+	2550 1150 2600 1150
+Wire Wire Line
+	2600 1150 2600 1600
+Wire Wire Line
+	1100 1100 700  1100
 Wire Wire Line
 	7200 5500 8250 5500
 Wire Wire Line
@@ -85,13 +103,11 @@ Wire Wire Line
 	7900 1600 7900 1000
 Wire Wire Line
 	2350 850  2350 750 
-Wire Wire Line
-	2850 1000 2600 1000
 Connection ~ 2300 750 
 Wire Wire Line
 	2300 1300 2300 750 
 Wire Wire Line
-	3550 5950 3700 5950
+	3700 5950 3550 5950
 Connection ~ 8200 3050
 Wire Wire Line
 	7900 1000 8100 1000
@@ -101,7 +117,7 @@ Connection ~ 7550 750
 Wire Wire Line
 	7550 1300 7550 750 
 Wire Wire Line
-	3700 5250 2200 5250
+	2200 5250 3700 5250
 Wire Wire Line
 	8250 5400 7750 5400
 Connection ~ 3350 6550
@@ -131,7 +147,7 @@ Wire Wire Line
 Wire Wire Line
 	6350 6250 6000 6250
 Wire Wire Line
-	6200 6250 6200 6350
+	6200 6350 6200 6250
 Connection ~ 6100 5400
 Wire Wire Line
 	6050 5750 6100 5750
@@ -157,22 +173,16 @@ Wire Wire Line
 	6200 5400 6200 5950
 Connection ~ 6200 5950
 Connection ~ 6200 5400
-Wire Wire Line
-	7000 2700 8250 2700
 Wire Wire Line
 	8650 2200 8850 2200
-Wire Wire Line
-	5800 3050 6200 3050
 Wire Wire Line
 	7300 2950 7350 2950
 Wire Wire Line
-	6200 3650 6200 3600
-Wire Wire Line
-	6200 3050 6200 3100
+	6050 3650 6050 3600
 Wire Wire Line
 	6200 2700 6200 2950
 Wire Wire Line
-	6100 2700 6500 2700
+	6500 2700 6100 2700
 Connection ~ 6200 2700
 Wire Wire Line
 	7500 3650 7500 3450
@@ -189,22 +199,16 @@ Wire Wire Line
 Connection ~ 10100 2700
 Wire Wire Line
 	8250 5300 7750 5300
-Wire Wire Line
-	700  1100 1100 1100
 Wire Wire Line
 	7400 1100 7400 1700
 Connection ~ 7450 750 
 Wire Wire Line
 	7450 750  7450 1000
 Wire Wire Line
-	1100 1700 1100 1650
-Wire Wire Line
-	1100 1100 1100 1150
+	950  1700 950  1650
 Wire Wire Line
 	1100 750  1100 1000
 Connection ~ 2200 750 
-Wire Wire Line
-	2200 1300 2200 1100
 Wire Wire Line
 	3850 1650 3850 1700
 Connection ~ 4550 1600
@@ -213,12 +217,9 @@ Wire Wire Line
 Wire Wire Line
 	4700 1600 4350 1600
 Wire Wire Line
-	4550 1600 4550 1700
-Connection ~ 4450 750 
+	4550 1700 4550 1600
 Wire Wire Line
 	4400 1100 4450 1100
-Wire Wire Line
-	4450 950  4250 950 
 Connection ~ 3850 1100
 Wire Wire Line
 	2300 1700 2300 1500
@@ -238,22 +239,20 @@ Wire Wire Line
 Wire Wire Line
 	8050 4900 8050 4950
 Wire Wire Line
-	8250 4800 8050 4800
+	8050 4700 8050 4800
 Wire Wire Line
-	8050 4800 8050 4700
-Wire Wire Line
-	4500 6700 4500 6600
+	4500 6600 4500 6700
 Connection ~ 4500 6650
 Wire Wire Line
 	3200 1700 3200 1600
 Wire Wire Line
-	3900 1100 3800 1100
+	3800 1100 3900 1100
 Wire Wire Line
 	3850 1150 3850 950 
 Wire Wire Line
 	3850 950  4050 950 
 Wire Wire Line
-	4450 1100 4450 750 
+	4450 1100 4450 950 
 Connection ~ 4450 950 
 Wire Wire Line
 	4350 1600 4350 1550
@@ -266,12 +265,10 @@ Wire Wire Line
 Wire Wire Line
 	4550 750  4550 1300
 Connection ~ 4550 1300
-Wire Wire Line
-	4850 750  4400 750 
 Connection ~ 4550 750 
 Connection ~ 9850 750 
 Wire Wire Line
-	10150 750  9700 750 
+	9700 750  10150 750 
 Connection ~ 9850 1300
 Wire Wire Line
 	9850 750  9850 1300
@@ -291,12 +288,12 @@ Wire Wire Line
 Wire Wire Line
 	9150 950  9150 1150
 Wire Wire Line
-	9200 1100 9100 1100
+	9100 1100 9200 1100
 Wire Wire Line
 	7550 1700 7550 1500
 Connection ~ 9150 1100
 Wire Wire Line
-	9750 950  9550 950 
+	9550 950  9750 950 
 Wire Wire Line
 	9750 1100 9700 1100
 Connection ~ 9750 750 
@@ -312,29 +309,27 @@ Wire Wire Line
 Wire Wire Line
 	8500 1600 8500 1700
 Wire Wire Line
-	1900 750  2600 750 
+	2600 750  1900 750 
 Wire Wire Line
-	2200 1000 2200 750 
+	2200 750  2200 1000
 Wire Wire Line
-	1000 750  1400 750 
+	1400 750  1000 750 
 Connection ~ 1100 750 
 Connection ~ 6300 750 
 Wire Wire Line
-	6200 750  6600 750 
+	6600 750  6200 750 
 Wire Wire Line
-	6300 750  6300 1000
+	6300 1000 6300 750 
 Wire Wire Line
 	6300 1150 6300 1100
 Wire Wire Line
 	6300 1700 6300 1650
 Wire Wire Line
-	7100 750  7900 750 
+	7900 750  7100 750 
 Wire Wire Line
 	7450 1000 7400 1000
 Wire Wire Line
 	6300 1100 5900 1100
-Wire Wire Line
-	7750 5200 8250 5200
 Wire Wire Line
 	8850 2200 8850 2250
 Wire Wire Line
@@ -345,14 +340,14 @@ Wire Wire Line
 Wire Wire Line
 	10350 3550 10000 3550
 Wire Wire Line
-	10200 3550 10200 3650
+	10200 3650 10200 3550
 Wire Wire Line
 	10050 3050 10100 3050
 Wire Wire Line
 	10100 2900 9900 2900
 Connection ~ 9500 3050
 Wire Wire Line
-	9550 3050 9450 3050
+	9450 3050 9550 3050
 Wire Wire Line
 	9500 3100 9500 2900
 Wire Wire Line
@@ -372,26 +367,26 @@ Wire Wire Line
 	10200 2700 10200 3250
 Connection ~ 10200 3250
 Wire Wire Line
-	9450 2700 10300 2700
+	10300 2700 9450 2700
 Connection ~ 10200 2700
 Wire Wire Line
-	7650 3050 7650 2700
+	7650 2700 7650 3050
 Connection ~ 7650 2700
 Wire Wire Line
-	8250 3050 8150 3050
+	8150 3050 8250 3050
 Wire Wire Line
 	7850 2700 7850 2200
 Connection ~ 7850 2700
 Wire Wire Line
 	7850 2200 8050 2200
 Wire Wire Line
-	6050 5400 6400 5400
+	6400 5400 6050 5400
 Wire Wire Line
 	5150 5300 5300 5300
 Wire Wire Line
 	5300 5300 5300 5400
 Wire Wire Line
-	5450 5400 5150 5400
+	5150 5400 5450 5400
 Connection ~ 5300 5400
 Wire Wire Line
 	3700 5350 3450 5350
@@ -406,8 +401,6 @@ Wire Wire Line
 	3550 6550 3100 6550
 Wire Wire Line
 	3100 6550 3100 6400
-Wire Wire Line
-	8250 5100 7750 5100
 Wire Wire Line
 	2500 5600 2500 6200
 Connection ~ 2550 5250
@@ -427,7 +420,7 @@ Wire Wire Line
 Wire Wire Line
 	2700 6200 2700 5850
 Wire Wire Line
-	1000 5250 1700 5250
+	1700 5250 1000 5250
 Wire Wire Line
 	7600 900  7600 750 
 Connection ~ 7600 750 
@@ -438,11 +431,8 @@ Connection ~ 3650 5950
 Wire Wire Line
 	3650 6100 3700 6100
 Connection ~ 2350 750 
-Connection ~ 2600 1100
 Wire Wire Line
 	2850 1000 2850 850 
-Wire Wire Line
-	2600 1000 2600 1600
 Wire Wire Line
 	2600 1600 3000 1600
 Wire Wire Line
@@ -453,8 +443,6 @@ Wire Wire Line
 	8250 5600 7750 5600
 Wire Wire Line
 	8250 5800 7750 5800
-Wire Wire Line
-	8250 6100 7750 6100
 Wire Wire Line
 	7700 6850 7200 6850
 Wire Wire Line
@@ -465,6 +453,33 @@ Wire Wire Line
 	7650 6300 8250 6300
 Wire Wire Line
 	7350 4900 7350 5050
+Wire Wire Line
+	8050 4800 8250 4800
+Wire Wire Line
+	950  1150 950  1100
+Connection ~ 950  1100
+Wire Wire Line
+	2600 1100 2550 1100
+Connection ~ 2550 1100
+Wire Wire Line
+	5800 3050 6200 3050
+Connection ~ 6050 3050
+Wire Wire Line
+	7000 2700 8250 2700
+Wire Wire Line
+	8250 5200 7750 5200
+Wire Wire Line
+	3850 750  3800 750 
+Wire Wire Line
+	4250 950  4500 950 
+Wire Wire Line
+	4500 950  4500 750 
+Connection ~ 4500 750 
+Wire Wire Line
+	2200 1600 2300 1600
+Connection ~ 2300 1600
+Text Label 7200 5500 0    50   ~ 10
+WATCHDOG
 $Comp
 L CONN_4 P1
 U 1 1 4C7FD562
@@ -655,7 +670,7 @@ $EndComp
 Text Label 2350 5250 0    30   ~ 0
 VIN_DC-DC-2.5
 Text Label 7750 5100 0    60   ~ 12
-lout_5.0
+Iout_5.0
 $Comp
 L GND #PWR029
 U 1 1 4C7C4DCE
@@ -825,20 +840,20 @@ VIN_DC-DC-5.0
 $Comp
 L GND #PWR035
 U 1 1 4C79C99D
-P 6200 3650
-F 0 "#PWR035" H 6200 3650 30  0001 C CNN
-F 1 "GND" H 6200 3580 30  0001 C CNN
-	1    6200 3650
+P 6050 3650
+F 0 "#PWR035" H 6050 3650 30  0001 C CNN
+F 1 "GND" H 6050 3580 30  0001 C CNN
+	1    6050 3650
 	1    0    0    -1  
 $EndComp
 $Comp
 L R R35
 U 1 1 4C79C99C
-P 6200 3350
-F 0 "R35" V 6280 3350 50  0000 C CNN
-F 1 "R" V 6200 3350 50  0000 C CNN
-F 2 "0402" H 6200 3350 60  0001 C CNN
-	1    6200 3350
+P 6050 3350
+F 0 "R35" V 6130 3350 50  0000 C CNN
+F 1 "R" V 6050 3350 50  0000 C CNN
+F 2 "0402" H 6050 3350 60  0001 C CNN
+	1    6050 3350
 	1    0    0    -1  
 $EndComp
 $Comp
@@ -1049,29 +1064,20 @@ $EndComp
 $Comp
 L GND #PWR043
 U 1 1 4C77068E
-P 1100 1700
-F 0 "#PWR043" H 1100 1700 30  0001 C CNN
-F 1 "GND" H 1100 1630 30  0001 C CNN
-	1    1100 1700
+P 950 1700
+F 0 "#PWR043" H 950 1700 30  0001 C CNN
+F 1 "GND" H 950 1630 30  0001 C CNN
+	1    950  1700
 	1    0    0    -1  
 $EndComp
 $Comp
 L R R31
 U 1 1 4C77067B
-P 1100 1400
-F 0 "R31" V 1180 1400 50  0000 C CNN
-F 1 "R" V 1100 1400 50  0000 C CNN
-F 2 "0402" H 1100 1400 60  0001 C CNN
-	1    1100 1400
-	1    0    0    -1  
-$EndComp
-$Comp
-L GND #PWR044
-U 1 1 4C77064A
-P 2200 1300
-F 0 "#PWR044" H 2200 1300 30  0001 C CNN
-F 1 "GND" H 2200 1230 30  0001 C CNN
-	1    2200 1300
+P 950 1400
+F 0 "R31" V 1030 1400 50  0000 C CNN
+F 1 "R" V 950 1400 50  0000 C CNN
+F 2 "0402" H 950 1400 60  0001 C CNN
+	1    950  1400
 	1    0    0    -1  
 $EndComp
 $Comp
@@ -1107,19 +1113,19 @@ VFB1.2
 Text Label 3850 950  0    30   ~ 0
 VFB3.3
 $Comp
-L +3.3V #PWR045
+L +3.3V #PWR044
 U 1 1 4C6D30A1
 P 4850 750
-F 0 "#PWR045" H 4850 710 30  0001 C CNN
+F 0 "#PWR044" H 4850 710 30  0001 C CNN
 F 1 "+3.3V" H 4850 860 30  0000 C CNN
 	1    4850 750 
 	1    0    0    -1  
 $EndComp
 $Comp
-L +1.2V #PWR046
+L +1.2V #PWR045
 U 1 1 4C6D3097
 P 10150 750
-F 0 "#PWR046" H 10150 890 20  0001 C CNN
+F 0 "#PWR045" H 10150 890 20  0001 C CNN
 F 1 "+1.2V" H 10150 860 30  0000 C CNN
 	1    10150 750 
 	1    0    0    -1  
@@ -1155,10 +1161,10 @@ F 2 "1206" H 9650 1450 60  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR047
+L GND #PWR046
 U 1 1 4C6D2FD4
 P 7550 1700
-F 0 "#PWR047" H 7550 1700 30  0001 C CNN
+F 0 "#PWR046" H 7550 1700 30  0001 C CNN
 F 1 "GND" H 7550 1630 30  0001 C CNN
 	1    7550 1700
 	1    0    0    -1  
@@ -1204,37 +1210,37 @@ F 2 "0402" H 10000 1450 60  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR048
+L GND #PWR047
 U 1 1 4C6D2FCF
 P 9850 1700
-F 0 "#PWR048" H 9850 1700 30  0001 C CNN
+F 0 "#PWR047" H 9850 1700 30  0001 C CNN
 F 1 "GND" H 9850 1630 30  0001 C CNN
 	1    9850 1700
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR049
+L GND #PWR048
 U 1 1 4C6D2FCE
 P 9150 1700
-F 0 "#PWR049" H 9150 1700 30  0001 C CNN
+F 0 "#PWR048" H 9150 1700 30  0001 C CNN
 F 1 "GND" H 9150 1630 30  0001 C CNN
 	1    9150 1700
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR050
+L GND #PWR049
 U 1 1 4C6D2F47
 P 3850 1700
-F 0 "#PWR050" H 3850 1700 30  0001 C CNN
+F 0 "#PWR049" H 3850 1700 30  0001 C CNN
 F 1 "GND" H 3850 1630 30  0001 C CNN
 	1    3850 1700
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR051
+L GND #PWR050
 U 1 1 4C6D2F41
 P 4550 1700
-F 0 "#PWR051" H 4550 1700 30  0001 C CNN
+F 0 "#PWR050" H 4550 1700 30  0001 C CNN
 F 1 "GND" H 4550 1630 30  0001 C CNN
 	1    4550 1700
 	1    0    0    -1  
@@ -1252,11 +1258,11 @@ $EndComp
 $Comp
 L INDUCTOR L8
 U 1 1 4C6D2E6A
-P 4100 750
-F 0 "L8" V 4050 700 40  0000 C CNN
-F 1 "2.2uH" V 4050 1000 40  0000 C CNN
-F 2 "1210" H 4100 750 60  0001 C CNN
-	1    4100 750 
+P 4150 750
+F 0 "L8" V 4100 700 40  0000 C CNN
+F 1 "2.2uH" V 4100 1000 40  0000 C CNN
+F 2 "1210" H 4150 750 60  0001 C CNN
+	1    4150 750 
 	0    1    1    0   
 $EndComp
 $Comp
@@ -1280,10 +1286,10 @@ F 2 "0402" H 3850 1400 60  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR052
+L GND #PWR051
 U 1 1 4C6D2CCE
 P 2300 1700
-F 0 "#PWR052" H 2300 1700 30  0001 C CNN
+F 0 "#PWR051" H 2300 1700 30  0001 C CNN
 F 1 "GND" H 2300 1630 30  0001 C CNN
 	1    2300 1700
 	1    0    0    -1  
@@ -1319,19 +1325,19 @@ F 2 "0805" H 2300 1400 60  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR053
+L GND #PWR052
 U 1 1 4C6D2C02
 P 8500 1700
-F 0 "#PWR053" H 8500 1700 30  0001 C CNN
+F 0 "#PWR052" H 8500 1700 30  0001 C CNN
 F 1 "GND" H 8500 1630 30  0001 C CNN
 	1    8500 1700
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR054
+L GND #PWR053
 U 1 1 4C6D2BFC
 P 3200 1700
-F 0 "#PWR054" H 3200 1700 30  0001 C CNN
+F 0 "#PWR053" H 3200 1700 30  0001 C CNN
 F 1 "GND" H 3200 1630 30  0001 C CNN
 	1    3200 1700
 	1    0    0    -1  
@@ -1357,10 +1363,10 @@ F 2 "SOT23-5" H 3100 1050 60  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR055
+L GND #PWR054
 U 1 1 4C6C9F96
 P 4500 6700
-F 0 "#PWR055" H 4500 6700 30  0001 C CNN
+F 0 "#PWR054" H 4500 6700 30  0001 C CNN
 F 1 "GND" H 4500 6630 30  0001 C CNN
 	1    4500 6700
 	1    0    0    -1  
@@ -1376,10 +1382,10 @@ F 2 "DFN10" H 4250 5450 60  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR056
+L GND #PWR055
 U 1 1 4C69F7A5
 P 8050 4950
-F 0 "#PWR056" H 8050 4950 30  0001 C CNN
+F 0 "#PWR055" H 8050 4950 30  0001 C CNN
 F 1 "GND" H 8050 4880 30  0001 C CNN
 	1    8050 4950
 	1    0    0    -1  
diff --git a/kicad/xue-rnc/USB.sch b/kicad/xue-rnc/USB.sch
index 58a1395..52d6233 100644
--- a/kicad/xue-rnc/USB.sch
+++ b/kicad/xue-rnc/USB.sch
@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu 02 Sep 2010 12:54:07 PM COT
+EESchema Schematic File Version 2  date Fri 03 Sep 2010 10:34:12 AM COT
 LIBS:power
 LIBS:r_pack2
 LIBS:v0402mhs03
@@ -51,7 +51,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 7 9
 Title ""
-Date "2 sep 2010"
+Date "3 sep 2010"
 Rev ""
 Comp ""
 Comment1 ""
@@ -359,10 +359,10 @@ F 1 "15k" V 3975 6100 50  0000 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L +3.3V #PWR065
+L +3.3V #PWR064
 U 1 1 4C7D365E
 P 3975 5750
-F 0 "#PWR065" H 3975 5710 30  0001 C CNN
+F 0 "#PWR064" H 3975 5710 30  0001 C CNN
 F 1 "+3.3V" H 3975 5860 30  0000 C CNN
 	1    3975 5750
 	1    0    0    -1  
@@ -374,10 +374,10 @@ USBA_D-
 Text Label 4125 6550 0    40   ~ 0
 USBD_D-
 $Comp
-L GND #PWR066
+L GND #PWR065
 U 1 1 4C7D3584
 P 1750 7150
-F 0 "#PWR066" H 1750 7150 30  0001 C CNN
+F 0 "#PWR065" H 1750 7150 30  0001 C CNN
 F 1 "GND" H 1750 7080 30  0001 C CNN
 	1    1750 7150
 	1    0    0    -1  
@@ -401,10 +401,10 @@ F 1 "24" V 2400 6550 50  0000 C CNN
 	0    1    1    0   
 $EndComp
 $Comp
-L GND #PWR067
+L GND #PWR066
 U 1 1 4C7D353A
 P 1850 3450
-F 0 "#PWR067" H 1850 3450 30  0001 C CNN
+F 0 "#PWR066" H 1850 3450 30  0001 C CNN
 F 1 "GND" H 1850 3380 30  0001 C CNN
 	1    1850 3450
 	1    0    0    -1  
@@ -432,10 +432,10 @@ USB_CASE_DEV
 Text Label 5850 2950 0    40   ~ 0
 USB_CASE_HOST
 $Comp
-L +3.3V #PWR068
+L +3.3V #PWR067
 U 1 1 4C7D32BA
 P 4350 2050
-F 0 "#PWR068" H 4350 2010 30  0001 C CNN
+F 0 "#PWR067" H 4350 2010 30  0001 C CNN
 F 1 "+3.3V" H 4350 2160 30  0000 C CNN
 	1    4350 2050
 	1    0    0    -1  
@@ -500,91 +500,91 @@ F 2 "MLF16" H 1700 2750 60  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L +3.3V #PWR069
+L +3.3V #PWR068
 U 1 1 4C695F50
 P 2700 4600
-F 0 "#PWR069" H 2700 4560 30  0001 C CNN
+F 0 "#PWR068" H 2700 4560 30  0001 C CNN
 F 1 "+3.3V" H 2700 4710 30  0000 C CNN
 	1    2700 4600
 	1    0    0    -1  
 $EndComp
 $Comp
-L +3.3V #PWR070
+L +3.3V #PWR069
 U 1 1 4C695F4B
 P 2100 6100
-F 0 "#PWR070" H 2100 6060 30  0001 C CNN
+F 0 "#PWR069" H 2100 6060 30  0001 C CNN
 F 1 "+3.3V" H 2100 6210 30  0000 C CNN
 	1    2100 6100
 	1    0    0    -1  
 $EndComp
 $Comp
-L +3.3V #PWR071
+L +3.3V #PWR070
 U 1 1 4C695F43
 P 2650 1100
-F 0 "#PWR071" H 2650 1060 30  0001 C CNN
+F 0 "#PWR070" H 2650 1060 30  0001 C CNN
 F 1 "+3.3V" H 2650 1210 30  0000 C CNN
 	1    2650 1100
 	1    0    0    -1  
 $EndComp
 $Comp
-L +3.3V #PWR072
+L +3.3V #PWR071
 U 1 1 4C695F3B
 P 2200 2400
-F 0 "#PWR072" H 2200 2360 30  0001 C CNN
+F 0 "#PWR071" H 2200 2360 30  0001 C CNN
 F 1 "+3.3V" H 2200 2510 30  0000 C CNN
 	1    2200 2400
 	1    0    0    -1  
 $EndComp
 $Comp
-L +2.5V #PWR073
+L +2.5V #PWR072
 U 1 1 4C695DCD
 P 3200 4550
-F 0 "#PWR073" H 3200 4500 20  0001 C CNN
+F 0 "#PWR072" H 3200 4500 20  0001 C CNN
 F 1 "+2.5V" H 3200 4650 30  0000 C CNN
 	1    3200 4550
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR074
+L GND #PWR073
 U 1 1 4C695F0A
 P 3200 5550
-F 0 "#PWR074" H 3200 5550 30  0001 C CNN
+F 0 "#PWR073" H 3200 5550 30  0001 C CNN
 F 1 "GND" H 3200 5480 30  0001 C CNN
 	1    3200 5550
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR075
+L GND #PWR074
 U 1 1 4C695F09
 P 2650 5550
-F 0 "#PWR075" H 2650 5550 30  0001 C CNN
+F 0 "#PWR074" H 2650 5550 30  0001 C CNN
 F 1 "GND" H 2650 5480 30  0001 C CNN
 	1    2650 5550
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR076
+L GND #PWR075
 U 1 1 4C695DFE
 P 3150 1850
-F 0 "#PWR076" H 3150 1850 30  0001 C CNN
+F 0 "#PWR075" H 3150 1850 30  0001 C CNN
 F 1 "GND" H 3150 1780 30  0001 C CNN
 	1    3150 1850
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR077
+L GND #PWR076
 U 1 1 4C695DF8
 P 2600 1850
-F 0 "#PWR077" H 2600 1850 30  0001 C CNN
+F 0 "#PWR076" H 2600 1850 30  0001 C CNN
 F 1 "GND" H 2600 1780 30  0001 C CNN
 	1    2600 1850
 	1    0    0    -1  
 $EndComp
 $Comp
-L +2.5V #PWR078
+L +2.5V #PWR077
 U 1 1 4C695DA7
 P 3150 1100
-F 0 "#PWR078" H 3150 1050 20  0001 C CNN
+F 0 "#PWR077" H 3150 1050 20  0001 C CNN
 F 1 "+2.5V" H 3150 1200 30  0000 C CNN
 	1    3150 1100
 	1    0    0    -1  
@@ -665,28 +665,28 @@ USBD_VP
 Text HLabel 1200 6750 0    40   BiDi ~ 0
 USBD_VM
 $Comp
-L GND #PWR079
+L GND #PWR078
 U 1 1 4C6552B5
 P 5500 7400
-F 0 "#PWR079" H 5500 7400 30  0001 C CNN
+F 0 "#PWR078" H 5500 7400 30  0001 C CNN
 F 1 "GND" H 5500 7330 30  0001 C CNN
 	1    5500 7400
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR080
+L GND #PWR079
 U 1 1 4C6552B4
 P 3150 7500
-F 0 "#PWR080" H 3150 7500 30  0001 C CNN
+F 0 "#PWR079" H 3150 7500 30  0001 C CNN
 F 1 "GND" H 3150 7430 30  0001 C CNN
 	1    3150 7500
 	1    0    0    -1  
 $EndComp
 $Comp
-L +2.5V #PWR081
+L +2.5V #PWR080
 U 1 1 4C6552B2
 P 1150 6150
-F 0 "#PWR081" H 1150 6100 20  0001 C CNN
+F 0 "#PWR080" H 1150 6100 20  0001 C CNN
 F 1 "+2.5V" H 1150 6250 30  0000 C CNN
 	1    1150 6150
 	1    0    0    -1  
@@ -702,28 +702,28 @@ F 2 "0603" H 4650 7000 60  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR082
+L GND #PWR081
 U 1 1 4C6552AE
 P 4650 7350
-F 0 "#PWR082" H 4650 7350 30  0001 C CNN
+F 0 "#PWR081" H 4650 7350 30  0001 C CNN
 F 1 "GND" H 4650 7280 30  0001 C CNN
 	1    4650 7350
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR083
+L GND #PWR082
 U 1 1 4C63F2B5
 P 4900 3700
-F 0 "#PWR083" H 4900 3700 30  0001 C CNN
+F 0 "#PWR082" H 4900 3700 30  0001 C CNN
 F 1 "GND" H 4900 3630 30  0001 C CNN
 	1    4900 3700
 	1    0    0    -1  
 $EndComp
 $Comp
-L +5V #PWR084
+L +5V #PWR083
 U 1 1 4C63F295
 P 4700 1350
-F 0 "#PWR084" H 4700 1440 20  0001 C CNN
+F 0 "#PWR083" H 4700 1440 20  0001 C CNN
 F 1 "+5V" H 4700 1440 30  0000 C CNN
 	1    4700 1350
 	1    0    0    -1  
@@ -749,28 +749,28 @@ F 2 "0603" H 4900 3350 60  0001 C CNN
 	1    0    0    -1  
 $EndComp
 $Comp
-L +2.5V #PWR085
+L +2.5V #PWR084
 U 1 1 4C63EC16
 P 1250 2450
-F 0 "#PWR085" H 1250 2400 20  0001 C CNN
+F 0 "#PWR084" H 1250 2400 20  0001 C CNN
 F 1 "+2.5V" H 1250 2550 30  0000 C CNN
 	1    1250 2450
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR086
+L GND #PWR085
 U 1 1 4C63EA1B
 P 3100 3800
-F 0 "#PWR086" H 3100 3800 30  0001 C CNN
+F 0 "#PWR085" H 3100 3800 30  0001 C CNN
 F 1 "GND" H 3100 3730 30  0001 C CNN
 	1    3100 3800
 	1    0    0    -1  
 $EndComp
 $Comp
-L GND #PWR087
+L GND #PWR086
 U 1 1 4C63E9FA
 P 5950 3750
-F 0 "#PWR087" H 5950 3750 30  0001 C CNN
+F 0 "#PWR086" H 5950 3750 30  0001 C CNN
 F 1 "GND" H 5950 3680 30  0001 C CNN
 	1    5950 3750
 	1    0    0    -1  
diff --git a/kicad/xue-rnc/eth_phy.sch b/kicad/xue-rnc/eth_phy.sch
index f9f7857..a13baa9 100644
--- a/kicad/xue-rnc/eth_phy.sch
+++ b/kicad/xue-rnc/eth_phy.sch
@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu 02 Sep 2010 12:54:07 PM COT
+EESchema Schematic File Version 2  date Fri 03 Sep 2010 10:34:12 AM COT
 LIBS:power
 LIBS:r_pack2
 LIBS:v0402mhs03
@@ -51,7 +51,7 @@ EELAYER END
 $Descr A4 11700 8267
 Sheet 7 9
 Title ""
-Date "2 sep 2010"
+Date "3 sep 2010"
 Rev ""
 Comp ""
 Comment1 ""
diff --git a/kicad/xue-rnc/xue-rnc-cache.lib b/kicad/xue-rnc/xue-rnc-cache.lib
index 8ca2479..11a481f 100644
--- a/kicad/xue-rnc/xue-rnc-cache.lib
+++ b/kicad/xue-rnc/xue-rnc-cache.lib
@@ -1,4 +1,4 @@
-EESchema-LIBRARY Version 2.3  Date: Thu 02 Sep 2010 12:54:07 PM COT
+EESchema-LIBRARY Version 2.3  Date: Fri 03 Sep 2010 10:34:12 AM COT
 #
 # +1.2V
 #
diff --git a/kicad/xue-rnc/xue-rnc.brd b/kicad/xue-rnc/xue-rnc.brd
index 5a08bc2..203a86c 100644
--- a/kicad/xue-rnc/xue-rnc.brd
+++ b/kicad/xue-rnc/xue-rnc.brd
@@ -1,4 +1,4 @@
-PCBNEW-BOARD Version 1 date Thu 02 Sep 2010 12:53:58 PM COT
+PCBNEW-BOARD Version 1 date Thu 02 Sep 2010 06:11:47 PM COT
 
 # Created by Pcbnew(2010-08-29 BZR 2460)-unstable
 
@@ -39,7 +39,7 @@ Layer[2] Inner3 signal
 Layer[3] Inner4 signal
 Layer[4] VDD power
 Layer[15] Front signal
-TrackWidth 118
+TrackWidth 39
 TrackWidthList 59
 TrackWidthList 79
 TrackWidthList 118
@@ -5181,182 +5181,182 @@ Po -295 177
 $EndPAD
 $EndMODULE  R_PACK4-0402
 $MODULE MLF20m1
-Po 70142 24035 0 15 4C7ABDFC 4C69F729 ~~
+Po 70426 24143 900 15 4C7ABDFC 4C69F729 ~~
 Li MLF20m1
 Sc 4C69F729
 AR /4C69ED5F/4C69EE11
 Op 0 0 0
 At SMD 
-T0 -583 -918 200 200 0 40 N V 25 N"U9"
-T1 0 150 200 200 0 40 N I 25 N"ATTINY24A-MLF"
+T0 -583 -918 200 200 900 40 N V 25 N"U9"
+T1 0 150 200 200 900 40 N I 25 N"ATTINY24A-MLF"
 DC -866 -866 -866 -944 39 21
 DS -787 787 -787 -787 39 21
 DS -787 -787 787 -787 39 21
 DS 787 -787 787 787 39 21
 DS 787 787 -787 787 39 21
 $PAD
-Sh "PAD" R 433 433 0 0 0
+Sh "PAD" R 433 433 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 129 "GND"
 Po -235 235
 $EndPAD
 $PAD
-Sh "PAD" R 433 433 0 0 0
+Sh "PAD" R 433 433 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 129 "GND"
 Po -235 -235
 $EndPAD
 $PAD
-Sh "PAD" R 433 433 0 0 0
+Sh "PAD" R 433 433 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 129 "GND"
 Po 235 235
 $EndPAD
 $PAD
-Sh "PAD" R 433 433 0 0 0
+Sh "PAD" R 433 433 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 129 "GND"
 Po 235 -235
 $EndPAD
 $PAD
-Sh "15" R 98 157 0 0 0
+Sh "15" R 98 157 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 98 "/PSU/5V_EN"
 Po -393 688
 $EndPAD
 $PAD
-Sh "1" R 98 157 0 0 0
+Sh "1" R 98 157 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 102 "/PSU/AVR_SCK"
 Po -393 -688
 $EndPAD
 $PAD
-Sh "14" R 99 157 0 0 0
+Sh "14" R 99 157 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 95 "/PSU/1.2V_EN"
 Po -196 688
 $EndPAD
 $PAD
-Sh "2" R 99 157 0 0 0
+Sh "2" R 99 157 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 103 "/PSU/Iout_1.2"
 Po -196 -688
 $EndPAD
 $PAD
-Sh "13" R 98 157 0 0 0
+Sh "13" R 98 157 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 101 "/PSU/AVR_RST"
 Po 0 688
 $EndPAD
 $PAD
-Sh "3" R 98 157 0 0 0
+Sh "3" R 98 157 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 105 "/PSU/Iout_3.3"
 Po 0 -688
 $EndPAD
 $PAD
-Sh "12" R 99 157 0 0 0
+Sh "12" R 99 157 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 0 ""
 Po 196 688
 $EndPAD
 $PAD
-Sh "4" R 99 157 0 0 0
+Sh "4" R 99 157 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 0 ""
 Po 196 -688
 $EndPAD
 $PAD
-Sh "11" R 98 157 0 0 0
+Sh "11" R 98 157 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 96 "/PSU/2.5V_EN"
 Po 393 688
 $EndPAD
 $PAD
-Sh "5" R 98 157 0 0 0
+Sh "5" R 98 157 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 0 ""
 Po 393 -688
 $EndPAD
 $PAD
-Sh "20" R 157 98 0 0 0
+Sh "20" R 157 98 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 99 "/PSU/AVR_MISO"
 Po -688 -393
 $EndPAD
 $PAD
-Sh "6" R 157 98 0 0 0
+Sh "6" R 157 98 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 0 ""
 Po 688 -393
 $EndPAD
 $PAD
-Sh "19" R 157 99 0 0 0
+Sh "19" R 157 99 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 0 ""
 Po -688 -196
 $EndPAD
 $PAD
-Sh "7" R 157 99 0 0 0
+Sh "7" R 157 99 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 0 ""
 Po 688 -196
 $EndPAD
 $PAD
-Sh "18" R 157 98 0 0 0
+Sh "18" R 157 98 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 0 ""
 Po -688 0
 $EndPAD
 $PAD
-Sh "8" R 157 98 0 0 0
+Sh "8" R 157 98 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 129 "GND"
 Po 688 0
 $EndPAD
 $PAD
-Sh "17" R 157 99 0 0 0
+Sh "17" R 157 99 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 0 ""
 Po -688 196
 $EndPAD
 $PAD
-Sh "9" R 157 99 0 0 0
+Sh "9" R 157 99 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 4 "+3.3V"
 Po 688 196
 $EndPAD
 $PAD
-Sh "16" R 157 98 0 0 0
+Sh "16" R 157 98 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 100 "/PSU/AVR_MOSI"
 Po -688 393
 $EndPAD
 $PAD
-Sh "10" R 157 98 0 0 0
+Sh "10" R 157 98 0 0 900
 Dr 0 0 0
 At SMD N 00888000
 Ne 0 ""
@@ -13715,27 +13715,27 @@ Po 176 0
 $EndPAD
 $EndMODULE  0402
 $MODULE 0402
-Po 70386 25122 0 15 4C7FD8B2 4C7FD4BF ~~
+Po 70871 23116 1800 15 4C802DB2 4C7FD4BF ~~
 Li 0402
 Sc 4C7FD4BF
 AR /4C69ED5F/4C7FD244
 Op 0 0 0
 At SMD 
-T0 -638 55 200 200 0 40 N V 25 N"R57"
-T1 -13 314 200 200 0 40 N I 25 N"15K"
+T0 -40 402 200 200 1800 40 N V 25 N"R57"
+T1 -13 314 200 200 1800 40 N I 25 N"15K"
 DS -305 168 -305 -168 50 21
 DS -305 -168 305 -168 50 21
 DS 305 -168 305 168 50 21
 DS 305 168 -305 168 50 21
 $PAD
-Sh "1" R 157 236 0 0 0
+Sh "1" R 157 236 0 0 1800
 Dr 0 0 0
 At SMD N 00888000
 Ne 101 "/PSU/AVR_RST"
 Po -176 0
 $EndPAD
 $PAD
-Sh "2" R 157 236 0 0 0
+Sh "2" R 157 236 0 0 1800
 Dr 0 0 0
 At SMD N 00888000
 Ne 4 "+3.3V"
@@ -13771,27 +13771,27 @@ Po 176 0
 $EndPAD
 $EndMODULE  0402
 $MODULE 0402
-Po 62264 22098 900 15 4C7FD8AD 4C7FD4C3 ~~
+Po 70174 23112 1800 15 4C802D95 4C7FD4C3 ~~
 Li 0402
 Sc 4C7FD4C3
 AR /4C69ED5F/4C7FD266
 Op 0 0 0
 At SMD 
-T0 -705 16 200 200 900 40 N V 25 N"C104"
-T1 0 150 200 200 900 40 N I 25 N"100nF"
+T0 4 402 200 200 1800 40 N V 25 N"C104"
+T1 0 150 200 200 1800 40 N I 25 N"100nF"
 DS -305 168 -305 -168 50 21
 DS -305 -168 305 -168 50 21
 DS 305 -168 305 168 50 21
 DS 305 168 -305 168 50 21
 $PAD
-Sh "1" R 157 236 0 0 900
+Sh "1" R 157 236 0 0 1800
 Dr 0 0 0
 At SMD N 00888000
 Ne 4 "+3.3V"
 Po -176 0
 $EndPAD
 $PAD
-Sh "2" R 157 236 0 0 900
+Sh "2" R 157 236 0 0 1800
 Dr 0 0 0
 At SMD N 00888000
 Ne 129 "GND"
@@ -22476,7 +22476,7 @@ ZLayer 4
 ZAux 43 F
 ZClearance 59 T
 ZMinThickness 59
-ZOptions 0 16 F 79 79
+ZOptions 0 16 S 79 79
 ZCorner 57465 32756 0
 ZCorner 57465 32441 0
 ZCorner 57807 32441 0
@@ -25057,7 +25057,7 @@ ZLayer 4
 ZAux 51 F
 ZClearance 59 T
 ZMinThickness 59
-ZOptions 0 16 F 79 79
+ZOptions 0 16 S 79 79
 ZCorner 50610 40110 0
 ZCorner 51756 37996 0
 ZCorner 51843 37949 0
@@ -30765,7 +30765,7 @@ ZLayer 1
 ZAux 12 F
 ZClearance 59 T
 ZMinThickness 59
-ZOptions 0 16 F 79 79
+ZOptions 0 16 S 79 79
 ZCorner 66094 41240 0
 ZCorner 66339 30043 0
 ZCorner 66339 29488 0
@@ -38691,7 +38691,7 @@ ZLayer 2
 ZAux 9 F
 ZClearance 59 T
 ZMinThickness 59
-ZOptions 0 16 F 79 79
+ZOptions 0 16 S 79 79
 ZCorner 58146 36236 0
 ZCorner 58146 33566 0
 ZCorner 63350 28362 0
@@ -39899,7 +39899,7 @@ ZLayer 15
 ZAux 4 F
 ZClearance 157 T
 ZMinThickness 39
-ZOptions 0 16 F 39 197
+ZOptions 0 16 S 39 197
 ZCorner 65823 25014 0
 ZCorner 65823 24285 0
 ZCorner 63953 24285 0
@@ -39987,7 +39987,7 @@ ZLayer 15
 ZAux 14 F
 ZClearance 39 T
 ZMinThickness 39
-ZOptions 0 16 F 39 79
+ZOptions 0 16 S 39 79
 ZCorner 64362 27985 0
 ZCorner 64362 27828 0
 ZCorner 64370 27828 0
@@ -40093,7 +40093,7 @@ ZLayer 15
 ZAux 9 F
 ZClearance 157 T
 ZMinThickness 100
-ZOptions 1 16 F 39 197
+ZOptions 1 16 S 39 197
 ZCorner 64366 25986 0
 ZCorner 64366 25470 0
 ZCorner 63949 25470 0
@@ -40227,7 +40227,7 @@ ZLayer 15
 ZAux 5 E
 ZClearance 59 T
 ZMinThickness 59
-ZOptions 1 16 F 79 79
+ZOptions 1 16 S 79 79
 ZCorner 65685 26091 0
 ZCorner 65685 25552 0
 ZCorner 65673 25540 0
@@ -40284,7 +40284,7 @@ ZLayer 15
 ZAux 4 F
 ZClearance 157 T
 ZMinThickness 39
-ZOptions 0 16 F 39 197
+ZOptions 0 16 S 39 197
 ZCorner 65720 27016 0
 ZCorner 65720 26362 0
 ZCorner 63894 26362 0
@@ -40380,7 +40380,7 @@ ZLayer 0
 ZAux 20 F
 ZClearance 98 T
 ZMinThickness 100
-ZOptions 1 16 F 39 197
+ZOptions 1 16 S 39 197
 ZCorner 62665 28102 0
 ZCorner 62720 28091 0
 ZCorner 66091 28091 0
@@ -41748,7 +41748,7 @@ ZLayer 4
 ZAux 22 F
 ZClearance 59 T
 ZMinThickness 59
-ZOptions 1 16 F 79 79
+ZOptions 1 16 S 79 79
 ZCorner 60594 38772 0
 ZCorner 60594 38020 0
 ZCorner 59642 38020 0
@@ -42092,7 +42092,7 @@ ZLayer 15
 ZAux 6 E
 ZClearance 98 T
 ZMinThickness 100
-ZOptions 1 32 F 39 197
+ZOptions 1 32 S 39 197
 ZCorner 65205 16941 0
 ZCorner 65205 13362 0
 ZCorner 58594 13362 0
@@ -42775,7 +42775,7 @@ ZLayer 15
 ZAux 12 E
 ZClearance 98 T
 ZMinThickness 100
-ZOptions 1 32 F 39 197
+ZOptions 1 32 S 39 197
 ZCorner 58630 21457 0
 ZCorner 58630 18008 0
 ZCorner 59331 17307 0
@@ -43608,7 +43608,7 @@ ZLayer 0
 ZAux 12 E
 ZClearance 98 T
 ZMinThickness 100
-ZOptions 1 32 F 39 197
+ZOptions 1 32 S 39 197
 ZCorner 58634 21461 0
 ZCorner 58634 18012 0
 ZCorner 59331 17315 0
@@ -44254,7 +44254,7 @@ ZLayer 15
 ZAux 6 F
 ZClearance 157 T
 ZMinThickness 39
-ZOptions 0 32 F 39 197
+ZOptions 0 32 S 39 197
 ZCorner 65732 19945 0
 ZCorner 65732 19213 0
 ZCorner 64583 19213 0
diff --git a/kicad/xue-rnc/xue-rnc.erc b/kicad/xue-rnc/xue-rnc.erc
new file mode 100644
index 0000000..5efc330
--- /dev/null
+++ b/kicad/xue-rnc/xue-rnc.erc
@@ -0,0 +1,503 @@
+ERC report (Fri 03 Sep 2010 10:34:02 AM COT)
+
+***** Sheet / (Root) 
+
+***** Sheet /FPGA, Port0, Port2, PROG IF/
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (13.4000 ",4.1500 "): Cmp U1, Pin C17 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (13.4000 ",3.7500 "): Cmp U1, Pin E16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",2.4500 "): Cmp U1, Pin Y18 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",2.3500 "): Cmp U1, Pin W18 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",3.0500 "): Cmp U1, Pin V18 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",1.9500 "): Cmp U1, Pin T18 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",4.2500 "): Cmp U1, Pin AB7 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",4.1500 "): Cmp U1, Pin Y17 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",3.4500 "): Cmp U1, Pin W17 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",3.3500 "): Cmp U1, Pin V17 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",2.7500 "): Cmp U1, Pin U17 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",2.0500 "): Cmp U1, Pin T17 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",4.0500 "): Cmp U1, Pin AB6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",4.1500 "): Cmp U1, Pin AA6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",4.5500 "): Cmp U1, Pin Y16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",2.8500 "): Cmp U1, Pin U16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",2.5500 "): Cmp U1, Pin T16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",3.1500 "): Cmp U1, Pin R16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",3.0500 "): Cmp U1, Pin AB5 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",5.3500 "): Cmp U1, Pin Y15 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",4.6500 "): Cmp U1, Pin W15 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",3.8500 "): Cmp U1, Pin V15 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",3.7500 "): Cmp U1, Pin U15 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",2.6500 "): Cmp U1, Pin T15 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",3.2500 "): Cmp U1, Pin R15 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",2.8500 "): Cmp U1, Pin AB4 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",2.9500 "): Cmp U1, Pin AA4 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",5.2500 "): Cmp U1, Pin Y14 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",5.1500 "): Cmp U1, Pin W14 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",5.7500 "): Cmp U1, Pin T14 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (10.0000 ",3.6500 "): Cmp U1, Pin A3 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",2.2500 "): Cmp U1, Pin AB19 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",4.0500 "): Cmp U1, Pin AB18 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",3.9500 "): Cmp U1, Pin AA18 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",4.2500 "): Cmp U1, Pin AB17 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",5.0500 "): Cmp U1, Pin AB16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",4.9500 "): Cmp U1, Pin AA16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",5.4500 "): Cmp U1, Pin AB15 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",4.4500 "): Cmp U1, Pin AB14 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",4.3500 "): Cmp U1, Pin AA14 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",6.2500 "): Cmp U1, Pin AB13 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",1.4500 "): Cmp U1, Pin AA22 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",6.2500 "): Cmp U1, Pin AB12 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",6.3500 "): Cmp U1, Pin AA12 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",1.6500 "): Cmp U1, Pin AB21 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",6.0500 "): Cmp U1, Pin AB11 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",5.6500 "): Cmp U1, Pin AB10 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",5.7500 "): Cmp U1, Pin AA10 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",5.2500 "): Cmp U1, Pin AB9 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",2.1500 "): Cmp U1, Pin Y19 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",2.9500 "): Cmp U1, Pin V19 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",4.8500 "): Cmp U1, Pin AB8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",4.9500 "): Cmp U1, Pin AA8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (14.5500 ",9.3500 "): Cmp U1, Pin G8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",9.3500 "): Cmp U1, Pin F8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",8.7500 "): Cmp U1, Pin E8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (14.5500 ",9.0500 "): Cmp U1, Pin H11 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (14.5500 ",9.5500 "): Cmp U1, Pin G11 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (14.5500 ",9.1500 "): Cmp U1, Pin H10 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",8.8500 "): Cmp U1, Pin F10 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",8.4500 "): Cmp U1, Pin E10 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (14.5500 ",9.2500 "): Cmp U1, Pin G9 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",9.4500 "): Cmp U1, Pin F9 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",4.4500 "): Cmp U1, Pin Y8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",4.7500 "): Cmp U1, Pin W8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",3.6500 "): Cmp U1, Pin U8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",3.7500 "): Cmp U1, Pin T8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",2.4500 "): Cmp U1, Pin R8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",4.3500 "): Cmp U1, Pin Y7 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",4.6500 "): Cmp U1, Pin V7 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",2.3500 "): Cmp U1, Pin T7 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",2.2500 "): Cmp U1, Pin R7 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",3.2500 "): Cmp U1, Pin Y6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",3.3500 "): Cmp U1, Pin W6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",1.9500 "): Cmp U1, Pin U6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",1.5500 "): Cmp U1, Pin T6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",3.1500 "): Cmp U1, Pin Y5 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",1.8500 "): Cmp U1, Pin V5 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",2.0500 "): Cmp U1, Pin Y4 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",2.1500 "): Cmp U1, Pin W4 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",2.7500 "): Cmp U1, Pin Y3 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",2.6500 "): Cmp U1, Pin AB3 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",6.1500 "): Cmp U1, Pin Y13 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",4.8500 "): Cmp U1, Pin W13 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",4.7500 "): Cmp U1, Pin V13 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",5.8500 "): Cmp U1, Pin R13 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",1.6500 "): Cmp U1, Pin AB2 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",1.7500 "): Cmp U1, Pin AA2 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",6.0500 "): Cmp U1, Pin Y12 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",5.9500 "): Cmp U1, Pin W12 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",5.6500 "): Cmp U1, Pin U12 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",5.5500 "): Cmp U1, Pin T12 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (3.2000 ",1.3500 "): Cmp U1, Pin Y21 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",6.1500 "): Cmp U1, Pin Y11 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",5.4500 "): Cmp U1, Pin W11 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",5.5500 "): Cmp U1, Pin V11 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",5.8500 "): Cmp U1, Pin T11 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",5.9500 "): Cmp U1, Pin R11 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",5.0500 "): Cmp U1, Pin Y10 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",5.1500 "): Cmp U1, Pin W10 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",3.4500 "): Cmp U1, Pin U10 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",3.5500 "): Cmp U1, Pin T10 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",5.3500 "): Cmp U1, Pin Y9 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",4.5500 "): Cmp U1, Pin W9 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",3.8500 "): Cmp U1, Pin V9 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",3.9500 "): Cmp U1, Pin U9 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.2000 ",2.5500 "): Cmp U1, Pin R9 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (14.5500 ",8.8500 "): Cmp U1, Pin H13 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (14.5500 ",9.4500 "): Cmp U1, Pin G13 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",9.0500 "): Cmp U1, Pin F13 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (14.5500 ",8.5500 "): Cmp U1, Pin D13 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (14.5500 ",8.9500 "): Cmp U1, Pin H12 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",8.9500 "): Cmp U1, Pin F12 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",8.5500 "): Cmp U1, Pin E12 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",8.3500 "): Cmp U1, Pin D12 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",8.1500 "): Cmp U1, Pin R17 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (14.5500 ",8.6500 "): Cmp U1, Pin P16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",8.2500 "): Cmp U1, Pin P15 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",9.2500 "): Cmp U1, Pin F15 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (14.5500 ",8.7500 "): Cmp U1, Pin H14 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",9.1500 "): Cmp U1, Pin F14 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.5500 ",8.6500 "): Cmp U1, Pin E14 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (13.4000 ",5.3500 "): Cmp U1, Pin C13 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (13.4000 ",3.6500 "): Cmp U1, Pin D17 (passive) Unconnected
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (11.5500 ",7.4000 "): Cmp #PWR016, Pin 1 (power_in) not driven (Net 149)
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (15.4000 ",7.8500 "): Cmp #PWR02, Pin 1 (power_in) not driven (Net 107)
+
+***** Sheet /FPGA Port 1, Port 3 (DDR, USB)/
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",1.8000 "): Cmp U1, Pin P8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",2.9000 "): Cmp U1, Pin M8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",2.9000 "): Cmp U1, Pin K8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",2.5000 "): Cmp U1, Pin H8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",1.9000 "): Cmp U1, Pin P7 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",2.7000 "): Cmp U1, Pin N7 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",2.8000 "): Cmp U1, Pin M7 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",3.0000 "): Cmp U1, Pin K7 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",2.6000 "): Cmp U1, Pin J7 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",2.2000 "): Cmp U1, Pin G7 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",2.1000 "): Cmp U1, Pin F7 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",8.1000 "): Cmp U1, Pin W20 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",7.6000 "): Cmp U1, Pin V20 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",6.8000 "): Cmp U1, Pin T20 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",8.2000 "): Cmp U1, Pin P20 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",3.1000 "): Cmp U1, Pin F5 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",1.8000 "): Cmp U1, Pin E5 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",2.8000 "): Cmp U1, Pin D5 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",2.4000 "): Cmp U1, Pin U4 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",2.2000 "): Cmp U1, Pin T4 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",3.0000 "): Cmp U1, Pin R4 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",3.1000 "): Cmp U1, Pin P4 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",3.5000 "): Cmp U1, Pin N4 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",3.7000 "): Cmp U1, Pin M4 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",2.7000 "): Cmp U1, Pin E4 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",1.9000 "): Cmp U1, Pin C4 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",1.6000 "): Cmp U1, Pin W3 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",2.0000 "): Cmp U1, Pin P6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",2.6000 "): Cmp U1, Pin N6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",3.2000 "): Cmp U1, Pin M6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",3.3000 "): Cmp U1, Pin L6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",5.1000 "): Cmp U1, Pin J6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",3.2000 "): Cmp U1, Pin G6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",1.7000 "): Cmp U1, Pin E6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",2.1000 "): Cmp U1, Pin P5 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",3.6000 "): Cmp U1, Pin M5 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",7.4000 "): Cmp U1, Pin M18 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",7.8000 "): Cmp U1, Pin K18 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",9.3000 "): Cmp U1, Pin H18 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",8.4000 "): Cmp U1, Pin F18 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",7.3000 "): Cmp U1, Pin P17 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",7.5000 "): Cmp U1, Pin M17 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",7.9000 "): Cmp U1, Pin L17 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",8.1000 "): Cmp U1, Pin H17 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",7.1000 "): Cmp U1, Pin G17 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",7.2000 "): Cmp U1, Pin N16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",8.5000 "): Cmp U1, Pin M16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",7.8000 "): Cmp U1, Pin K16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",7.7000 "): Cmp U1, Pin U19 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",6.9000 "): Cmp U1, Pin T19 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",7.0000 "): Cmp U1, Pin R19 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",8.3000 "): Cmp U1, Pin P19 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",8.6000 "): Cmp U1, Pin N19 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",8.7000 "): Cmp U1, Pin M19 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",7.1000 "): Cmp U1, Pin P18 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",10.3000 "): Cmp U1, Pin G22 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",7.9000 "): Cmp U1, Pin J16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",7.0000 "): Cmp U1, Pin G16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",8.4000 "): Cmp U1, Pin L15 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",8.0000 "): Cmp U1, Pin W22 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",9.2000 "): Cmp U1, Pin T22 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.5000 ",10.2000 "): Cmp U1, Pin L22 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",1.4000 "): Cmp U1, Pin Y2 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",2.4000 "): Cmp U1, Pin B2 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",1.6000 "): Cmp U1, Pin A2 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",1.5000 "): Cmp U1, Pin Y1 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",1.7000 "): Cmp U1, Pin W1 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",2.5000 "): Cmp U1, Pin V3 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",2.3000 "): Cmp U1, Pin T3 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",3.4000 "): Cmp U1, Pin P3 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",2.0000 "): Cmp U1, Pin D3 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",3.4000 "): Cmp U1, Pin C3 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",1.5000 "): Cmp U1, Pin B3 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",4.3000 "): Cmp U1, Pin T1 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (7.1000 ",5.3000 "): Cmp U1, Pin L1 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",4.1000 "): Cmp U1, Pin F1 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (11.3000 ",2.3000 "): Cmp U1, Pin B1 (passive) Unconnected
+
+***** Sheet /DBG_PRG/
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (2.9500 ",2.7000 "): Cmp J6, Pin 16 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (2.1500 ",2.7000 "): Cmp J6, Pin 15 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (2.9500 ",2.6000 "): Cmp J6, Pin 14 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (2.1500 ",2.6000 "): Cmp J6, Pin 13 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (2.9500 ",2.0000 "): Cmp J6, Pin 2 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (2.9500 ",2.1000 "): Cmp J6, Pin 4 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (2.9500 ",2.2000 "): Cmp J6, Pin 6 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (2.9500 ",2.3000 "): Cmp J6, Pin 8 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (2.1500 ",2.4000 "): Cmp J6, Pin 9 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (2.9500 ",2.4000 "): Cmp J6, Pin 10 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (2.1500 ",2.5000 "): Cmp J6, Pin 11 (passive) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (2.9500 ",2.5000 "): Cmp J6, Pin 12 (passive) Unconnected
+
+***** Sheet /PSU/
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (8.2500 ",2.7000 "): Cmp U15, Pin 6 (power_in) not driven (Net 191)
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (6.2000 ",3.1500 "): Cmp U16, Pin 2 (input) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (1.4000 ",5.7000 "): Cmp U17, Pin 2 (input) Unconnected
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (3.7000 ",5.2500 "): Cmp U10, Pin 7 (power_in) not driven (Net 186)
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (7.9000 ",0.7500 "): Cmp U12, Pin 4 (power_in) not driven (Net 178)
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (2.6000 ",0.7500 "): Cmp U11, Pin 4 (power_in) not driven (Net 177)
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (1.1000 ",1.2000 "): Cmp U13, Pin 2 (input) Unconnected
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (6.3000 ",1.2000 "): Cmp U14, Pin 2 (input) Unconnected
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (9.1000 ",0.7500 "): Cmp L9, Pin 2 (passive) not driven (Net 172)
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (3.8000 ",1.1000 "): Cmp U11, Pin 5 (power_in) not driven (Net 171)
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (7.9000 ",1.1000 "): Cmp U12, Pin 1 (power_in) not driven (Net 167)
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (8.2500 ",6.1000 "): Cmp U9, Pin 12 (BiDi) Unconnected
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (5.1500 ",5.9500 "): Cmp U10, Pin 9 (power_in) not driven (Net 164)
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (8.2500 ",3.0500 "): Cmp U15, Pin 4 (power_in) not driven (Net 162)
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (2.8500 ",0.8500 "): Cmp R56, Pin 1 (passive) not driven (Net 161)
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (3.8500 ",0.7500 "): Cmp L8, Pin 2 (passive) not driven (Net 155)
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (8.2500 ",5.2000 "): Cmp U9, Pin 4 (BiDi) Unconnected
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (8.6500 ",2.2000 "): Cmp L10, Pin 1 (passive) not driven (Net 153)
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (9.1000 ",1.1000 "): Cmp U12, Pin 5 (power_in) not driven (Net 148)
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (3.7000 ",5.8000 "): Cmp U10, Pin 10 (power_in) not driven (Net 147)
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (5.4500 ",5.4000 "): Cmp L11, Pin 2 (passive) not driven (Net 146)
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (9.4500 ",2.7000 "): Cmp U15, Pin 5 (power_in) not driven (Net 137)
+
+***** Sheet /Non volatile memories/
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (4.3500 ",1.9500 "): Cmp U8, Pin 8 (power_in) not driven (Net 108)
+ErrType(2): Pin not connected (and no connect symbol found on this pin)
+    @ (5.2500 ",6.4500 "): Cmp J1, Pin CD (BiDi) Unconnected
+
+***** Sheet /USB/
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (3.2000 ",4.5500 "): Cmp #PWR072, Pin 1 (power_in) not driven (Net 64)
+ErrType(3): Pin connected to some others pins but no pin to drive it
+    @ (2.6500 ",5.5500 "): Cmp #PWR074, Pin 1 (power_in) not driven (Net 23)
+
+***** Sheet /Ethernet Phy/
+
+***** Sheet /DDR Banks/
+
+ >> Errors ERC: 241
diff --git a/kicad/xue-rnc/xue-rnc.net b/kicad/xue-rnc/xue-rnc.net
index a02f1e0..1ea2776 100644
--- a/kicad/xue-rnc/xue-rnc.net
+++ b/kicad/xue-rnc/xue-rnc.net
@@ -1,4 +1,4 @@
-# EESchema Netlist Version 1.1 created  Thu 02 Sep 2010 12:44:30 PM COT
+# EESchema Netlist Version 1.1 created  Fri 03 Sep 2010 10:00:42 AM COT
 (
  ( /4C7BC2B2/4C749A0C 0402  C94 470nF {Lib=C}
   (    1 +2.5V )
@@ -22,11 +22,11 @@
  )
  ( /4C7BC2B2/4C7168DD 0402  R30 330 {Lib=R}
   (    1 +3.3V )
-  (    2 N-000363 )
+  (    2 N-000368 )
  )
  ( /4C7BC2B2/4C716877 0402  R29 4.7k {Lib=R}
   (    1 +3.3V )
-  (    2 N-000361 )
+  (    2 N-000366 )
  )
  ( /4C7BC2B2/4C6B29DA 0402  C77 470nF {Lib=C}
   (    1 +2.5V )
@@ -164,26 +164,26 @@
   (   A1 GND )
   (   A2 ? )
   (   A3 ? )
-  (   A4 /Ethernet_Phy/ETH_CLK )
-  (   A5 /Ethernet_Phy/ETH_RXD1 )
-  (   A6 /FPGA,_Port0,_Port2,_PROG_IF/ETH_RXDV )
-  (   A7 /Ethernet_Phy/ETH_RXC )
-  (   A8 /FPGA,_Port0,_Port2,_PROG_IF/ETH_TXD3 )
-  (   A9 /FPGA,_Port0,_Port2,_PROG_IF/ETH_COL )
-  (  A10 /FPGA,_Port0,_Port2,_PROG_IF/ETH_INT )
-  (  A11 /FPGA,_Port0,_Port2,_PROG_IF/NF_D6 )
-  (  A12 /FPGA,_Port0,_Port2,_PROG_IF/NF_D4 )
+  (   A4 /FPGA,_Port0,_Port2,_PROG_IF/ETH_CLK )
+  (   A5 /FPGA,_Port0,_Port2,_PROG_IF/ETH_RXD1 )
+  (   A6 /Ethernet_Phy/ETH_RXDV )
+  (   A7 /FPGA,_Port0,_Port2,_PROG_IF/ETH_RXC )
+  (   A8 /Ethernet_Phy/ETH_TXD3 )
+  (   A9 /Ethernet_Phy/ETH_COL )
+  (  A10 /Ethernet_Phy/ETH_INT )
+  (  A11 /Non_volatile_memories/NF_D6 )
+  (  A12 /Non_volatile_memories/NF_D4 )
   (  A13 /FPGA,_Port0,_Port2,_PROG_IF/NF_D2 )
-  (  A14 /FPGA,_Port0,_Port2,_PROG_IF/NF_ALE )
-  (  A15 /FPGA,_Port0,_Port2,_PROG_IF/NF_RNB )
-  (  A16 /FPGA,_Port0,_Port2,_PROG_IF/SD_DAT2 )
-  (  A17 /Non_volatile_memories/SD_CLK )
+  (  A14 /Non_volatile_memories/NF_ALE )
+  (  A15 /Non_volatile_memories/NF_RNB )
+  (  A16 /Non_volatile_memories/SD_DAT2 )
+  (  A17 /FPGA,_Port0,_Port2,_PROG_IF/SD_CLK )
   (  A18 /Non_volatile_memories/SD_DAT0 )
   (  A19 /DBG_PRG/FPGA_TDO )
   (  A20 /USB/USBD_RCV )
-  (  A21 /USB/USBD_OE_N )
+  (  A21 /FPGA_Port_1,_Port_3_(DDR,_USB)/USBD_OE_N )
   (  A22 GND )
-  (  AA1 N-000361 )
+  (  AA1 N-000366 )
   (  AA2 ? )
   (  AA3 VCCO2 )
   (  AA4 ? )
@@ -240,11 +240,11 @@
   (  B11 +3.3V )
   (  B12 /Non_volatile_memories/NF_D3 )
   (  B13 GND )
-  (  B14 /FPGA,_Port0,_Port2,_PROG_IF/NF_CLE )
+  (  B14 /Non_volatile_memories/NF_CLE )
   (  B15 +3.3V )
   (  B16 /Non_volatile_memories/SD_DAT3 )
   (  B17 GND )
-  (  B18 /FPGA,_Port0,_Port2,_PROG_IF/SD_DAT1 )
+  (  B18 /Non_volatile_memories/SD_DAT1 )
   (  B19 +3.3V )
   (  B20 /USB/USBD_SPD )
   (  B21 /USB/USBD_VP )
@@ -253,21 +253,21 @@
   (   C2 +2.5V )
   (   C3 ? )
   (   C4 ? )
-  (   C5 /FPGA,_Port0,_Port2,_PROG_IF/ETH_RXD3 )
+  (   C5 /Ethernet_Phy/ETH_RXD3 )
   (   C6 /FPGA,_Port0,_Port2,_PROG_IF/ETH_RXD2 )
   (   C7 /FPGA,_Port0,_Port2,_PROG_IF/ETH_RESET_N )
   (   C8 /FPGA,_Port0,_Port2,_PROG_IF/ETH_TXC )
-  (   C9 /Ethernet_Phy/ETH_TXD1 )
-  (  C10 /FPGA,_Port0,_Port2,_PROG_IF/ETH_TXD2 )
-  (  C11 /Non_volatile_memories/NF_D5 )
+  (   C9 /FPGA,_Port0,_Port2,_PROG_IF/ETH_TXD1 )
+  (  C10 /Ethernet_Phy/ETH_TXD2 )
+  (  C11 /FPGA,_Port0,_Port2,_PROG_IF/NF_D5 )
   (  C12 /FPGA,_Port0,_Port2,_PROG_IF/NF_D0 )
   (  C13 ? )
   (  C14 /FPGA,_Port0,_Port2,_PROG_IF/NF_WE_N )
-  (  C15 /Non_volatile_memories/NF_RE_N )
+  (  C15 /FPGA,_Port0,_Port2,_PROG_IF/NF_RE_N )
   (  C16 /Non_volatile_memories/SD_CMD )
   (  C17 ? )
   (  C18 /DBG_PRG/FPGA_TMS )
-  (  C19 /USB/USBA_OE_N )
+  (  C19 /FPGA_Port_1,_Port_3_(DDR,_USB)/USBA_OE_N )
   (  C20 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_A8 )
   (  C21 +2.5V )
   (  C22 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_A9 )
@@ -276,7 +276,7 @@
   (   D3 ? )
   (   D4 GND )
   (   D5 ? )
-  (   D6 /Ethernet_Phy/ETH_MDIO )
+  (   D6 /FPGA,_Port0,_Port2,_PROG_IF/ETH_MDIO )
   (   D7 /Ethernet_Phy/ETH_MDC )
   (   D8 /Ethernet_Phy/ETH_TXER )
   (   D9 /FPGA,_Port0,_Port2,_PROG_IF/ETH_TXEN )
@@ -290,7 +290,7 @@
   (  D17 ? )
   (  D18 GND )
   (  D19 /FPGA_Port_1,_Port_3_(DDR,_USB)/USBA_VP )
-  (  D20 /USB/USBA_VM )
+  (  D20 /FPGA_Port_1,_Port_3_(DDR,_USB)/USBA_VM )
   (  D21 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_CKE )
   (  D22 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_A12 )
   (   E1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_A9 )
@@ -330,7 +330,7 @@
   (  F13 ? )
   (  F14 ? )
   (  F15 ? )
-  (  F16 /FPGA_Port_1,_Port_3_(DDR,_USB)/USBA_SPD )
+  (  F16 /USB/USBA_SPD )
   (  F17 /FPGA_Port_1,_Port_3_(DDR,_USB)/USBA_RCV )
   (  F18 ? )
   (  F19 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_A11 )
@@ -362,7 +362,7 @@
   (   H1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_A1 )
   (   H2 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_A0 )
   (   H3 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_CLK# )
-  (   H4 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_CLK )
+  (   H4 /DDR_Banks/M0_CLK )
   (   H5 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_A2 )
   (   H6 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_A7 )
   (   H7 GND )
@@ -399,7 +399,7 @@
   (  J16 ? )
   (  J17 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_BA0 )
   (  J18 +2.5V )
-  (  J19 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_CLK# )
+  (  J19 /DDR_Banks/M1_CLK# )
   (  J20 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_DQ4 )
   (  J21 GND )
   (  J22 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_DQ5 )
@@ -644,11 +644,11 @@
   (  Y19 ? )
   (  Y20 +3.3V )
   (  Y21 ? )
-  (  Y22 N-000363 )
+  (  Y22 N-000368 )
  )
  ( /4C7BC2A2/4C6B216E 0402  R23 33 {Lib=R}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_UDM )
-  (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_UDM )
+  (    2 /DDR_Banks/M0_UDM )
  )
  ( /4C7BC2A2/4C6B216D 0402  R22 33 {Lib=R}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_UDQS )
@@ -659,7 +659,7 @@
   (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_CKE )
  )
  ( /4C7BC2A2/4C6B1B90 0402  R21 120 {Lib=R}
-  (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_CLK )
+  (    1 /DDR_Banks/M0_CLK )
   (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_CLK# )
  )
  ( /4C7BC2A2/4C6A0D58 R_PACK4-0402  RP14 R_PACK4 {Lib=R_PACK4}
@@ -678,19 +678,19 @@
   (    3 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_BA1 )
   (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_A10 )
   (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_A10 )
-  (    6 /DDR_Banks/M0_BA1 )
-  (    7 /DDR_Banks/M0_BA0 )
-  (    8 /DDR_Banks/M0_RAS# )
+  (    6 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_BA1 )
+  (    7 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_BA0 )
+  (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_RAS# )
  )
  ( /4C7BC2A2/4C6A0D56 R_PACK4-0402  RP16 R_PACK4 {Lib=R_PACK4}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_LDQS )
   (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_LDM )
   (    3 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_WE# )
   (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_CAS# )
-  (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_CAS# )
+  (    5 /DDR_Banks/M0_CAS# )
   (    6 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_WE# )
   (    7 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_LDM )
-  (    8 /DDR_Banks/M0_LDQS )
+  (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_LDQS )
  )
  ( /4C7BC2A2/4C6A0D55 R_PACK4-0402  RP17 R_PACK4 {Lib=R_PACK4}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_A7 )
@@ -718,9 +718,9 @@
   (    3 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_DQ6 )
   (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_DQ7 )
   (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ7 )
-  (    6 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ6 )
+  (    6 /DDR_Banks/M0_DQ6 )
   (    7 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ5 )
-  (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ4 )
+  (    8 /DDR_Banks/M0_DQ4 )
  )
  ( /4C7BC2A2/4C69FCE7 R_PACK4-0402  RP13 R_PACK4 {Lib=R_PACK4}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_DQ0 )
@@ -729,7 +729,7 @@
   (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_DQ3 )
   (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ3 )
   (    6 /DDR_Banks/M0_DQ2 )
-  (    7 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ1 )
+  (    7 /DDR_Banks/M0_DQ1 )
   (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ0 )
  )
  ( /4C7BC2A2/4C69FCE6 R_PACK4-0402  RP11 R_PACK4 {Lib=R_PACK4}
@@ -740,17 +740,17 @@
   (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ11 )
   (    6 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ10 )
   (    7 /DDR_Banks/M0_DQ9 )
-  (    8 /DDR_Banks/M0_DQ8 )
+  (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ8 )
  )
  ( /4C7BC2A2/4C69FC19 R_PACK4-0402  RP10 R_PACK4 {Lib=R_PACK4}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_DQ12 )
   (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_DQ13 )
   (    3 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_DQ14 )
   (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M0_DQ15 )
-  (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ15 )
+  (    5 /DDR_Banks/M0_DQ15 )
   (    6 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ14 )
   (    7 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ13 )
-  (    8 /DDR_Banks/M0_DQ12 )
+  (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ12 )
  )
  ( /4C7BC2A2/4C69E7DD 0402  R19 33 {Lib=R}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_UDQS )
@@ -758,28 +758,28 @@
  )
  ( /4C7BC2A2/4C69E92D 0402  R20 33 {Lib=R}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_CS# )
-  (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_CS# )
+  (    2 /DDR_Banks/M1_CS# )
  )
  ( /4C7BC2A2/4C69E7F8 0402  R17 33 {Lib=R}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_CKE )
-  (    2 /DDR_Banks/M1_CKE )
+  (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_CKE )
  )
  ( /4C7BC2A2/4C69E7C2 0402  R18 33 {Lib=R}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_UDM )
-  (    2 /DDR_Banks/M1_UDM )
+  (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_UDM )
  )
  ( /4C7BC2A2/4C69E3A6 $noname  RP9 R_PACK4 {Lib=R_PACK4}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ11 )
   (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ10 )
-  (    3 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ9 )
-  (    4 /DDR_Banks/M1_DQ8 )
+  (    3 /DDR_Banks/M1_DQ9 )
+  (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ8 )
   (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_DQ8 )
   (    6 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_DQ9 )
   (    7 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_DQ10 )
   (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_DQ11 )
  )
  ( /4C7BC2A2/4C69E299 $noname  RP8 R_PACK4 {Lib=R_PACK4}
-  (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ15 )
+  (    1 /DDR_Banks/M1_DQ15 )
   (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ14 )
   (    3 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ13 )
   (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ12 )
@@ -789,14 +789,14 @@
   (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_DQ15 )
  )
  ( /4C7BC2A2/4C69DF7A 0402  R16 120 {Lib=R}
-  (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_CLK# )
+  (    1 /DDR_Banks/M1_CLK# )
   (    2 /DDR_Banks/M1_CLK )
  )
  ( /4C7BC2A2/4C69DC05 $noname  RP7 R_PACK4 {Lib=R_PACK4}
-  (    1 /DDR_Banks/M1_A12 )
-  (    2 /DDR_Banks/M1_A11 )
+  (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A12 )
+  (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A11 )
   (    3 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A9 )
-  (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A8 )
+  (    4 /DDR_Banks/M1_A8 )
   (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_A8 )
   (    6 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_A9 )
   (    7 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_A11 )
@@ -804,7 +804,7 @@
  )
  ( /4C7BC2A2/4C69DA8A $noname  RP6 R_PACK4 {Lib=R_PACK4}
   (    1 /DDR_Banks/M1_A7 )
-  (    2 /DDR_Banks/M1_A6 )
+  (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A6 )
   (    3 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A5 )
   (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A4 )
   (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_A4 )
@@ -817,9 +817,9 @@
   (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_DQ1 )
   (    3 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_DQ2 )
   (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_DQ3 )
-  (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ3 )
-  (    6 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ2 )
-  (    7 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ1 )
+  (    5 /DDR_Banks/M1_DQ3 )
+  (    6 /DDR_Banks/M1_DQ2 )
+  (    7 /DDR_Banks/M1_DQ1 )
   (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ0 )
  )
  ( /4C7BC2A2/4C69D3A4 $noname  RP3 R_PACK4 {Lib=R_PACK4}
@@ -829,8 +829,8 @@
   (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_CAS# )
   (    5 /DDR_Banks/M1_CAS# )
   (    6 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_WE# )
-  (    7 /DDR_Banks/M1_LDM )
-  (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_LDQS )
+  (    7 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_LDM )
+  (    8 /DDR_Banks/M1_LDQS )
  )
  ( /4C7BC2A2/4C69D3A3 $noname  RP4 R_PACK4 {Lib=R_PACK4}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_DQ4 )
@@ -838,9 +838,9 @@
   (    3 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_DQ6 )
   (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_DQ7 )
   (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ7 )
-  (    6 /DDR_Banks/M1_DQ6 )
+  (    6 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ6 )
   (    7 /DDR_Banks/M1_DQ5 )
-  (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ4 )
+  (    8 /DDR_Banks/M1_DQ4 )
  )
  ( /4C7BC2A2/4C69CEE8 $noname  RP2 R_PACK4 {Lib=R_PACK4}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_RAS# )
@@ -848,9 +848,9 @@
   (    3 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_BA1 )
   (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_A10 )
   (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A10 )
-  (    6 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_BA1 )
-  (    7 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_BA0 )
-  (    8 /DDR_Banks/M1_RAS# )
+  (    6 /DDR_Banks/M1_BA1 )
+  (    7 /DDR_Banks/M1_BA0 )
+  (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_RAS# )
  )
  ( /4C7BC2A2/4C69C6B2 $noname  RP1 R_PACK4 {Lib=R_PACK4}
   (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_A0 )
@@ -858,9 +858,9 @@
   (    3 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_A2 )
   (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/R_M1_A3 )
   (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A3 )
-  (    6 /DDR_Banks/M1_A2 )
-  (    7 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A1 )
-  (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A0 )
+  (    6 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A2 )
+  (    7 /DDR_Banks/M1_A1 )
+  (    8 /DDR_Banks/M1_A0 )
  )
  ( /4C716A4D/4C716CAB $noname  J6 CONN_8X2 {Lib=CONN_8X2}
   (    1 /DBG_PRG/FPGA_TCK )
@@ -895,7 +895,7 @@
   (    2 +3.3V )
  )
  ( /4C69ED5F/4C7FC13A $noname  R56 R {Lib=R}
-  (    1 /PSU/3.3V_EN )
+  (    1 ? )
   (    2 /PSU/VIN_DC-DC-3.3 )
  )
  ( /4C69ED5F/4C7FC041 $noname  R58 1M {Lib=R}
@@ -903,15 +903,15 @@
   (    2 /PSU/VIN_DC-DC-1.2 )
  )
  ( /4C69ED5F/4C7D02E3 MLP6  U17 FAN4010 {Lib=FAN4010}
-  (    1 N-000161 )
+  (    1 N-000158 )
   (    2 ? )
   (    3 /PSU/Iout_2.5 )
   (    5 GND )
-  (    6 /PSU/VIN_DC-DC-2.5 )
+  (    6 ? )
  )
  ( /4C69ED5F/4C7D02E2 1206  R45 R {Lib=R}
   (    1 /PSU/VIN_DC-DC-2.5 )
-  (    2 N-000161 )
+  (    2 N-000158 )
  )
  ( /4C69ED5F/4C7D02E1 0402  R44 R {Lib=R}
   (    1 /PSU/Iout_2.5 )
@@ -922,11 +922,11 @@
   (    2 GND )
  )
  ( /4C69ED5F/4C7C4D9E $noname  R40 47K {Lib=R}
-  (    1 N-000159 )
-  (    2 N-000169 )
+  (    1 N-000157 )
+  (    2 N-000162 )
  )
  ( /4C69ED5F/4C7C4D94 $noname  C100 220pF {Lib=C}
-  (    1 N-000169 )
+  (    1 N-000162 )
   (    2 GND )
  )
  ( /4C69ED5F/4C7C4D8E $noname  C99 22uF {Lib=C}
@@ -967,10 +967,10 @@
  )
  ( /4C69ED5F/4C79C99B 1206  R36 R {Lib=R}
   (    1 /PSU/VIN_DC-DC-5.0 )
-  (    2 N-000165 )
+  (    2 N-000169 )
  )
  ( /4C69ED5F/4C79C99A MLP6  U16 FAN4010 {Lib=FAN4010}
-  (    1 N-000165 )
+  (    1 N-000169 )
   (    2 ? )
   (    3 /PSU/Iout_5.0 )
   (    5 GND )
@@ -1013,7 +1013,7 @@
   (    6 /PSU/VIN_DC-DC-5.0 )
  )
  ( /4C69ED5F/4C770714 MLP6  U14 FAN4010 {Lib=FAN4010}
-  (    1 N-000149 )
+  (    1 N-000150 )
   (    2 ? )
   (    3 /PSU/Iout_1.2 )
   (    5 GND )
@@ -1021,7 +1021,7 @@
  )
  ( /4C69ED5F/4C770713 1206  R34 R {Lib=R}
   (    1 /PSU/VIN_DC-DC-1.2 )
-  (    2 N-000149 )
+  (    2 N-000150 )
  )
  ( /4C69ED5F/4C770712 0402  R33 R {Lib=R}
   (    1 /PSU/Iout_1.2 )
@@ -1033,10 +1033,10 @@
  )
  ( /4C69ED5F/4C77060E 1206  R32 R {Lib=R}
   (    1 /PSU/VIN_DC-DC-3.3 )
-  (    2 N-000148 )
+  (    2 N-000149 )
  )
  ( /4C69ED5F/4C7705B0 MLP6  U13 FAN4010 {Lib=FAN4010}
-  (    1 N-000148 )
+  (    1 N-000149 )
   (    2 ? )
   (    3 /PSU/Iout_3.3 )
   (    5 GND )
@@ -1076,7 +1076,7 @@
  )
  ( /4C69ED5F/4C6D2E6A 1210  L8 2.2uH {Lib=INDUCTOR}
   (    1 +3.3V )
-  (    2 /PSU/SW_3.3 )
+  (    2 ? )
  )
  ( /4C69ED5F/4C6D2DDD 0402  R26 900K {Lib=R}
   (    1 +3.3V )
@@ -1106,11 +1106,11 @@
   (    5 /PSU/VFB1.2 )
  )
  ( /4C69ED5F/4C6D2AA5 SOT23-5  U11 A7108 {Lib=A7108}
-  (    1 /PSU/3.3V_EN )
-  (    2 GND )
-  (    3 /PSU/SW_3.3 )
-  (    4 /PSU/VIN_DC-DC-3.3 )
-  (    5 /PSU/VFB3.3 )
+  (    1 ? )
+  (    2 ? )
+  (    3 ? )
+  (    4 ? )
+  (    5 ? )
  )
  ( /4C69ED5F/4C6C9DB9 DFN10  U10 A7130 {Lib=A7130}
   (    1 /PSU/2.5V_EN )
@@ -1122,7 +1122,7 @@
   (    7 /PSU/VIN_DC-DC-2.5 )
   (    8 /PSU/VIN_DC-DC-2.5 )
   (    9 /PSU/VFB2.5 )
-  (   10 N-000159 )
+  (   10 N-000157 )
   (  PAD GND )
  )
  ( /4C69ED5F/4C69EE11 MLF20m1  U9 ATTINY24A-MLF {Lib=ATTINY24A-MLF}
@@ -1175,14 +1175,14 @@
   (    8 VCCO2 )
  )
  ( /4C4227FE/4B76F5E2 $noname  J1 MICROSD {Lib=MICROSD}
-  (    1 /FPGA,_Port0,_Port2,_PROG_IF/SD_DAT2 )
+  (    1 /Non_volatile_memories/SD_DAT2 )
   (    2 /Non_volatile_memories/SD_DAT3 )
   (    3 /Non_volatile_memories/SD_CMD )
   (    4 +3.3V )
-  (    5 /Non_volatile_memories/SD_CLK )
+  (    5 /FPGA,_Port0,_Port2,_PROG_IF/SD_CLK )
   (    6 GND )
   (    7 /Non_volatile_memories/SD_DAT0 )
-  (    8 /FPGA,_Port0,_Port2,_PROG_IF/SD_DAT1 )
+  (    8 /Non_volatile_memories/SD_DAT1 )
   ( CASE GND )
   (   CD ? )
   (  COM GND )
@@ -1193,9 +1193,9 @@
   (    3 ? )
   (    4 ? )
   (    5 ? )
-  (    6 /FPGA,_Port0,_Port2,_PROG_IF/NF_RNB )
-  (    7 /FPGA,_Port0,_Port2,_PROG_IF/NF_RNB )
-  (    8 /Non_volatile_memories/NF_RE_N )
+  (    6 /Non_volatile_memories/NF_RNB )
+  (    7 /Non_volatile_memories/NF_RNB )
+  (    8 /FPGA,_Port0,_Port2,_PROG_IF/NF_RE_N )
   (    9 /FPGA,_Port0,_Port2,_PROG_IF/NF_CS1_N )
   (   10 ? )
   (   11 ? )
@@ -1203,8 +1203,8 @@
   (   13 GND )
   (   14 ? )
   (   15 ? )
-  (   16 /FPGA,_Port0,_Port2,_PROG_IF/NF_CLE )
-  (   17 /FPGA,_Port0,_Port2,_PROG_IF/NF_ALE )
+  (   16 /Non_volatile_memories/NF_CLE )
+  (   17 /Non_volatile_memories/NF_ALE )
   (   18 /FPGA,_Port0,_Port2,_PROG_IF/NF_WE_N )
   (   19 +3.3V )
   (   20 ? )
@@ -1228,9 +1228,9 @@
   (   38 ? )
   (   39 ? )
   (   40 ? )
-  (   41 /FPGA,_Port0,_Port2,_PROG_IF/NF_D4 )
-  (   42 /Non_volatile_memories/NF_D5 )
-  (   43 /FPGA,_Port0,_Port2,_PROG_IF/NF_D6 )
+  (   41 /Non_volatile_memories/NF_D4 )
+  (   42 /FPGA,_Port0,_Port2,_PROG_IF/NF_D5 )
+  (   43 /Non_volatile_memories/NF_D6 )
   (   44 /FPGA,_Port0,_Port2,_PROG_IF/NF_D7 )
   (   45 ? )
   (   46 ? )
@@ -1295,7 +1295,7 @@
   (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/USBD_VM )
   (    6 GND )
   (    7 GND )
-  (    9 /USB/USBD_OE_N )
+  (    9 /FPGA_Port_1,_Port_3_(DDR,_USB)/USBD_OE_N )
   (   10 N-000134 )
   (   11 N-000133 )
   (   12 +3.3V )
@@ -1303,13 +1303,13 @@
   (   15 +2.5V )
  )
  ( /4C5F1EDC/4C71BA1D MLF16  U6 MIC2550-MLF {Lib=MIC2550-MLF}
-  (    1 /FPGA_Port_1,_Port_3_(DDR,_USB)/USBA_SPD )
+  (    1 /USB/USBA_SPD )
   (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/USBA_RCV )
   (    3 /FPGA_Port_1,_Port_3_(DDR,_USB)/USBA_VP )
-  (    4 /USB/USBA_VM )
+  (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/USBA_VM )
   (    6 GND )
   (    7 GND )
-  (    9 /USB/USBA_OE_N )
+  (    9 /FPGA_Port_1,_Port_3_(DDR,_USB)/USBA_OE_N )
   (   10 N-000130 )
   (   11 N-000142 )
   (   12 +3.3V )
@@ -1447,7 +1447,7 @@
   (    2 GND )
  )
  ( /4C4320F3/4C5D7F39 $noname  R1 4.7K {Lib=R}
-  (    1 /Ethernet_Phy/ETH_MDIO )
+  (    1 /FPGA,_Port0,_Port2,_PROG_IF/ETH_MDIO )
   (    2 +3.3V )
  )
  ( /4C4320F3/4C5D7ECF $noname  R2 6.65K {Lib=R}
@@ -1471,16 +1471,16 @@
   (    2 GND )
  )
  ( /4C4320F3/4C432132 $noname  U4 K8001 {Lib=K8001}
-  (    1 /Ethernet_Phy/ETH_MDIO )
+  (    1 /FPGA,_Port0,_Port2,_PROG_IF/ETH_MDIO )
   (    2 /Ethernet_Phy/ETH_MDC )
-  (    3 /FPGA,_Port0,_Port2,_PROG_IF/ETH_RXD3 )
+  (    3 /Ethernet_Phy/ETH_RXD3 )
   (    4 /FPGA,_Port0,_Port2,_PROG_IF/ETH_RXD2 )
-  (    5 /Ethernet_Phy/ETH_RXD1 )
+  (    5 /FPGA,_Port0,_Port2,_PROG_IF/ETH_RXD1 )
   (    6 /Ethernet_Phy/ETH_RXD0 )
   (    7 +3.3V )
   (    8 GND )
-  (    9 /FPGA,_Port0,_Port2,_PROG_IF/ETH_RXDV )
-  (   10 /Ethernet_Phy/ETH_RXC )
+  (    9 /Ethernet_Phy/ETH_RXDV )
+  (   10 /FPGA,_Port0,_Port2,_PROG_IF/ETH_RXC )
   (   11 /FPGA,_Port0,_Port2,_PROG_IF/ETH_RXER )
   (   12 GND )
   (   13 +1.8V )
@@ -1488,14 +1488,14 @@
   (   15 /FPGA,_Port0,_Port2,_PROG_IF/ETH_TXC )
   (   16 /FPGA,_Port0,_Port2,_PROG_IF/ETH_TXEN )
   (   17 /FPGA,_Port0,_Port2,_PROG_IF/ETH_TXD0 )
-  (   18 /Ethernet_Phy/ETH_TXD1 )
-  (   19 /FPGA,_Port0,_Port2,_PROG_IF/ETH_TXD2 )
-  (   20 /FPGA,_Port0,_Port2,_PROG_IF/ETH_TXD3 )
-  (   21 /FPGA,_Port0,_Port2,_PROG_IF/ETH_COL )
+  (   18 /FPGA,_Port0,_Port2,_PROG_IF/ETH_TXD1 )
+  (   19 /Ethernet_Phy/ETH_TXD2 )
+  (   20 /Ethernet_Phy/ETH_TXD3 )
+  (   21 /Ethernet_Phy/ETH_COL )
   (   22 /FPGA,_Port0,_Port2,_PROG_IF/ETH_CRS )
   (   23 GND )
   (   24 +3.3V )
-  (   25 /FPGA,_Port0,_Port2,_PROG_IF/ETH_INT )
+  (   25 /Ethernet_Phy/ETH_INT )
   (   26 /Ethernet_Phy/ETH_LED0 )
   (   27 /Ethernet_Phy/ETH_LED1 )
   (   28 ? )
@@ -1516,7 +1516,7 @@
   (   43 ? )
   (   44 GND )
   (   45 ? )
-  (   46 /Ethernet_Phy/ETH_CLK )
+  (   46 /FPGA,_Port0,_Port2,_PROG_IF/ETH_CLK )
   (   47 /Ethernet_Phy/ETH_PLL1.8V )
   (   48 /FPGA,_Port0,_Port2,_PROG_IF/ETH_RESET_N )
  )
@@ -1564,59 +1564,59 @@
   (    1 +2.5V )
   (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ0 )
   (    3 +2.5V )
-  (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ1 )
-  (    5 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ2 )
+  (    4 /DDR_Banks/M1_DQ1 )
+  (    5 /DDR_Banks/M1_DQ2 )
   (    6 GND )
-  (    7 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ3 )
-  (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ4 )
+  (    7 /DDR_Banks/M1_DQ3 )
+  (    8 /DDR_Banks/M1_DQ4 )
   (    9 +2.5V )
   (   10 /DDR_Banks/M1_DQ5 )
-  (   11 /DDR_Banks/M1_DQ6 )
+  (   11 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ6 )
   (   12 GND )
   (   13 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ7 )
   (   14 ? )
   (   15 +2.5V )
-  (   16 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_LDQS )
+  (   16 /DDR_Banks/M1_LDQS )
   (   17 ? )
   (   18 +2.5V )
   (   19 ? )
-  (   20 /DDR_Banks/M1_LDM )
+  (   20 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_LDM )
   (   21 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_WE# )
   (   22 /DDR_Banks/M1_CAS# )
-  (   23 /DDR_Banks/M1_RAS# )
-  (   24 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_CS# )
+  (   23 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_RAS# )
+  (   24 /DDR_Banks/M1_CS# )
   (   25 ? )
-  (   26 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_BA0 )
-  (   27 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_BA1 )
+  (   26 /DDR_Banks/M1_BA0 )
+  (   27 /DDR_Banks/M1_BA1 )
   (   28 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A10 )
-  (   29 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A0 )
-  (   30 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A1 )
-  (   31 /DDR_Banks/M1_A2 )
+  (   29 /DDR_Banks/M1_A0 )
+  (   30 /DDR_Banks/M1_A1 )
+  (   31 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A2 )
   (   32 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A3 )
   (   33 +2.5V )
   (   34 GND )
   (   35 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A4 )
   (   36 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A5 )
-  (   37 /DDR_Banks/M1_A6 )
+  (   37 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A6 )
   (   38 /DDR_Banks/M1_A7 )
-  (   39 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A8 )
+  (   39 /DDR_Banks/M1_A8 )
   (   40 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A9 )
-  (   41 /DDR_Banks/M1_A11 )
-  (   42 /DDR_Banks/M1_A12 )
+  (   41 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A11 )
+  (   42 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_A12 )
   (   43 ? )
-  (   44 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_CLK# )
-  (   45 /DDR_Banks/M1_CKE )
+  (   44 /DDR_Banks/M1_CLK# )
+  (   45 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_CKE )
   (   46 /DDR_Banks/M1_CLK )
-  (   47 /DDR_Banks/M1_UDM )
+  (   47 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_UDM )
   (   48 GND )
   (   49 /DDR_Banks/M1_VREF )
   (   50 ? )
   (   51 /DDR_Banks/M1_UDQS )
   (   52 GND )
   (   53 ? )
-  (   54 /DDR_Banks/M1_DQ8 )
+  (   54 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ8 )
   (   55 +2.5V )
-  (   56 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ9 )
+  (   56 /DDR_Banks/M1_DQ9 )
   (   57 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ10 )
   (   58 GND )
   (   59 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ11 )
@@ -1625,7 +1625,7 @@
   (   62 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ13 )
   (   63 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ14 )
   (   64 GND )
-  (   65 /FPGA_Port_1,_Port_3_(DDR,_USB)/M1_DQ15 )
+  (   65 /DDR_Banks/M1_DQ15 )
   (   66 GND )
  )
  ( /4C421DD3/4C65D2A9 0402  C70 10nF {Lib=CAP}
@@ -1728,30 +1728,30 @@
   (    1 +2.5V )
   (    2 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ0 )
   (    3 +2.5V )
-  (    4 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ1 )
+  (    4 /DDR_Banks/M0_DQ1 )
   (    5 /DDR_Banks/M0_DQ2 )
   (    6 GND )
   (    7 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ3 )
-  (    8 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ4 )
+  (    8 /DDR_Banks/M0_DQ4 )
   (    9 +2.5V )
   (   10 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ5 )
-  (   11 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ6 )
+  (   11 /DDR_Banks/M0_DQ6 )
   (   12 GND )
   (   13 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ7 )
   (   14 ? )
   (   15 +2.5V )
-  (   16 /DDR_Banks/M0_LDQS )
+  (   16 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_LDQS )
   (   17 ? )
   (   18 +2.5V )
   (   19 ? )
   (   20 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_LDM )
   (   21 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_WE# )
-  (   22 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_CAS# )
-  (   23 /DDR_Banks/M0_RAS# )
+  (   22 /DDR_Banks/M0_CAS# )
+  (   23 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_RAS# )
   (   24 GND )
   (   25 ? )
-  (   26 /DDR_Banks/M0_BA0 )
-  (   27 /DDR_Banks/M0_BA1 )
+  (   26 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_BA0 )
+  (   27 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_BA1 )
   (   28 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_A10 )
   (   29 /DDR_Banks/M0_A0 )
   (   30 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_A1 )
@@ -1770,26 +1770,26 @@
   (   43 ? )
   (   44 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_CLK# )
   (   45 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_CKE )
-  (   46 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_CLK )
-  (   47 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_UDM )
+  (   46 /DDR_Banks/M0_CLK )
+  (   47 /DDR_Banks/M0_UDM )
   (   48 GND )
   (   49 /DDR_Banks/M0_VREF )
   (   50 ? )
   (   51 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_UDQS )
   (   52 GND )
   (   53 ? )
-  (   54 /DDR_Banks/M0_DQ8 )
+  (   54 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ8 )
   (   55 +2.5V )
   (   56 /DDR_Banks/M0_DQ9 )
   (   57 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ10 )
   (   58 GND )
   (   59 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ11 )
-  (   60 /DDR_Banks/M0_DQ12 )
+  (   60 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ12 )
   (   61 +2.5V )
   (   62 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ13 )
   (   63 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ14 )
   (   64 GND )
-  (   65 /FPGA_Port_1,_Port_3_(DDR,_USB)/M0_DQ15 )
+  (   65 /DDR_Banks/M0_DQ15 )
   (   66 GND )
  )
 )
@@ -2588,108 +2588,107 @@ $endlist
 $endfootprintlist
 }
 { Pin List by Nets
-Net 1 "/USB/USBA_OE_N" "USBA_OE_N"
- U6 9
+Net 1 "/FPGA Port 1, Port 3 (DDR, USB)/USBA_OE_N" "USBA_OE_N"
  U1 C19
+ U6 9
 Net 2 "/FPGA, Port0, Port2, PROG IF/PROG_CSO" "PROG_CSO"
- U8 1
  U1 T5
+ U8 1
 Net 3 "/FPGA, Port0, Port2, PROG IF/PROG_CCLK" "PROG_CCLK"
- U8 6
  U1 AA21
-Net 4 "/FPGA, Port0, Port2, PROG IF/NF_RNB" "NF_RNB"
- U5 7
+ U8 6
+Net 4 "/Non volatile memories/NF_RNB" "NF_RNB"
  U5 6
  U1 A15
+ U5 7
 Net 5 "/FPGA, Port0, Port2, PROG IF/NF_WE_N" "NF_WE_N"
- U5 18
  U1 C14
-Net 6 "/FPGA, Port0, Port2, PROG IF/NF_CLE" "NF_CLE"
- U5 16
+ U5 18
+Net 6 "/Non volatile memories/NF_CLE" "NF_CLE"
  U1 B14
+ U5 16
 Net 7 "/FPGA, Port0, Port2, PROG IF/ETH_TXC" "ETH_TXC"
  U4 15
  U1 C8
-Net 8 "/FPGA, Port0, Port2, PROG IF/ETH_RXDV" "ETH_RXDV"
+Net 8 "/Ethernet Phy/ETH_RXDV" "ETH_RXDV"
  U1 A6
  U4 9
 Net 9 "/Ethernet Phy/ETH_MDC" "ETH_MDC"
- U4 2
  U1 D7
+ U4 2
 Net 10 "/FPGA, Port0, Port2, PROG IF/ETH_CRS" "ETH_CRS"
- U4 22
  U1 B10
+ U4 22
 Net 11 "/FPGA, Port0, Port2, PROG IF/ETH_RESET_N" "ETH_RESET_N"
- U4 48
  U1 C7
+ U4 48
 Net 12 "/USB/USBD_VP" "USBD_VP"
  U1 B21
  U7 3
-Net 13 "/USB/USBD_OE_N" "USBD_OE_N"
+Net 13 "/FPGA Port 1, Port 3 (DDR, USB)/USBD_OE_N" "USBD_OE_N"
  U7 9
  U1 A21
 Net 14 "/FPGA Port 1, Port 3 (DDR, USB)/USBA_VP" "USBA_VP"
- U1 D19
  U6 3
-Net 15 "/Ethernet Phy/ETH_CLK" "ETH_CLK"
- U1 A4
+ U1 D19
+Net 15 "/FPGA, Port0, Port2, PROG IF/ETH_CLK" "ETH_CLK"
  U4 46
+ U1 A4
 Net 16 "/FPGA, Port0, Port2, PROG IF/ETH_TXEN" "ETH_TXEN"
  U1 D9
  U4 16
-Net 17 "/FPGA, Port0, Port2, PROG IF/ETH_INT" "ETH_INT"
+Net 17 "/Ethernet Phy/ETH_INT" "ETH_INT"
  U1 A10
  U4 25
 Net 18 "/DDR Banks/M1_UDQS" "M1_UDQS"
  R19 2
  U3 51
-Net 19 "/FPGA Port 1, Port 3 (DDR, USB)/M1_LDQS" "M1_LDQS"
+Net 19 "/DDR Banks/M1_LDQS" "M1_LDQS"
  U3 16
  RP3 8
-Net 20 "/DDR Banks/M1_UDM" "M1_UDM"
+Net 20 "/FPGA Port 1, Port 3 (DDR, USB)/M1_UDM" "M1_UDM"
  U3 47
  R18 2
 Net 21 "/FPGA Port 1, Port 3 (DDR, USB)/M1_WE#" "M1_WE#"
  RP3 6
  U3 21
-Net 22 "/DDR Banks/M1_RAS#" "M1_RAS#"
- U3 23
+Net 22 "/FPGA Port 1, Port 3 (DDR, USB)/M1_RAS#" "M1_RAS#"
  RP2 8
+ U3 23
 Net 23 "GND" "GND"
- R53 1
- R54 1
- C45 2
- C85 2
- R27 2
- C84 2
- C82 2
- C104 2
- P1 1
- C42 2
- C75 1
- C74 2
- U8 4
- R2 2
- C1 2
- C3 2
- C10 2
- C12 2
- R9 2
- J4 5
- J4 4
- U4 39
- U5 36
- U5 13
- J1 6
- J1 COM
- J1 CASE
- J1 CASE
- J1 CASE
- U2 6
- C22 2
- R14 2
- C73 2
- C72 2
+ R47 1
+ R46 1
+ C13 2
+ C14 2
+ C15 2
+ C6 2
+ C4 2
+ C2 2
+ C8 2
+ C7 2
+ C5 2
+ C9 2
+ U1 P14
+ U1 M14
+ U1 K14
+ L7 2
+ C35 2
+ U1 B17
+ U1 W16
+ U1 AA5
+ U1 N15
+ U1 J15
+ U1 E15
+ U1 V14
+ U2 58
+ U2 48
+ U7 6
+ U7 7
+ U6 6
+ U6 7
+ C36 2
+ C37 2
+ V4 2
  V3 2
  C38 2
  R15 2
@@ -2698,46 +2697,97 @@ Net 23 "GND" "GND"
  V1 2
  V2 2
  L5 2
- U7 6
- U7 7
- U6 6
- U6 7
- R47 1
- R46 1
- C15 2
- C14 2
- C13 2
- L7 2
- C35 2
- C36 2
- C37 2
- V4 2
+ C75 1
+ C74 2
+ C45 2
+ J1 CASE
+ J1 CASE
+ J1 CASE
+ J1 COM
+ R12 2
+ R14 2
+ C22 2
+ U2 6
+ U5 13
+ U5 36
+ J1 6
+ U8 4
+ C73 2
+ C72 2
+ C24 2
+ C26 2
  U4 23
+ C21 2
  U4 12
  U4 8
+ C27 2
  U4 44
  U4 35
  U4 36
  C11 2
- C9 2
- C5 2
- C7 2
- C8 2
- C2 2
- C4 2
- C6 2
- C44 2
- C47 2
- C41 2
+ R2 2
+ U3 58
+ C32 2
+ C30 2
+ C31 2
+ C29 2
+ C28 2
+ C33 2
+ C23 2
+ C25 2
+ U2 12
+ U2 66
+ U4 39
+ U2 64
+ C18 2
+ C20 2
+ C1 2
+ C3 2
+ C10 2
+ C34 2
+ C71 2
+ C12 2
+ C70 2
+ R9 2
+ J4 5
+ U2 34
+ U2 24
+ J4 4
+ U2 52
+ C68 2
+ C80 2
+ R25 2
+ U9 PAD
+ U9 8
+ C42 2
+ U10 PAD
+ U10 5
+ U13 5
  C65 2
  C62 2
+ R41 2
+ C64 2
+ C61 2
+ R44 2
+ U10 2
+ U12 2
+ C58 2
+ C78 2
+ C55 2
+ U1 N11
+ U1 L11
+ U14 5
+ U1 J11
+ C81 2
  C59 2
+ R31 2
  C56 2
  U1 B9
  U1 W7
  U1 U7
  U1 H7
  U1 E7
+ R33 2
  U1 R5
  U1 L5
  U1 G5
@@ -2749,54 +2799,49 @@ Net 23 "GND" "GND"
  U1 J2
  U1 E2
  U1 A1
- C53 2
- C51 2
- C49 2
- C46 2
- C52 2
- C43 2
+ C63 2
+ C60 2
+ C94 2
+ C77 2
+ C76 2
+ C50 2
+ C47 2
+ C44 2
+ C41 2
+ R35 2
+ C39 2
+ C90 2
+ C91 2
+ C93 2
+ C66 2
+ C92 2
+ U17 5
  C40 2
  C48 2
  C57 2
  C54 2
+ C103 2
  C69 2
+ C99 2
+ C100 2
  C67 2
- C64 2
- C61 2
- C58 2
- C55 2
- C68 2
- U1 P12
- U1 M12
- U1 K12
- U1 AB1
- U1 U21
- U1 N21
- U1 J21
- U1 E21
- U1 D18
- U1 N17
- U1 B17
- U1 W16
- U1 AA5
- U1 N15
- U1 J15
- U1 E15
- U1 V14
- U1 P14
- U1 M14
- U1 K14
- U1 N11
- U1 L11
- U1 J11
- U1 E11
- U1 V10
- U1 P10
- U1 M10
- U1 K10
- U1 N9
- U1 L9
- U1 J9
+ U16 5
+ C95 2
+ C53 2
+ C51 2
+ C49 2
+ C46 2
+ C102 2
+ C52 2
+ R42 2
+ U15 2
+ C97 2
+ R38 2
+ C43 2
+ C98 2
+ U1 N13
+ U1 L13
+ U3 6
  U1 AA17
  U1 AA13
  U1 AB22
@@ -2805,167 +2850,121 @@ Net 23 "GND" "GND"
  U1 R18
  U1 L18
  U1 G18
- U1 N13
- U1 L13
+ U1 E21
+ U1 D18
+ U1 N17
+ R53 1
+ R54 1
  U1 J13
  U1 B13
  U1 A22
- R35 2
- C95 2
- C102 2
- R42 2
- U15 2
- C97 2
- R38 2
- C98 2
- U17 5
- C76 2
- C77 2
- C60 2
- C63 2
- C66 2
- U16 5
- C78 2
- C80 2
- R25 2
- U9 PAD
- U9 8
- U10 PAD
- U10 5
- U13 5
- R31 2
- R33 2
- U14 5
- C39 2
- C81 2
- C103 2
- C99 2
- C100 2
- R41 2
- R44 2
- U10 2
- U11 2
- U12 2
- C94 2
- C92 2
- C93 2
- C91 2
- C90 2
- C50 2
- U2 66
- C30 2
- C32 2
- U3 6
- U2 52
- U2 34
- U2 24
- U3 58
- C34 2
- C71 2
- C70 2
- U3 52
- U2 12
- U3 48
- U3 12
- C25 2
- C33 2
- C24 2
- C26 2
- U2 64
- C18 2
- C21 2
- C20 2
- U2 48
- U2 58
- C31 2
+ U1 P12
+ U1 M12
+ U1 K12
+ U1 AB1
+ U1 U21
+ U1 N21
+ U1 J21
+ U1 N9
+ U3 64
+ C85 2
+ R27 2
+ C84 2
+ C82 2
+ U1 E11
+ U1 V10
+ U1 P10
+ U1 M10
+ U1 K10
  U3 66
  U3 34
- C28 2
- C23 2
- C27 2
- R12 2
- U3 64
- C29 2
-Net 24 "/DDR Banks/M0_RAS#" "M0_RAS#"
+ P1 1
+ U1 L9
+ C104 2
+ U1 J9
+ U3 52
+ U3 12
+ U3 48
+Net 24 "/FPGA Port 1, Port 3 (DDR, USB)/M0_RAS#" "M0_RAS#"
  RP15 8
  U2 23
-Net 25 "/DDR Banks/M0_LDQS" "M0_LDQS"
- U2 16
+Net 25 "/FPGA Port 1, Port 3 (DDR, USB)/M0_LDQS" "M0_LDQS"
  RP16 8
+ U2 16
 Net 26 "/FPGA Port 1, Port 3 (DDR, USB)/M0_LDM" "M0_LDM"
- U2 20
  RP16 7
+ U2 20
 Net 27 "/DDR Banks/M1_CLK" "M1_CLK"
- R16 2
  U1 H20
+ R16 2
  U3 46
 Net 28 "/Non volatile memories/SD_CMD" "SD_CMD"
- J1 3
  U1 C16
+ J1 3
 Net 29 "/DBG_PRG/FPGA_TMS" "FPGA_TMS"
- U1 C18
  J6 3
+ U1 C18
 Net 30 "/DBG_PRG/FPGA_TDI" "FPGA_TDI"
- U1 E18
  J6 7
+ U1 E18
 Net 31 "/FPGA Port 1, Port 3 (DDR, USB)/M0_WE#" "M0_WE#"
- U2 21
  RP16 6
-Net 32 "/FPGA Port 1, Port 3 (DDR, USB)/M0_CAS#" "M0_CAS#"
+ U2 21
+Net 32 "/DDR Banks/M0_CAS#" "M0_CAS#"
  RP16 5
  U2 22
 Net 33 "/FPGA Port 1, Port 3 (DDR, USB)/M0_UDQS" "M0_UDQS"
- U2 51
  R22 2
-Net 34 "/FPGA Port 1, Port 3 (DDR, USB)/M0_UDM" "M0_UDM"
+ U2 51
+Net 34 "/DDR Banks/M0_UDM" "M0_UDM"
  U2 47
  R23 2
 Net 35 "/FPGA Port 1, Port 3 (DDR, USB)/M0_CKE" "M0_CKE"
  R24 2
  U2 45
 Net 36 "/FPGA Port 1, Port 3 (DDR, USB)/USBD_VM" "USBD_VM"
- U7 4
  U1 B22
+ U7 4
 Net 37 "/USB/USBD_RCV" "USBD_RCV"
  U7 2
  U1 A20
 Net 38 "/USB/USBD_SPD" "USBD_SPD"
  U1 B20
  U7 1
-Net 39 "/Ethernet Phy/ETH_MDIO" "ETH_MDIO"
- R1 1
+Net 39 "/FPGA, Port0, Port2, PROG IF/ETH_MDIO" "ETH_MDIO"
  U1 D6
+ R1 1
  U4 1
-Net 40 "/FPGA Port 1, Port 3 (DDR, USB)/USBA_SPD" "USBA_SPD"
- U6 1
+Net 40 "/USB/USBA_SPD" "USBA_SPD"
  U1 F16
+ U6 1
 Net 41 "/FPGA Port 1, Port 3 (DDR, USB)/USBA_RCV" "USBA_RCV"
  U6 2
  U1 F17
-Net 42 "/USB/USBA_VM" "USBA_VM"
+Net 42 "/FPGA Port 1, Port 3 (DDR, USB)/USBA_VM" "USBA_VM"
  U1 D20
  U6 4
-Net 43 "/FPGA Port 1, Port 3 (DDR, USB)/M1_CS#" "M1_CS#"
+Net 43 "/DDR Banks/M1_CS#" "M1_CS#"
  U3 24
  R20 2
 Net 44 "/DDR Banks/M1_CAS#" "M1_CAS#"
  U3 22
  RP3 5
-Net 45 "/DDR Banks/M1_CKE" "M1_CKE"
- U3 45
+Net 45 "/FPGA Port 1, Port 3 (DDR, USB)/M1_CKE" "M1_CKE"
  R17 2
-Net 46 "/DDR Banks/M1_LDM" "M1_LDM"
+ U3 45
+Net 46 "/FPGA Port 1, Port 3 (DDR, USB)/M1_LDM" "M1_LDM"
  U3 20
  RP3 7
-Net 47 "/FPGA, Port0, Port2, PROG IF/NF_ALE" "NF_ALE"
+Net 47 "/Non volatile memories/NF_ALE" "NF_ALE"
  U1 A14
  U5 17
-Net 48 "/FPGA, Port0, Port2, PROG IF/ETH_COL" "ETH_COL"
- U4 21
+Net 48 "/Ethernet Phy/ETH_COL" "ETH_COL"
  U1 A9
+ U4 21
 Net 49 "/DBG_PRG/FPGA_TDO" "FPGA_TDO"
- U1 A19
  J6 5
+ U1 A19
 Net 50 "/DBG_PRG/FPGA_TCK" "FPGA_TCK"
  U1 G15
  J6 1
@@ -2973,1004 +2972,996 @@ Net 51 "/FPGA, Port0, Port2, PROG IF/ETH_RXER" "ETH_RXER"
  U1 B8
  U4 11
 Net 52 "/Ethernet Phy/ETH_TXER" "ETH_TXER"
- U1 D8
  U4 14
-Net 53 "/Ethernet Phy/ETH_RXC" "ETH_RXC"
- U4 10
+ U1 D8
+Net 53 "/FPGA, Port0, Port2, PROG IF/ETH_RXC" "ETH_RXC"
  U1 A7
-Net 54 "/Non volatile memories/SD_CLK" "SD_CLK"
- J1 5
+ U4 10
+Net 54 "/FPGA, Port0, Port2, PROG IF/SD_CLK" "SD_CLK"
  U1 A17
-Net 55 "/Non volatile memories/NF_RE_N" "NF_RE_N"
+ J1 5
+Net 55 "/FPGA, Port0, Port2, PROG IF/NF_RE_N" "NF_RE_N"
  U5 8
  U1 C15
 Net 56 "/FPGA, Port0, Port2, PROG IF/NF_CS1_N" "NF_CS1_N"
- U1 D15
  U5 9
+ U1 D15
 Net 57 "/FPGA Port 1, Port 3 (DDR, USB)/M0_CLK#" "M0_CLK#"
- U1 H3
  R21 2
+ U1 H3
  U2 44
-Net 58 "/FPGA Port 1, Port 3 (DDR, USB)/M0_CLK" "M0_CLK"
+Net 58 "/DDR Banks/M0_CLK" "M0_CLK"
+ R21 1
  U2 46
  U1 H4
- R21 1
-Net 59 "/FPGA Port 1, Port 3 (DDR, USB)/M1_CLK#" "M1_CLK#"
+Net 59 "/DDR Banks/M1_CLK#" "M1_CLK#"
  R16 1
- U1 J19
  U3 44
+ U1 J19
 Net 64 "+2.5V" "+2.5V"
- C62 1
- C59 1
- C56 1
- U1 N8
- U1 L8
- U1 V6
- U1 R6
- U1 F11
- C54 1
- C94 1
- C37 1
- C68 1
- C65 1
- U1 H9
+ U3 33
  U3 15
  U1 R10
- U1 K15
- U1 H15
- U1 R12
- U1 G12
- U1 U11
- U1 D16
- U1 M15
- U3 55
- U3 18
- U1 L7
- U1 F4
- U1 F6
- U1 U5
- U1 N5
- U1 J5
- C103 1
- U1 J18
- L11 1
- U3 33
- U1 R2
- U1 L2
- U1 G2
- U1 C2
- U1 W2
- U3 1
- R43 1
- U1 L16
+ C15 1
+ U6 15
+ U7 15
+ U1 F11
+ U1 R6
+ U1 V6
+ U1 L8
+ U1 N8
+ C56 1
+ C59 1
+ C62 1
+ C65 1
  U3 3
  U3 9
- U1 E19
- C102 1
- C101 1
  U3 61
- U1 U18
+ U1 U11
+ U1 G12
+ U1 R12
+ C37 1
+ U3 18
+ U1 H9
+ U3 1
+ U1 D16
+ U1 M15
+ U1 K15
+ U1 H15
+ U3 55
+ C77 1
+ C94 1
+ U1 U5
+ U1 F6
+ U1 F4
+ C57 1
+ U2 15
+ U1 C21
+ U1 L7
+ C60 1
+ U2 55
+ U2 18
+ U2 61
+ U2 33
+ R11 1
+ U1 L16
+ U1 J18
  U1 N18
+ U1 J5
+ U1 N5
+ C19 1
+ C28 1
+ C33 1
+ C22 1
+ C23 1
+ C25 1
+ C24 1
+ C26 1
+ C21 1
+ C63 1
+ C66 1
+ C70 1
+ C71 1
+ C34 1
+ C27 1
+ C32 1
+ C30 1
+ C31 1
+ C29 1
+ U2 1
+ U1 C2
+ U1 G2
+ R43 1
+ U1 L2
+ C102 1
+ C52 1
+ C101 1
+ L11 1
+ C54 1
+ C40 1
+ C103 1
+ C17 1
+ C43 1
+ U1 E19
+ R13 1
+ C68 1
+ U1 U18
  U1 W21
  U1 R21
  U1 L21
  U1 G21
- U1 C21
- C25 1
- C23 1
- C22 1
- C33 1
- C28 1
- C29 1
- C31 1
- U2 55
- C30 1
- C32 1
- C27 1
- C51 1
- C49 1
  C46 1
- U2 15
- U7 15
- C15 1
+ C49 1
+ C51 1
+ U1 R2
  C53 1
- U2 18
- U2 61
- U2 33
- C70 1
- C71 1
- C34 1
- U6 15
- C21 1
- C26 1
- C24 1
- R13 1
- C77 1
- U2 9
- C57 1
+ U1 W2
  U2 3
- C60 1
- U2 1
- C17 1
- R11 1
- C19 1
- C63 1
- C66 1
- C52 1
- C43 1
- C40 1
+ U2 9
 Net 67 "/DDR Banks/M0_VREF" "M0_VREF"
- R12 1
- C18 1
- C17 2
- R11 2
  U2 49
+ C18 1
+ R11 2
+ R12 1
+ C17 2
 Net 68 "/DDR Banks/M1_VREF" "M1_VREF"
- R14 1
- R13 2
- C19 2
  C20 1
+ C19 2
  U3 49
+ R13 2
+ R14 1
 Net 107 "+3.3V" "+3.3V"
- C80 1
- C79 1
- U1 B7
- R26 1
- U9 9
- C11 1
- R1 2
- J1 4
- U4 24
- C10 1
  L2 1
- U1 E9
- U1 G10
+ C5 1
+ C3 1
  R30 1
- C90 1
- C91 1
- L8 1
- C81 1
- U1 B11
  R29 1
+ C50 1
+ C47 1
+ C44 1
+ C41 1
+ U1 Y20
+ C36 1
+ C35 1
+ C79 1
+ C80 1
+ R26 1
+ U6 14
+ L8 1
+ U6 12
+ U9 9
+ C13 1
+ C14 1
+ C81 1
+ U7 14
+ U7 12
  C72 1
  C73 1
- U5 37
+ J1 4
  C74 1
  C75 2
+ U1 B11
+ U1 G10
+ U5 37
+ U1 E9
+ U5 19
+ U5 12
+ U1 B7
+ C1 1
+ R1 2
+ C11 1
+ C10 1
  U1 B15
  U1 G14
  U1 E13
+ U4 24
  U1 B4
- U1 E17
- U1 B19
+ C90 1
+ C91 1
+ R5 1
+ R6 1
+ R4 1
+ R3 1
  J4 3
  J4 6
  J4 9
  J4 11
  U4 7
- C1 1
- U5 19
- U5 12
- R5 1
- R6 1
- R4 1
- R3 1
- R57 2
- U6 14
- U6 12
- C104 1
- C50 1
- C47 1
- U7 14
- C36 1
- C35 1
- C3 1
- C5 1
- U7 12
- U1 Y20
- C14 1
- C13 1
- C41 1
- C44 1
+ U1 B19
+ U1 E17
  R55 1
+ R57 2
+ C104 1
  R48 1
 Net 108 "VCCO2" "VCCO2"
- U1 V8
- U1 V16
- U1 T9
- U1 T13
- U1 AA7
+ C69 1
  U1 AA3
- U1 V12
+ U1 T13
+ C67 1
+ C64 1
+ U1 AA7
+ U1 V16
+ U1 AA19
+ U1 AA15
  U1 AA11
+ U1 W5
+ U1 V8
  C55 1
  U8 8
- C58 1
+ U1 T9
  C61 1
- C64 1
- C69 1
- U1 W5
- U1 AA15
- U1 AA19
- C67 1
+ C58 1
+ U1 V12
 Net 109 "/Ethernet Phy/ETH_A1.8V" "ETH_A1.8V"
- U4 31
- L3 1
  L1 2
+ L3 1
  C6 1
+ U4 31
 Net 110 "/Ethernet Phy/ETH_PLL1.8V" "ETH_PLL1.8V"
- U4 47
- L3 2
  C9 1
+ L3 2
+ U4 47
 Net 111 "+1.8V" "+1.8V"
  L1 1
- U4 13
  C4 1
  C2 1
+ U4 13
 Net 112 "/Ethernet Phy/ETH_LED0" "ETH_LED0"
- U4 26
  R7 2
+ U4 26
 Net 113 "/Ethernet Phy/ETH_LED1" "ETH_LED1"
- R8 2
  U4 27
+ R8 2
 Net 115 "/Ethernet Phy/ETH_A3.3V" "ETH_A3.3V"
- C8 1
- L2 2
- C7 1
  U4 38
+ L2 2
+ C8 1
+ C7 1
 Net 117 "" ""
- R7 1
  J4 10
+ R7 1
 Net 118 "" ""
  J4 12
  R8 1
 Net 119 "/Ethernet Phy/MAG_SHIELD" "MAG_SHIELD"
- J4 13
  J4 14
  R9 1
  C12 1
+ J4 13
 Net 123 "" ""
  R2 1
  U4 37
 Net 126 "/Ethernet Phy/MAG_RX-" "MAG_RX-"
  R6 2
- U4 32
  J4 8
+ U4 32
 Net 127 "/Ethernet Phy/MAG_RX+" "MAG_RX+"
  R5 2
  J4 7
  U4 33
 Net 128 "/Ethernet Phy/MAG_TX+" "MAG_TX+"
- U4 41
- R3 2
  J4 1
+ R3 2
+ U4 41
 Net 129 "/Ethernet Phy/MAG_TX-" "MAG_TX-"
  J4 2
- U4 40
  R4 2
+ U4 40
 Net 130 "" ""
- U6 10
  R52 2
+ U6 10
 Net 131 "/USB/USB_CASE_DEV" "USB_CASE_DEV"
- J7 7
- J7 6
  R15 1
- J7 9
+ J7 7
  J7 8
  C38 1
+ J7 6
+ J7 9
 Net 132 "" ""
- J7 4
  J7 5
+ J7 4
 Net 133 "" ""
  R49 2
  U7 11
 Net 134 "" ""
- R50 2
  U7 10
+ R50 2
 Net 135 "" ""
- L5 1
  J5 4
+ L5 1
 Net 136 "" ""
- J5 1
  L4 2
+ J5 1
 Net 137 "+5V" "+5V"
  C98 1
- R39 1
- C97 1
- C96 1
- U15 5
  F1 2
+ U15 5
+ C96 1
+ C97 1
+ R39 1
 Net 138 "" ""
- F1 1
  L4 1
+ F1 1
 Net 139 "" ""
  J7 1
  L7 1
 Net 140 "/USB/USBD_D+" "USBD_D+"
+ V3 1
  J7 3
- V3 1
- V3 1
- R49 1
  R55 2
  R53 2
+ R49 1
+ V3 1
 Net 141 "/USB/USB_CASE_HOST" "USB_CASE_HOST"
- C16 1
- R10 1
- J5 S1
- J5 S2
  J5 S4
  J5 S3
+ J5 S1
+ J5 S2
+ R10 1
+ C16 1
 Net 142 "" ""
  U6 11
  R51 2
 Net 143 "/USB/USBD_D-" "USBD_D-"
+ V4 1
  R50 1
- J7 2
+ V4 1
  R54 2
- V4 1
- V4 1
+ J7 2
 Net 144 "/USB/USBA_D-" "USBA_D-"
- V2 1
  R46 2
- J5 2
- V2 1
  R52 1
+ V2 1
+ V2 1
+ J5 2
 Net 145 "/USB/USBA_D+" "USBA_D+"
- R47 2
  R51 1
- V1 1
+ R47 2
  R48 2
  J5 3
  V1 1
+ V1 1
 Net 146 "/PSU/SW_2.5" "SW_2.5"
  U10 4
  L11 2
  U10 3
 Net 147 "/PSU/VFB1.2" "VFB1.2"
- R39 2
- U12 5
- U15 3
  R28 2
- R38 1
+ C83 2
  R27 1
  C96 2
- C83 2
-Net 148 "" ""
+ R38 1
+ R39 2
+ U15 3
+ U12 5
+Net 148 "+1.2V" "+1.2V"
+ U1 M13
+ U1 P9
+ U1 J10
+ U1 L10
+ U1 N10
+ U1 P13
+ C48 1
+ U1 K13
+ U1 N12
+ U1 L12
+ U1 J12
+ U1 M9
+ C39 1
+ C42 1
+ U1 K9
+ R28 1
+ L9 1
+ U1 J14
+ C85 1
+ C45 1
+ U1 L14
+ U1 N14
+ U1 R14
+ U1 P11
+ U1 M11
+ U1 K11
+ C83 1
+ C76 1
+ C84 1
+ C93 1
+ C92 1
+ U1 J8
+Net 149 "" ""
  R32 2
  U13 1
-Net 149 "" ""
+Net 150 "" ""
  U14 1
  R34 2
 Net 151 "" ""
  L10 1
  U15 1
-Net 152 "/PSU/5V_EN" "5V_EN"
- U9 15
- R37 1
- U15 4
+Net 152 "/PSU/Iout_5.0" "Iout_5.0"
+ R35 1
+ U16 3
 Net 154 "/PSU/AVR_MISO" "AVR_MISO"
- U9 20
  P1 3
-Net 155 "/PSU/AVR_SCK" "AVR_SCK"
+ U9 20
+Net 155 "/PSU/AVR_MOSI" "AVR_MOSI"
+ U9 16
+ P1 4
+Net 156 "/PSU/AVR_SCK" "AVR_SCK"
  P1 2
  U9 1
-Net 156 "/PSU/AVR_MOSI" "AVR_MOSI"
- P1 4
- U9 16
-Net 157 "/PSU/AVR_RST" "AVR_RST"
- U9 13
- R57 1
-Net 159 "" ""
- R40 1
+Net 157 "" ""
  U10 10
-Net 161 "" ""
+ R40 1
+Net 158 "" ""
  U17 1
  R45 2
-Net 162 "/PSU/Iout_2.5" "Iout_2.5"
+Net 159 "/PSU/Iout_2.5" "Iout_2.5"
  U17 3
  R44 1
+Net 161 "/PSU/5V_EN" "5V_EN"
+ U15 4
+ R37 1
+ U9 15
+Net 162 "" ""
+ C100 1
+ R40 2
 Net 163 "/PSU/VFB2.5" "VFB2.5"
  R43 2
  R42 1
  C101 2
  U10 9
-Net 164 "/PSU/Iout_5.0" "Iout_5.0"
- R35 1
- U16 3
-Net 165 "" ""
- U16 1
- R36 2
 Net 166 "/PSU/1.2V_EN" "1.2V_EN"
- U12 1
  R58 1
  U9 14
+ U12 1
 Net 167 "/PSU/2.5V_EN" "2.5V_EN"
- U9 11
  R41 1
  U10 1
+ U9 11
 Net 168 "/PSU/Iout_1.2" "Iout_1.2"
- U9 2
  U14 3
+ U9 2
  R33 1
 Net 169 "" ""
- C100 1
- R40 2
-Net 170 "+1.2V" "+1.2V"
- U1 M9
- C92 1
- C93 1
- C48 1
- U1 P11
- U1 P13
- U1 J14
- U1 P9
- U1 L14
- U1 J10
- U1 N14
- U1 R14
- U1 L10
- U1 N10
- R28 1
- C42 1
- C45 1
- U1 J8
- U1 K13
- U1 M13
- C39 1
- U1 K9
- C84 1
- C83 1
- C85 1
- C76 1
- U1 M11
- L9 1
- U1 J12
- U1 K11
- U1 L12
- U1 N12
-Net 171 "/PSU/Iout_3.3" "Iout_3.3"
+ U16 1
+ R36 2
+Net 170 "/PSU/Iout_3.3" "Iout_3.3"
  R31 1
  U13 3
  U9 3
-Net 172 "/PSU/VFB3.3" "VFB3.3"
- C79 2
- U11 5
- R25 1
+Net 171 "/PSU/VFB3.3" "VFB3.3"
  R26 2
-Net 173 "/PSU/SW_1.2" "SW_1.2"
+ R25 1
+ C79 2
+Net 172 "/PSU/SW_1.2" "SW_1.2"
  L9 2
  U12 3
-Net 178 "/PSU/VIN_DC-DC-3.3" "VIN_DC-DC-3.3"
- U11 4
- R56 2
- R32 1
+Net 177 "/PSU/VIN_DC-DC-3.3" "VIN_DC-DC-3.3"
  C78 1
+ R56 2
  U13 6
-Net 179 "/PSU/VIN_DC-DC-1.2" "VIN_DC-DC-1.2"
+ R32 1
+Net 178 "/PSU/VIN_DC-DC-1.2" "VIN_DC-DC-1.2"
  R58 2
- C82 1
  U12 4
- R34 1
  U14 6
-Net 185 "/PSU/SW_3.3" "SW_3.3"
- L8 2
- U11 3
-Net 186 "/PSU/3.3V_EN" "3.3V_EN"
- U11 1
- R56 1
-Net 187 "/PSU/VIN_DC-DC-2.5" "VIN_DC-DC-2.5"
- U10 7
+ R34 1
+ C82 1
+Net 192 "/PSU/VIN_DC-DC-2.5" "VIN_DC-DC-2.5"
  U10 6
- U10 8
- C99 1
+ U10 7
  R45 1
+ C99 1
  U17 6
-Net 190 "/PSU/VIN_DC-DC-5.0" "VIN_DC-DC-5.0"
- U15 6
+ U10 8
+Net 193 "/PSU/AVR_RST" "AVR_RST"
+ U9 13
+ R57 1
+Net 195 "/PSU/VIN_DC-DC-5.0" "VIN_DC-DC-5.0"
+ R36 1
+ U16 6
  C95 1
+ U15 6
  R37 2
  L10 2
- U16 6
- R36 1
-Net 208 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A11" "R_M0_A11"
- RP18 2
+Net 210 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A11" "R_M0_A11"
  U1 C1
-Net 209 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_LDQS" "R_M0_LDQS"
+ RP18 2
+Net 211 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_LDQS" "R_M0_LDQS"
  RP16 1
  U1 L3
-Net 210 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_LDM" "R_M0_LDM"
- RP16 2
+Net 212 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_LDM" "R_M0_LDM"
  U1 L4
-Net 211 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_WE#" "R_M0_WE#"
+ RP16 2
+Net 213 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_WE#" "R_M0_WE#"
  U1 F2
  RP16 3
-Net 212 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_CAS#" "R_M0_CAS#"
+Net 214 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_CAS#" "R_M0_CAS#"
  RP16 4
  U1 K4
-Net 213 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_BA1" "R_M0_BA1"
+Net 215 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_BA1" "R_M0_BA1"
  RP15 3
  U1 G1
-Net 214 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_BA0" "R_M0_BA0"
- RP15 2
+Net 216 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_BA0" "R_M0_BA0"
  U1 G3
-Net 215 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_UDQS" "R_M0_UDQS"
- R22 1
+ RP15 2
+Net 217 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_UDQS" "R_M0_UDQS"
  U1 T2
-Net 216 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_RAS#" "R_M0_RAS#"
- U1 K5
+ R22 1
+Net 218 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_RAS#" "R_M0_RAS#"
  RP15 1
-Net 217 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_CKE" "R_M0_CKE"
+ U1 K5
+Net 219 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_CKE" "R_M0_CKE"
  U1 D2
  R24 1
-Net 218 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_UDM" "R_M0_UDM"
- U1 M3
+Net 220 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_UDM" "R_M0_UDM"
  R23 1
-Net 219 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A12" "R_M1_A12"
+ U1 M3
+Net 221 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A12" "R_M1_A12"
  RP7 8
  U1 D22
-Net 220 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A9" "R_M1_A9"
- U1 C22
+Net 222 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A9" "R_M1_A9"
  RP7 6
-Net 221 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A2" "R_M1_A2"
- U1 E22
+ U1 C22
+Net 223 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A2" "R_M1_A2"
  RP1 3
-Net 222 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A1" "R_M1_A1"
- U1 F22
+ U1 E22
+Net 224 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A1" "R_M1_A1"
  RP1 2
-Net 223 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A5" "R_M1_A5"
+ U1 F22
+Net 225 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A5" "R_M1_A5"
  U1 K20
  RP6 6
-Net 224 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A8" "R_M0_A8"
- RP18 4
+Net 226 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A8" "R_M0_A8"
  U1 E3
-Net 225 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A10" "R_M0_A10"
- U1 G4
+ RP18 4
+Net 227 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A10" "R_M0_A10"
  RP15 4
-Net 226 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A12" "R_M0_A12"
- U1 D1
+ U1 G4
+Net 228 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A12" "R_M0_A12"
  RP18 1
-Net 227 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A9" "R_M0_A9"
- U1 E1
+ U1 D1
+Net 229 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A9" "R_M0_A9"
  RP18 3
-Net 228 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A5" "R_M0_A5"
- RP17 3
+ U1 E1
+Net 230 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A5" "R_M0_A5"
  U1 K3
-Net 229 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A7" "R_M0_A7"
- RP17 1
+ RP17 3
+Net 231 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A7" "R_M0_A7"
  U1 H6
-Net 230 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A6" "R_M0_A6"
+ RP17 1
+Net 232 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A6" "R_M0_A6"
  RP17 2
  U1 J4
-Net 231 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A4" "R_M0_A4"
- RP17 4
+Net 233 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A4" "R_M0_A4"
  U1 F3
-Net 232 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ4" "R_M0_DQ4"
+ RP17 4
+Net 234 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ4" "R_M0_DQ4"
  U1 J3
  RP12 1
-Net 233 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ5" "R_M0_DQ5"
+Net 235 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ5" "R_M0_DQ5"
  U1 J1
  RP12 2
-Net 234 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ6" "R_M0_DQ6"
- U1 K2
+Net 236 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ6" "R_M0_DQ6"
  RP12 3
-Net 235 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ7" "R_M0_DQ7"
+ U1 K2
+Net 237 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ7" "R_M0_DQ7"
  U1 K1
  RP12 4
-Net 236 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ0" "R_M0_DQ0"
- U1 N3
+Net 238 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ0" "R_M0_DQ0"
  RP13 1
-Net 237 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ1" "R_M0_DQ1"
+ U1 N3
+Net 239 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ1" "R_M0_DQ1"
  RP13 2
  U1 N1
-Net 238 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ2" "R_M0_DQ2"
- U1 M2
+Net 240 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ2" "R_M0_DQ2"
  RP13 3
-Net 239 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ3" "R_M0_DQ3"
+ U1 M2
+Net 241 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ3" "R_M0_DQ3"
  RP13 4
  U1 M1
-Net 240 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ12" "R_M0_DQ12"
- U1 U3
+Net 242 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ12" "R_M0_DQ12"
  RP10 1
-Net 241 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ13" "R_M0_DQ13"
- U1 U1
+ U1 U3
+Net 243 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ13" "R_M0_DQ13"
  RP10 2
-Net 242 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ14" "R_M0_DQ14"
+ U1 U1
+Net 244 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ14" "R_M0_DQ14"
  U1 V2
  RP10 3
-Net 243 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ15" "R_M0_DQ15"
+Net 245 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ15" "R_M0_DQ15"
  RP10 4
  U1 V1
-Net 244 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_CS#" "R_M1_CS#"
+Net 246 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_CS#" "R_M1_CS#"
  U1 H16
  R20 1
-Net 245 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ8" "R_M0_DQ8"
- U1 P2
+Net 247 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ8" "R_M0_DQ8"
  RP11 1
-Net 246 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ9" "R_M0_DQ9"
- RP11 2
+ U1 P2
+Net 248 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ9" "R_M0_DQ9"
  U1 P1
-Net 247 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ10" "R_M0_DQ10"
- RP11 3
+ RP11 2
+Net 249 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ10" "R_M0_DQ10"
  U1 R3
-Net 248 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ11" "R_M0_DQ11"
- U1 R1
+ RP11 3
+Net 250 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_DQ11" "R_M0_DQ11"
  RP11 4
-Net 249 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A2" "R_M0_A2"
+ U1 R1
+Net 251 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A2" "R_M0_A2"
  U1 H5
  RP14 3
-Net 250 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A3" "R_M0_A3"
+Net 252 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A3" "R_M0_A3"
  U1 K6
  RP14 4
-Net 251 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A1" "R_M0_A1"
- U1 H1
+Net 253 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A1" "R_M0_A1"
  RP14 2
-Net 252 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A0" "R_M0_A0"
- RP14 1
+ U1 H1
+Net 254 "/FPGA Port 1, Port 3 (DDR, USB)/R_M0_A0" "R_M0_A0"
  U1 H2
-Net 253 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ13" "R_M1_DQ13"
+ RP14 1
+Net 255 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ13" "R_M1_DQ13"
  U1 U22
  RP8 6
-Net 254 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ15" "R_M1_DQ15"
+Net 256 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ15" "R_M1_DQ15"
  U1 V22
  RP8 8
-Net 255 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ14" "R_M1_DQ14"
+Net 257 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ14" "R_M1_DQ14"
  U1 V21
  RP8 7
-Net 256 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ12" "R_M1_DQ12"
+Net 258 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ12" "R_M1_DQ12"
  U1 U20
  RP8 5
-Net 257 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A6" "R_M1_A6"
+Net 259 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A6" "R_M1_A6"
  U1 K19
  RP6 7
-Net 258 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A3" "R_M1_A3"
- RP1 4
+Net 260 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A3" "R_M1_A3"
  U1 G20
-Net 259 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A0" "R_M1_A0"
- U1 F21
+ RP1 4
+Net 261 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A0" "R_M1_A0"
  RP1 1
-Net 260 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A7" "R_M1_A7"
- RP6 8
+ U1 F21
+Net 262 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A7" "R_M1_A7"
  U1 E20
-Net 261 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ8" "R_M1_DQ8"
+ RP6 8
+Net 263 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ8" "R_M1_DQ8"
  U1 P21
  RP9 5
-Net 262 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ10" "R_M1_DQ10"
+Net 264 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ10" "R_M1_DQ10"
  RP9 7
  U1 R20
-Net 263 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ11" "R_M1_DQ11"
+Net 265 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ11" "R_M1_DQ11"
  RP9 8
  U1 R22
-Net 264 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ9" "R_M1_DQ9"
+Net 266 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ9" "R_M1_DQ9"
  RP9 6
  U1 P22
-Net 265 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_BA0" "R_M1_BA0"
+Net 267 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_BA0" "R_M1_BA0"
  RP2 2
  U1 J17
-Net 266 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_CAS#" "R_M1_CAS#"
+Net 268 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_CAS#" "R_M1_CAS#"
  RP3 4
  U1 H22
-Net 267 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A10" "R_M1_A10"
+Net 269 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A10" "R_M1_A10"
  U1 G19
  RP2 4
-Net 268 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A8" "R_M1_A8"
+Net 270 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A8" "R_M1_A8"
  U1 C20
  RP7 5
-Net 269 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A11" "R_M1_A11"
+Net 271 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A11" "R_M1_A11"
  U1 F19
  RP7 7
-Net 270 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ7" "R_M1_DQ7"
+Net 272 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ7" "R_M1_DQ7"
  RP4 4
  U1 K22
-Net 271 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ5" "R_M1_DQ5"
+Net 273 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ5" "R_M1_DQ5"
  RP4 2
  U1 J22
-Net 272 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ4" "R_M1_DQ4"
- RP4 1
+Net 274 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ4" "R_M1_DQ4"
  U1 J20
-Net 273 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ6" "R_M1_DQ6"
+ RP4 1
+Net 275 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ6" "R_M1_DQ6"
  RP4 3
  U1 K21
-Net 274 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ2" "R_M1_DQ2"
- U1 M21
+Net 276 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ2" "R_M1_DQ2"
  RP5 3
-Net 275 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ0" "R_M1_DQ0"
+ U1 M21
+Net 277 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ0" "R_M1_DQ0"
  RP5 1
  U1 N20
-Net 276 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ1" "R_M1_DQ1"
+Net 278 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ1" "R_M1_DQ1"
  U1 N22
  RP5 2
-Net 277 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ3" "R_M1_DQ3"
+Net 279 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_DQ3" "R_M1_DQ3"
  U1 M22
  RP5 4
-Net 278 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A4" "R_M1_A4"
+Net 280 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_A4" "R_M1_A4"
  U1 F20
  RP6 5
-Net 279 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_LDM" "R_M1_LDM"
- RP3 2
- U1 L19
-Net 280 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_RAS#" "R_M1_RAS#"
+Net 281 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_RAS#" "R_M1_RAS#"
  U1 H21
  RP2 1
-Net 281 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_BA1" "R_M1_BA1"
+Net 282 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_BA1" "R_M1_BA1"
  U1 K17
  RP2 3
-Net 282 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_CKE" "R_M1_CKE"
+Net 283 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_CKE" "R_M1_CKE"
  R17 1
  U1 D21
-Net 283 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_WE#" "R_M1_WE#"
- RP3 3
+Net 284 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_WE#" "R_M1_WE#"
  U1 H19
-Net 358 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_LDQS" "R_M1_LDQS"
+ RP3 3
+Net 362 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_LDQS" "R_M1_LDQS"
  U1 L20
  RP3 1
-Net 359 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_UDQS" "R_M1_UDQS"
+Net 363 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_LDM" "R_M1_LDM"
+ RP3 2
+ U1 L19
+Net 364 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_UDQS" "R_M1_UDQS"
  U1 T21
  R19 1
-Net 360 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_UDM" "R_M1_UDM"
+Net 365 "/FPGA Port 1, Port 3 (DDR, USB)/R_M1_UDM" "R_M1_UDM"
  U1 M20
  R18 1
-Net 361 "" ""
- U1 AA1
+Net 366 "" ""
  R29 2
-Net 363 "" ""
+ U1 AA1
+Net 368 "" ""
  R30 2
  U1 Y22
-Net 487 "/FPGA, Port0, Port2, PROG IF/PROG_MISO3" "PROG_MISO3"
- U8 7
+Net 492 "/FPGA, Port0, Port2, PROG IF/PROG_MISO3" "PROG_MISO3"
  U1 U13
-Net 488 "/FPGA, Port0, Port2, PROG IF/PROG_MISO2" "PROG_MISO2"
+ U8 7
+Net 493 "/FPGA, Port0, Port2, PROG IF/PROG_MISO2" "PROG_MISO2"
  U1 U14
  U8 3
-Net 489 "/FPGA, Port0, Port2, PROG IF/PROG_MISO1" "PROG_MISO1"
- U8 2
+Net 494 "/FPGA, Port0, Port2, PROG IF/PROG_MISO1" "PROG_MISO1"
  U1 AA20
-Net 490 "/FPGA, Port0, Port2, PROG IF/PROG_MISO0" "PROG_MISO0"
+ U8 2
+Net 495 "/FPGA, Port0, Port2, PROG IF/PROG_MISO0" "PROG_MISO0"
  U8 5
  U1 AB20
-Net 491 "/FPGA, Port0, Port2, PROG IF/NF_D7" "NF_D7"
+Net 496 "/FPGA, Port0, Port2, PROG IF/NF_D7" "NF_D7"
  U1 D11
  U5 44
-Net 492 "/FPGA, Port0, Port2, PROG IF/NF_D6" "NF_D6"
- U1 A11
+Net 497 "/Non volatile memories/NF_D6" "NF_D6"
  U5 43
-Net 493 "/Non volatile memories/NF_D5" "NF_D5"
- U5 42
+ U1 A11
+Net 498 "/FPGA, Port0, Port2, PROG IF/NF_D5" "NF_D5"
  U1 C11
-Net 494 "/FPGA, Port0, Port2, PROG IF/NF_D4" "NF_D4"
- U1 A12
+ U5 42
+Net 499 "/Non volatile memories/NF_D4" "NF_D4"
  U5 41
-Net 495 "/Non volatile memories/NF_D3" "NF_D3"
- U1 B12
+ U1 A12
+Net 500 "/Non volatile memories/NF_D3" "NF_D3"
  U5 32
-Net 496 "/FPGA, Port0, Port2, PROG IF/NF_D2" "NF_D2"
+ U1 B12
+Net 501 "/FPGA, Port0, Port2, PROG IF/NF_D2" "NF_D2"
  U1 A13
  U5 31
-Net 497 "/FPGA, Port0, Port2, PROG IF/NF_D1" "NF_D1"
- U5 30
+Net 502 "/FPGA, Port0, Port2, PROG IF/NF_D1" "NF_D1"
  U1 D14
-Net 498 "/FPGA, Port0, Port2, PROG IF/NF_D0" "NF_D0"
+ U5 30
+Net 503 "/FPGA, Port0, Port2, PROG IF/NF_D0" "NF_D0"
  U1 C12
  U5 29
-Net 499 "/Ethernet Phy/ETH_TXD1" "ETH_TXD1"
+Net 504 "/FPGA, Port0, Port2, PROG IF/ETH_TXD1" "ETH_TXD1"
  U1 C9
  U4 18
-Net 500 "/FPGA, Port0, Port2, PROG IF/ETH_TXD0" "ETH_TXD0"
+Net 505 "/FPGA, Port0, Port2, PROG IF/ETH_TXD0" "ETH_TXD0"
  U4 17
  U1 D10
-Net 501 "/FPGA, Port0, Port2, PROG IF/ETH_RXD3" "ETH_RXD3"
+Net 506 "/Ethernet Phy/ETH_RXD3" "ETH_RXD3"
  U1 C5
  U4 3
-Net 502 "/FPGA, Port0, Port2, PROG IF/ETH_RXD2" "ETH_RXD2"
- U4 4
+Net 507 "/FPGA, Port0, Port2, PROG IF/ETH_RXD2" "ETH_RXD2"
  U1 C6
-Net 503 "/Ethernet Phy/ETH_RXD1" "ETH_RXD1"
+ U4 4
+Net 508 "/FPGA, Port0, Port2, PROG IF/ETH_RXD1" "ETH_RXD1"
  U1 A5
  U4 5
-Net 504 "/Ethernet Phy/ETH_RXD0" "ETH_RXD0"
+Net 509 "/Ethernet Phy/ETH_RXD0" "ETH_RXD0"
  U4 6
  U1 B6
-Net 505 "/Non volatile memories/SD_DAT3" "SD_DAT3"
- J1 2
+Net 510 "/Non volatile memories/SD_DAT3" "SD_DAT3"
  U1 B16
-Net 506 "/FPGA, Port0, Port2, PROG IF/SD_DAT2" "SD_DAT2"
+ J1 2
+Net 511 "/Non volatile memories/SD_DAT2" "SD_DAT2"
  J1 1
  U1 A16
-Net 507 "/FPGA, Port0, Port2, PROG IF/SD_DAT1" "SD_DAT1"
- J1 8
+Net 512 "/Non volatile memories/SD_DAT1" "SD_DAT1"
  U1 B18
-Net 508 "/Non volatile memories/SD_DAT0" "SD_DAT0"
+ J1 8
+Net 513 "/Non volatile memories/SD_DAT0" "SD_DAT0"
  U1 A18
  J1 7
-Net 509 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A5" "M1_A5"
- RP6 3
+Net 514 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A5" "M1_A5"
  U3 36
-Net 510 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A4" "M1_A4"
+ RP6 3
+Net 515 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A4" "M1_A4"
  U3 35
  RP6 4
-Net 511 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A3" "M1_A3"
+Net 516 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A3" "M1_A3"
  U3 32
  RP1 5
-Net 512 "/DDR Banks/M1_A2" "M1_A2"
+Net 517 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A2" "M1_A2"
  RP1 6
  U3 31
-Net 513 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A1" "M1_A1"
- RP1 7
+Net 518 "/DDR Banks/M1_A1" "M1_A1"
  U3 30
-Net 514 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A0" "M1_A0"
+ RP1 7
+Net 519 "/DDR Banks/M1_A0" "M1_A0"
  RP1 8
  U3 29
-Net 515 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A12" "M0_A12"
- RP18 8
+Net 520 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A12" "M0_A12"
  U2 42
-Net 516 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A11" "M0_A11"
- RP18 7
+ RP18 8
+Net 521 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A11" "M0_A11"
  U2 41
-Net 517 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A10" "M0_A10"
+ RP18 7
+Net 522 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A10" "M0_A10"
  RP15 5
  U2 28
-Net 518 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A9" "M0_A9"
- U2 40
+Net 523 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A9" "M0_A9"
  RP18 6
-Net 519 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A8" "M0_A8"
+ U2 40
+Net 524 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A8" "M0_A8"
  RP18 5
  U2 39
-Net 520 "/DDR Banks/M0_A7" "M0_A7"
- U2 38
+Net 525 "/DDR Banks/M0_A7" "M0_A7"
  RP17 8
-Net 521 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A6" "M0_A6"
- U2 37
+ U2 38
+Net 526 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A6" "M0_A6"
  RP17 7
-Net 522 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A5" "M0_A5"
+ U2 37
+Net 527 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A5" "M0_A5"
  U2 36
  RP17 6
-Net 523 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A4" "M0_A4"
- RP17 5
+Net 528 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A4" "M0_A4"
  U2 35
-Net 524 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ15" "M1_DQ15"
+ RP17 5
+Net 529 "/DDR Banks/M1_DQ15" "M1_DQ15"
  U3 65
  RP8 1
-Net 525 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ14" "M1_DQ14"
- RP8 2
+Net 530 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ14" "M1_DQ14"
  U3 63
-Net 526 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ13" "M1_DQ13"
+ RP8 2
+Net 531 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ13" "M1_DQ13"
  U3 62
  RP8 3
-Net 527 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ12" "M1_DQ12"
+Net 532 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ12" "M1_DQ12"
  U3 60
  RP8 4
-Net 528 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ11" "M1_DQ11"
+Net 533 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ11" "M1_DQ11"
  RP9 1
  U3 59
-Net 529 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ10" "M1_DQ10"
- RP9 2
+Net 534 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ10" "M1_DQ10"
  U3 57
-Net 530 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ9" "M1_DQ9"
- RP9 3
+ RP9 2
+Net 535 "/DDR Banks/M1_DQ9" "M1_DQ9"
  U3 56
-Net 531 "/DDR Banks/M1_DQ8" "M1_DQ8"
- U3 54
+ RP9 3
+Net 536 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ8" "M1_DQ8"
  RP9 4
-Net 532 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ7" "M1_DQ7"
+ U3 54
+Net 537 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ7" "M1_DQ7"
  U3 13
  RP4 5
-Net 533 "/DDR Banks/M1_DQ6" "M1_DQ6"
- U3 11
+Net 538 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ6" "M1_DQ6"
  RP4 6
-Net 534 "/DDR Banks/M1_DQ5" "M1_DQ5"
+ U3 11
+Net 539 "/DDR Banks/M1_DQ5" "M1_DQ5"
  U3 10
  RP4 7
-Net 535 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ4" "M1_DQ4"
- RP4 8
+Net 540 "/DDR Banks/M1_DQ4" "M1_DQ4"
  U3 8
-Net 536 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ3" "M1_DQ3"
- U3 7
+ RP4 8
+Net 541 "/DDR Banks/M1_DQ3" "M1_DQ3"
  RP5 5
-Net 537 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ2" "M1_DQ2"
- RP5 6
+ U3 7
+Net 542 "/DDR Banks/M1_DQ2" "M1_DQ2"
  U3 5
-Net 538 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ1" "M1_DQ1"
+ RP5 6
+Net 543 "/DDR Banks/M1_DQ1" "M1_DQ1"
  U3 4
  RP5 7
-Net 539 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ0" "M1_DQ0"
+Net 544 "/FPGA Port 1, Port 3 (DDR, USB)/M1_DQ0" "M1_DQ0"
  U3 2
  RP5 8
-Net 540 "/DDR Banks/M1_A12" "M1_A12"
- U3 42
+Net 545 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A12" "M1_A12"
  RP7 1
-Net 541 "/DDR Banks/M1_A11" "M1_A11"
+ U3 42
+Net 546 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A11" "M1_A11"
  U3 41
  RP7 2
-Net 542 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A10" "M1_A10"
+Net 547 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A10" "M1_A10"
  U3 28
  RP2 5
-Net 543 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A9" "M1_A9"
+Net 548 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A9" "M1_A9"
  RP7 3
  U3 40
-Net 544 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A8" "M1_A8"
+Net 549 "/DDR Banks/M1_A8" "M1_A8"
  RP7 4
  U3 39
-Net 545 "/DDR Banks/M1_A7" "M1_A7"
- U3 38
+Net 550 "/DDR Banks/M1_A7" "M1_A7"
  RP6 1
-Net 546 "/DDR Banks/M1_A6" "M1_A6"
+ U3 38
+Net 551 "/FPGA Port 1, Port 3 (DDR, USB)/M1_A6" "M1_A6"
  RP6 2
  U3 37
-Net 547 "/FPGA Port 1, Port 3 (DDR, USB)/M1_BA1" "M1_BA1"
+Net 552 "/DDR Banks/M1_BA1" "M1_BA1"
  RP2 6
  U3 27
-Net 548 "/FPGA Port 1, Port 3 (DDR, USB)/M1_BA0" "M1_BA0"
+Net 553 "/DDR Banks/M1_BA0" "M1_BA0"
  RP2 7
  U3 26
-Net 549 "/DDR Banks/M0_BA1" "M0_BA1"
+Net 554 "/FPGA Port 1, Port 3 (DDR, USB)/M0_BA1" "M0_BA1"
  U2 27
  RP15 6
-Net 550 "/DDR Banks/M0_BA0" "M0_BA0"
+Net 555 "/FPGA Port 1, Port 3 (DDR, USB)/M0_BA0" "M0_BA0"
  RP15 7
  U2 26
-Net 551 "/FPGA, Port0, Port2, PROG IF/ETH_TXD3" "ETH_TXD3"
- U1 A8
+Net 556 "/Ethernet Phy/ETH_TXD3" "ETH_TXD3"
  U4 20
-Net 552 "/FPGA, Port0, Port2, PROG IF/ETH_TXD2" "ETH_TXD2"
- U4 19
+ U1 A8
+Net 557 "/Ethernet Phy/ETH_TXD2" "ETH_TXD2"
  U1 C10
-Net 553 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A3" "M0_A3"
+ U4 19
+Net 558 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A3" "M0_A3"
  RP14 5
  U2 32
-Net 554 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A2" "M0_A2"
- U2 31
+Net 559 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A2" "M0_A2"
  RP14 6
-Net 555 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A1" "M0_A1"
- RP14 7
+ U2 31
+Net 560 "/FPGA Port 1, Port 3 (DDR, USB)/M0_A1" "M0_A1"
  U2 30
-Net 556 "/DDR Banks/M0_A0" "M0_A0"
- RP14 8
+ RP14 7
+Net 561 "/DDR Banks/M0_A0" "M0_A0"
  U2 29
-Net 557 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ15" "M0_DQ15"
- RP10 5
+ RP14 8
+Net 562 "/DDR Banks/M0_DQ15" "M0_DQ15"
  U2 65
-Net 558 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ14" "M0_DQ14"
- U2 63
+ RP10 5
+Net 563 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ14" "M0_DQ14"
  RP10 6
-Net 559 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ13" "M0_DQ13"
+ U2 63
+Net 564 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ13" "M0_DQ13"
  RP10 7
  U2 62
-Net 560 "/DDR Banks/M0_DQ12" "M0_DQ12"
+Net 565 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ12" "M0_DQ12"
  RP10 8
  U2 60
-Net 561 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ11" "M0_DQ11"
+Net 566 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ11" "M0_DQ11"
  RP11 5
  U2 59
-Net 562 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ10" "M0_DQ10"
+Net 567 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ10" "M0_DQ10"
  RP11 6
  U2 57
-Net 563 "/DDR Banks/M0_DQ9" "M0_DQ9"
- U2 56
+Net 568 "/DDR Banks/M0_DQ9" "M0_DQ9"
  RP11 7
-Net 564 "/DDR Banks/M0_DQ8" "M0_DQ8"
+ U2 56
+Net 569 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ8" "M0_DQ8"
  U2 54
  RP11 8
-Net 565 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ7" "M0_DQ7"
- U2 13
+Net 570 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ7" "M0_DQ7"
  RP12 5
-Net 566 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ6" "M0_DQ6"
+ U2 13
+Net 571 "/DDR Banks/M0_DQ6" "M0_DQ6"
  U2 11
  RP12 6
-Net 567 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ5" "M0_DQ5"
+Net 572 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ5" "M0_DQ5"
  U2 10
  RP12 7
-Net 568 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ4" "M0_DQ4"
- U2 8
+Net 573 "/DDR Banks/M0_DQ4" "M0_DQ4"
  RP12 8
-Net 569 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ3" "M0_DQ3"
- U2 7
+ U2 8
+Net 574 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ3" "M0_DQ3"
  RP13 5
-Net 570 "/DDR Banks/M0_DQ2" "M0_DQ2"
+ U2 7
+Net 575 "/DDR Banks/M0_DQ2" "M0_DQ2"
  U2 5
  RP13 6
-Net 571 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ1" "M0_DQ1"
- U2 4
+Net 576 "/DDR Banks/M0_DQ1" "M0_DQ1"
  RP13 7
-Net 572 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ0" "M0_DQ0"
+ U2 4
+Net 577 "/FPGA Port 1, Port 3 (DDR, USB)/M0_DQ0" "M0_DQ0"
  U2 2
  RP13 8
 }
diff --git a/kicad/xue-rnc/xue-rnc.pro b/kicad/xue-rnc/xue-rnc.pro
index 9da5631..efb21ee 100644
--- a/kicad/xue-rnc/xue-rnc.pro
+++ b/kicad/xue-rnc/xue-rnc.pro
@@ -1,6 +1,6 @@
-update=Thu 02 Sep 2010 12:54:19 PM COT
+update=Thu 02 Sep 2010 06:11:47 PM COT
 version=1
-last_client=kicad
+last_client=pcbnew
 [common]
 NetDir=
 [eeschema]
@@ -88,6 +88,8 @@ version=1
 NetIExt=net
 [cvpcb/libraries]
 EquName1=devcms
+[general]
+version=1
 [pcbnew]
 version=1
 PadDrlX=360
@@ -140,5 +142,3 @@ LibName29=../modules/DFN10
 LibName30=../modules/MLF16
 LibName31=../modules/USBD
 LibName32=../modules/MLP6
-[general]
-version=1
diff --git a/kicad/xue-rnc/xue-rnc.sch b/kicad/xue-rnc/xue-rnc.sch
index 95174e4..e9c5aa0 100644
--- a/kicad/xue-rnc/xue-rnc.sch
+++ b/kicad/xue-rnc/xue-rnc.sch
@@ -1,4 +1,4 @@
-EESchema Schematic File Version 2  date Thu 02 Sep 2010 12:54:07 PM COT
+EESchema Schematic File Version 2  date Fri 03 Sep 2010 10:34:12 AM COT
 LIBS:power
 LIBS:r_pack2
 LIBS:v0402mhs03
@@ -51,7 +51,7 @@ EELAYER END
 $Descr A3 16535 11700
 Sheet 1 9
 Title ""
-Date "2 sep 2010"
+Date "3 sep 2010"
 Rev ""
 Comp ""
 Comment1 ""