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fix

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This commit is contained in:
afc 2010-10-12 11:12:31 -05:00
parent e40b97f200
commit 4abc118a97
16 changed files with 11466 additions and 10430 deletions
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2
kicad/xue-rnc/DBG_PRG.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 10 Oct 2010 09:18:11 AM COT EESchema Schematic File Version 2 date Sun 10 Oct 2010 06:23:22 PM COT
LIBS:power LIBS:power
LIBS:r_pack2 LIBS:r_pack2
LIBS:v0402mhs03 LIBS:v0402mhs03

66
kicad/xue-rnc/DRAM.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 10 Oct 2010 09:18:11 AM COT EESchema Schematic File Version 2 date Sun 10 Oct 2010 06:23:22 PM COT
LIBS:power LIBS:power
LIBS:r_pack2 LIBS:r_pack2
LIBS:v0402mhs03 LIBS:v0402mhs03
@ -539,19 +539,19 @@ Entry Wire Line
Entry Wire Line Entry Wire Line
10100 4400 10200 4500 10100 4400 10200 4500
$Comp $Comp
L GND #PWR0102 L GND #PWR16
U 1 1 4C699C4D U 1 1 4C699C4D
P 9950 2100 P 9950 2100
F 0 "#PWR0102" H 9950 2100 30 0001 C CNN F 0 "#PWR16" H 9950 2100 30 0001 C CNN
F 1 "GND" H 9950 2030 30 0001 C CNN F 1 "GND" H 9950 2030 30 0001 C CNN
1 9950 2100 1 9950 2100
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR0103 L GND #PWR8
U 1 1 4C699C48 U 1 1 4C699C48
P 4550 2150 P 4550 2150
F 0 "#PWR0103" H 4550 2150 30 0001 C CNN F 0 "#PWR8" H 4550 2150 30 0001 C CNN
F 1 "GND" H 4550 2080 30 0001 C CNN F 1 "GND" H 4550 2080 30 0001 C CNN
1 4550 2150 1 4550 2150
1 0 0 -1 1 0 0 -1
@ -609,37 +609,37 @@ F 2 "1206" H 6900 6000 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR0104 L GND #PWR10
U 1 1 4C61D1D3 U 1 1 4C61D1D3
P 6900 6200 P 6900 6200
F 0 "#PWR0104" H 6900 6200 30 0001 C CNN F 0 "#PWR10" H 6900 6200 30 0001 C CNN
F 1 "GND" H 6900 6130 30 0001 C CNN F 1 "GND" H 6900 6130 30 0001 C CNN
1 6900 6200 1 6900 6200
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR0105 L +2.5V #PWR9
U 1 1 4C61D1D2 U 1 1 4C61D1D2
P 6900 5800 P 6900 5800
F 0 "#PWR0105" H 6900 5750 20 0001 C CNN F 0 "#PWR9" H 6900 5750 20 0001 C CNN
F 1 "+2.5V" H 6900 5900 30 0000 C CNN F 1 "+2.5V" H 6900 5900 30 0000 C CNN
1 6900 5800 1 6900 5800
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR0106 L +2.5V #PWR1
U 1 1 4C61D192 U 1 1 4C61D192
P 1700 5800 P 1700 5800
F 0 "#PWR0106" H 1700 5750 20 0001 C CNN F 0 "#PWR1" H 1700 5750 20 0001 C CNN
F 1 "+2.5V" H 1700 5900 30 0000 C CNN F 1 "+2.5V" H 1700 5900 30 0000 C CNN
1 1700 5800 1 1700 5800
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR0107 L GND #PWR2
U 1 1 4C61D17F U 1 1 4C61D17F
P 1700 6200 P 1700 6200
F 0 "#PWR0107" H 1700 6200 30 0001 C CNN F 0 "#PWR2" H 1700 6200 30 0001 C CNN
F 1 "GND" H 1700 6130 30 0001 C CNN F 1 "GND" H 1700 6130 30 0001 C CNN
1 1700 6200 1 1700 6200
1 0 0 -1 1 0 0 -1
@ -655,19 +655,19 @@ F 2 "1206" H 1700 6000 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR0108 L +2.5V #PWR4
U 1 1 4C61CFCF U 1 1 4C61CFCF
P 3050 1750 P 3050 1750
F 0 "#PWR0108" H 3050 1700 20 0001 C CNN F 0 "#PWR4" H 3050 1700 20 0001 C CNN
F 1 "+2.5V" H 3050 1850 30 0000 C CNN F 1 "+2.5V" H 3050 1850 30 0000 C CNN
1 3050 1750 1 3050 1750
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR0109 L +2.5V #PWR14
U 1 1 4C61CFC6 U 1 1 4C61CFC6
P 8400 1700 P 8400 1700
F 0 "#PWR0109" H 8400 1650 20 0001 C CNN F 0 "#PWR14" H 8400 1650 20 0001 C CNN
F 1 "+2.5V" H 8400 1800 30 0000 C CNN F 1 "+2.5V" H 8400 1800 30 0000 C CNN
1 8400 1700 1 8400 1700
1 0 0 -1 1 0 0 -1
@ -733,37 +733,37 @@ F 2 "0603" H 7450 6000 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR0110 L +2.5V #PWR11
U 1 1 4C61CF9F U 1 1 4C61CF9F
P 8300 5750 P 8300 5750
F 0 "#PWR0110" H 8300 5700 20 0001 C CNN F 0 "#PWR11" H 8300 5700 20 0001 C CNN
F 1 "+2.5V" H 8300 5850 30 0000 C CNN F 1 "+2.5V" H 8300 5850 30 0000 C CNN
1 8300 5750 1 8300 5750
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR0111 L GND #PWR12
U 1 1 4C61CF9E U 1 1 4C61CF9E
P 8300 6350 P 8300 6350
F 0 "#PWR0111" H 8300 6350 30 0001 C CNN F 0 "#PWR12" H 8300 6350 30 0001 C CNN
F 1 "GND" H 8300 6280 30 0001 C CNN F 1 "GND" H 8300 6280 30 0001 C CNN
1 8300 6350 1 8300 6350
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR0112 L GND #PWR6
U 1 1 4C61CF90 U 1 1 4C61CF90
P 3050 6350 P 3050 6350
F 0 "#PWR0112" H 3050 6350 30 0001 C CNN F 0 "#PWR6" H 3050 6350 30 0001 C CNN
F 1 "GND" H 3050 6280 30 0001 C CNN F 1 "GND" H 3050 6280 30 0001 C CNN
1 3050 6350 1 3050 6350
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR0113 L +2.5V #PWR5
U 1 1 4C61CF89 U 1 1 4C61CF89
P 3050 5750 P 3050 5750
F 0 "#PWR0113" H 3050 5700 20 0001 C CNN F 0 "#PWR5" H 3050 5700 20 0001 C CNN
F 1 "+2.5V" H 3050 5850 30 0000 C CNN F 1 "+2.5V" H 3050 5850 30 0000 C CNN
1 3050 5750 1 3050 5750
1 0 0 -1 1 0 0 -1
@ -849,19 +849,19 @@ F 2 "0402" H 9950 1750 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR0114 L +2.5V #PWR15
U 1 1 4C61CE2F U 1 1 4C61CE2F
P 9950 800 P 9950 800
F 0 "#PWR0114" H 9950 750 20 0001 C CNN F 0 "#PWR15" H 9950 750 20 0001 C CNN
F 1 "+2.5V" H 9950 900 30 0000 C CNN F 1 "+2.5V" H 9950 900 30 0000 C CNN
1 9950 800 1 9950 800
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR0115 L +2.5V #PWR7
U 1 1 4C61CDF1 U 1 1 4C61CDF1
P 4550 850 P 4550 850
F 0 "#PWR0115" H 4550 800 20 0001 C CNN F 0 "#PWR7" H 4550 800 20 0001 C CNN
F 1 "+2.5V" H 4550 950 30 0000 C CNN F 1 "+2.5V" H 4550 950 30 0000 C CNN
1 4550 850 1 4550 850
1 0 0 -1 1 0 0 -1
@ -944,10 +944,10 @@ $EndComp
Text HLabel 5000 5350 2 60 BiDi ~ 0 Text HLabel 5000 5350 2 60 BiDi ~ 0
M0_DQ[0..15] M0_DQ[0..15]
$Comp $Comp
L GND #PWR0116 L GND #PWR3
U 1 1 4C58A712 U 1 1 4C58A712
P 3000 5200 P 3000 5200
F 0 "#PWR0116" H 3000 5200 30 0001 C CNN F 0 "#PWR3" H 3000 5200 30 0001 C CNN
F 1 "GND" H 3000 5130 30 0001 C CNN F 1 "GND" H 3000 5130 30 0001 C CNN
1 3000 5200 1 3000 5200
1 0 0 -1 1 0 0 -1
@ -1223,10 +1223,10 @@ Entry Wire Line
Entry Wire Line Entry Wire Line
10100 3600 10200 3700 10100 3600 10200 3700
$Comp $Comp
L GND #PWR0117 L GND #PWR13
U 1 1 4C437C3F U 1 1 4C437C3F
P 8350 5150 P 8350 5150
F 0 "#PWR0117" H 8350 5150 30 0001 C CNN F 0 "#PWR13" H 8350 5150 30 0001 C CNN
F 1 "GND" H 8350 5080 30 0001 C CNN F 1 "GND" H 8350 5080 30 0001 C CNN
1 8350 5150 1 8350 5150
1 0 0 -1 1 0 0 -1

3159
kicad/xue-rnc/FPGA_0_2_PROG.sch
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34
kicad/xue-rnc/FPGA_1_3.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 10 Oct 2010 09:18:11 AM COT EESchema Schematic File Version 2 date Sun 10 Oct 2010 06:23:22 PM COT
LIBS:power LIBS:power
LIBS:r_pack2 LIBS:r_pack2
LIBS:v0402mhs03 LIBS:v0402mhs03
@ -155,7 +155,7 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
12400 3500 11900 3500 12400 3500 11900 3500
Wire Bus Line Wire Bus Line
2250 1500 2200 1500 2200 1500 2250 1500
Wire Wire Line Wire Wire Line
7700 4100 7100 4100 7700 4100 7100 4100
Wire Wire Line Wire Wire Line
@ -225,7 +225,7 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
5200 1200 5650 1200 5200 1200 5650 1200
Wire Bus Line Wire Bus Line
1400 6350 1350 6350 1350 6350 1400 6350
Wire Wire Line Wire Wire Line
6650 8000 7100 8000 6650 8000 7100 8000
Wire Wire Line Wire Wire Line
@ -435,9 +435,9 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
2750 2850 2350 2850 2750 2850 2350 2850
Wire Bus Line Wire Bus Line
2250 2750 2250 1500 2250 1500 2250 2750
Wire Bus Line Wire Bus Line
1400 7600 1400 6350 1400 6350 1400 7600
Connection ~ 9600 6350 Connection ~ 9600 6350
Wire Wire Line Wire Wire Line
9600 6400 9600 6350 9600 6400 9600 6350
@ -449,7 +449,7 @@ Connection ~ 9000 6350
Wire Wire Line Wire Wire Line
9000 6350 9000 6400 9000 6350 9000 6400
Wire Wire Line Wire Wire Line
9700 6350 9700 6400 9700 6400 9700 6350
Wire Wire Line Wire Wire Line
9700 6350 8800 6350 9700 6350 8800 6350
Wire Wire Line Wire Wire Line
@ -467,7 +467,7 @@ Connection ~ 9900 950
Wire Wire Line Wire Wire Line
9900 950 9900 1000 9900 950 9900 1000
Wire Wire Line Wire Wire Line
10300 950 10300 1000 10300 1000 10300 950
Wire Wire Line Wire Wire Line
10300 950 9300 950 10300 950 9300 950
Wire Wire Line Wire Wire Line
@ -528,9 +528,9 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
1900 7100 1500 7100 1900 7100 1500 7100
Wire Bus Line Wire Bus Line
2450 3500 2350 3500 2350 3500 2450 3500
Wire Bus Line Wire Bus Line
2450 5100 2450 3500 2450 3500 2450 5100
Wire Wire Line Wire Wire Line
1900 8550 1450 8550 1900 8550 1450 8550
Wire Wire Line Wire Wire Line
@ -798,9 +798,9 @@ Wire Wire Line
Wire Wire Line Wire Wire Line
11900 5000 12300 5000 11900 5000 12300 5000
Wire Wire Line Wire Wire Line
12300 5050 12300 5000 12300 5000 12300 5050
Wire Wire Line Wire Wire Line
12850 5050 12300 5050 12300 5050 12850 5050
Wire Wire Line Wire Wire Line
12800 4950 12800 5050 12800 4950 12800 5050
Connection ~ 12800 5050 Connection ~ 12800 5050
@ -1498,19 +1498,19 @@ F 1 "R_PACK4" H 3400 6600 40 0000 C CNN
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR030 L +2.5V #PWR87
U 1 1 4C61E523 U 1 1 4C61E523
P 9200 6250 P 9200 6250
F 0 "#PWR030" H 9200 6200 20 0001 C CNN F 0 "#PWR87" H 9200 6200 20 0001 C CNN
F 1 "+2.5V" H 9200 6350 30 0000 C CNN F 1 "+2.5V" H 9200 6350 30 0000 C CNN
1 9200 6250 1 9200 6250
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR031 L +2.5V #PWR88
U 1 1 4C61E51F U 1 1 4C61E51F
P 9800 850 P 9800 850
F 0 "#PWR031" H 9800 800 20 0001 C CNN F 0 "#PWR88" H 9800 800 20 0001 C CNN
F 1 "+2.5V" H 9800 950 30 0000 C CNN F 1 "+2.5V" H 9800 950 30 0000 C CNN
1 9800 850 1 9800 850
1 0 0 -1 1 0 0 -1
@ -1528,10 +1528,10 @@ M1_BA[0..1]
Text HLabel 4700 9500 0 60 Output ~ 0 Text HLabel 4700 9500 0 60 Output ~ 0
M1_CS# M1_CS#
$Comp $Comp
L GND #PWR032 L GND #PWR86
U 1 1 4C60C21D U 1 1 4C60C21D
P 5700 5350 P 5700 5350
F 0 "#PWR032" H 5700 5350 30 0001 C CNN F 0 "#PWR86" H 5700 5350 30 0001 C CNN
F 1 "GND" H 5700 5280 30 0001 C CNN F 1 "GND" H 5700 5280 30 0001 C CNN
1 5700 5350 1 5700 5350
-1 0 0 -1 -1 0 0 -1

34
kicad/xue-rnc/NV_MEMORIES.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 10 Oct 2010 09:18:11 AM COT EESchema Schematic File Version 2 date Sun 10 Oct 2010 06:23:22 PM COT
LIBS:power LIBS:power
LIBS:r_pack2 LIBS:r_pack2
LIBS:v0402mhs03 LIBS:v0402mhs03
@ -248,19 +248,19 @@ F 1 "100nF" H 4000 5400 50 0000 L CNN
-1 0 0 1 -1 0 0 1
$EndComp $EndComp
$Comp $Comp
L GND #PWR071 L GND #PWR24
U 1 1 4C65D6AB U 1 1 4C65D6AB
P 9350 3150 P 9350 3150
F 0 "#PWR071" H 9350 3150 30 0001 C CNN F 0 "#PWR24" H 9350 3150 30 0001 C CNN
F 1 "GND" H 9350 3080 30 0001 C CNN F 1 "GND" H 9350 3080 30 0001 C CNN
1 9350 3150 1 9350 3150
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR072 L +3.3V #PWR23
U 1 1 4C65D69B U 1 1 4C65D69B
P 9350 2650 P 9350 2650
F 0 "#PWR072" H 9350 2610 30 0001 C CNN F 0 "#PWR23" H 9350 2610 30 0001 C CNN
F 1 "+3.3V" H 9350 2760 30 0000 C CNN F 1 "+3.3V" H 9350 2760 30 0000 C CNN
1 9350 2650 1 9350 2650
1 0 0 -1 1 0 0 -1
@ -324,10 +324,10 @@ SPI_DQ[0..3]
Text HLabel 2450 1700 0 60 Input ~ 0 Text HLabel 2450 1700 0 60 Input ~ 0
SPI_FLASH_CS# SPI_FLASH_CS#
$Comp $Comp
L GND #PWR073 L GND #PWR17
U 1 1 4C65ABE9 U 1 1 4C65ABE9
P 2650 2450 P 2650 2450
F 0 "#PWR073" H 2650 2450 30 0001 C CNN F 0 "#PWR17" H 2650 2450 30 0001 C CNN
F 1 "GND" H 2650 2380 30 0001 C CNN F 1 "GND" H 2650 2380 30 0001 C CNN
1 2650 2450 1 2650 2450
1 0 0 -1 1 0 0 -1
@ -360,19 +360,19 @@ Entry Wire Line
Entry Wire Line Entry Wire Line
8150 3150 8250 3050 8150 3150 8250 3050
$Comp $Comp
L +3.3V #PWR074 L +3.3V #PWR21
U 1 1 4C646C14 U 1 1 4C646C14
P 7950 2900 P 7950 2900
F 0 "#PWR074" H 7950 2860 30 0001 C CNN F 0 "#PWR21" H 7950 2860 30 0001 C CNN
F 1 "+3.3V" H 7950 3010 30 0000 C CNN F 1 "+3.3V" H 7950 3010 30 0000 C CNN
1 7950 2900 1 7950 2900
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR075 L GND #PWR22
U 1 1 4C646BEA U 1 1 4C646BEA
P 7950 3000 P 7950 3000
F 0 "#PWR075" H 7950 3000 30 0001 C CNN F 0 "#PWR22" H 7950 3000 30 0001 C CNN
F 1 "GND" H 7950 2930 30 0001 C CNN F 1 "GND" H 7950 2930 30 0001 C CNN
1 7950 3000 1 7950 3000
1 0 0 -1 1 0 0 -1
@ -422,10 +422,10 @@ SD_DAT3
Text Label 4200 6100 0 30 ~ 0 Text Label 4200 6100 0 30 ~ 0
SD_CMD SD_CMD
$Comp $Comp
L GND #PWR076 L GND #PWR18
U 1 1 4C61D875 U 1 1 4C61D875
P 3950 5800 P 3950 5800
F 0 "#PWR076" H 3950 5800 30 0001 C CNN F 0 "#PWR18" H 3950 5800 30 0001 C CNN
F 1 "GND" H 3950 5730 30 0001 C CNN F 1 "GND" H 3950 5730 30 0001 C CNN
1 3950 5800 1 3950 5800
1 0 0 -1 1 0 0 -1
@ -437,19 +437,19 @@ SD_DAT0
Text Label 4200 5850 0 30 ~ 0 Text Label 4200 5850 0 30 ~ 0
SD_DAT1 SD_DAT1
$Comp $Comp
L GND #PWR077 L GND #PWR20
U 1 1 4C438ADC U 1 1 4C438ADC
P 5800 6200 P 5800 6200
F 0 "#PWR077" H 5800 6200 30 0001 C CNN F 0 "#PWR20" H 5800 6200 30 0001 C CNN
F 1 "GND" H 5800 6130 30 0001 C CNN F 1 "GND" H 5800 6130 30 0001 C CNN
1 5800 6200 1 5800 6200
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR078 L GND #PWR19
U 1 1 4C438AD5 U 1 1 4C438AD5
P 5350 6550 P 5350 6550
F 0 "#PWR078" H 5350 6550 30 0001 C CNN F 0 "#PWR19" H 5350 6550 30 0001 C CNN
F 1 "GND" H 5350 6480 30 0001 C CNN F 1 "GND" H 5350 6480 30 0001 C CNN
1 5350 6550 1 5350 6550
1 0 0 -1 1 0 0 -1

154
kicad/xue-rnc/PSU.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 10 Oct 2010 09:18:11 AM COT EESchema Schematic File Version 2 date Sun 10 Oct 2010 06:23:22 PM COT
LIBS:power LIBS:power
LIBS:r_pack2 LIBS:r_pack2
LIBS:v0402mhs03 LIBS:v0402mhs03
@ -496,37 +496,37 @@ lout_2.5
Text Label 600 1100 0 40 ~ 0 Text Label 600 1100 0 40 ~ 0
lout_3.3 lout_3.3
$Comp $Comp
L +BATT #PWR033 L +BATT #PWR50
U 1 1 4C859B7F U 1 1 4C859B7F
P 1000 5200 P 1000 5200
F 0 "#PWR033" H 1000 5150 20 0001 C CNN F 0 "#PWR50" H 1000 5150 20 0001 C CNN
F 1 "+BATT" H 1000 5300 30 0000 C CNN F 1 "+BATT" H 1000 5300 30 0000 C CNN
1 1000 5200 1 1000 5200
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +BATT #PWR034 L +BATT #PWR49
U 1 1 4C859B76 U 1 1 4C859B76
P 1000 700 P 1000 700
F 0 "#PWR034" H 1000 650 20 0001 C CNN F 0 "#PWR49" H 1000 650 20 0001 C CNN
F 1 "+BATT" H 1000 800 30 0000 C CNN F 1 "+BATT" H 1000 800 30 0000 C CNN
1 1000 700 1 1000 700
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +BATT #PWR035 L +BATT #PWR64
U 1 1 4C859B70 U 1 1 4C859B70
P 6200 700 P 6200 700
F 0 "#PWR035" H 6200 650 20 0001 C CNN F 0 "#PWR64" H 6200 650 20 0001 C CNN
F 1 "+BATT" H 6200 800 30 0000 C CNN F 1 "+BATT" H 6200 800 30 0000 C CNN
1 6200 700 1 6200 700
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +BATT #PWR036 L +BATT #PWR63
U 1 1 4C859B63 U 1 1 4C859B63
P 6100 2650 P 6100 2650
F 0 "#PWR036" H 6100 2600 20 0001 C CNN F 0 "#PWR63" H 6100 2600 20 0001 C CNN
F 1 "+BATT" H 6100 2750 30 0000 C CNN F 1 "+BATT" H 6100 2750 30 0000 C CNN
1 6100 2650 1 6100 2650
1 0 0 -1 1 0 0 -1
@ -545,10 +545,10 @@ F 1 "AVR/PROG" V 8100 6800 50 0000 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR037 L +3.3V #PWR71
U 1 1 4C7FD26A U 1 1 4C7FD26A
P 7350 4600 P 7350 4600
F 0 "#PWR037" H 7350 4560 30 0001 C CNN F 0 "#PWR71" H 7350 4560 30 0001 C CNN
F 1 "+3.3V" H 7350 4710 30 0000 C CNN F 1 "+3.3V" H 7350 4710 30 0000 C CNN
1 7350 4600 1 7350 4600
1 0 0 -1 1 0 0 -1
@ -564,19 +564,19 @@ F 2 "0402" H 7350 4800 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR038 L GND #PWR72
U 1 1 4C7FD265 U 1 1 4C7FD265
P 7350 5050 P 7350 5050
F 0 "#PWR038" H 7350 5050 30 0001 C CNN F 0 "#PWR72" H 7350 5050 30 0001 C CNN
F 1 "GND" H 7350 4980 30 0001 C CNN F 1 "GND" H 7350 4980 30 0001 C CNN
1 7350 5050 1 7350 5050
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR039 L +3.3V #PWR68
U 1 1 4C7FD257 U 1 1 4C7FD257
P 7150 6200 P 7150 6200
F 0 "#PWR039" H 7150 6160 30 0001 C CNN F 0 "#PWR68" H 7150 6160 30 0001 C CNN
F 1 "+3.3V" H 7150 6310 30 0000 C CNN F 1 "+3.3V" H 7150 6310 30 0000 C CNN
1 7150 6200 1 7150 6200
1 0 0 -1 1 0 0 -1
@ -591,10 +591,10 @@ F 1 "15K" V 7400 6300 50 0000 C CNN
0 1 1 0 0 1 1 0
$EndComp $EndComp
$Comp $Comp
L GND #PWR040 L GND #PWR69
U 1 1 4C7FD21A U 1 1 4C7FD21A
P 7200 6650 P 7200 6650
F 0 "#PWR040" H 7200 6650 30 0001 C CNN F 0 "#PWR69" H 7200 6650 30 0001 C CNN
F 1 "GND" H 7200 6580 30 0001 C CNN F 1 "GND" H 7200 6580 30 0001 C CNN
1 7200 6650 1 7200 6650
0 1 1 0 0 1 1 0
@ -606,10 +606,10 @@ AVR_MOSI
Text Label 7200 6750 0 40 ~ 8 Text Label 7200 6750 0 40 ~ 8
AVR_SCK AVR_SCK
$Comp $Comp
L +3.3V #PWR041 L +3.3V #PWR76
U 1 1 4C7FCF14 U 1 1 4C7FCF14
P 8050 4700 P 8050 4700
F 0 "#PWR041" H 8050 4660 30 0001 C CNN F 0 "#PWR76" H 8050 4660 30 0001 C CNN
F 1 "+3.3V" H 8050 4810 30 0000 C CNN F 1 "+3.3V" H 8050 4810 30 0000 C CNN
1 8050 4700 1 8050 4700
1 0 0 -1 1 0 0 -1
@ -671,10 +671,10 @@ pull up
Text Notes 3750 6450 0 40 ~ 0 Text Notes 3750 6450 0 40 ~ 0
pulldown pulldown
$Comp $Comp
L GND #PWR042 L GND #PWR53
U 1 1 4C7D02E4 U 1 1 4C7D02E4
P 2500 6200 P 2500 6200
F 0 "#PWR042" H 2500 6200 30 0001 C CNN F 0 "#PWR53" H 2500 6200 30 0001 C CNN
F 1 "GND" H 2500 6130 30 0001 C CNN F 1 "GND" H 2500 6130 30 0001 C CNN
1 2500 6200 1 2500 6200
1 0 0 -1 1 0 0 -1
@ -710,10 +710,10 @@ F 2 "0402" H 1250 5900 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR043 L GND #PWR51
U 1 1 4C7D02E0 U 1 1 4C7D02E0
P 1250 6200 P 1250 6200
F 0 "#PWR043" H 1250 6200 30 0001 C CNN F 0 "#PWR51" H 1250 6200 30 0001 C CNN
F 1 "GND" H 1250 6130 30 0001 C CNN F 1 "GND" H 1250 6130 30 0001 C CNN
1 1250 6200 1 1250 6200
1 0 0 -1 1 0 0 -1
@ -721,19 +721,19 @@ $EndComp
Text Label 2350 5250 0 30 ~ 0 Text Label 2350 5250 0 30 ~ 0
VIN_DC-DC-2.5 VIN_DC-DC-2.5
$Comp $Comp
L GND #PWR044 L GND #PWR54
U 1 1 4C7C4DCE U 1 1 4C7C4DCE
P 2700 6200 P 2700 6200
F 0 "#PWR044" H 2700 6200 30 0001 C CNN F 0 "#PWR54" H 2700 6200 30 0001 C CNN
F 1 "GND" H 2700 6130 30 0001 C CNN F 1 "GND" H 2700 6130 30 0001 C CNN
1 2700 6200 1 2700 6200
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR045 L GND #PWR56
U 1 1 4C7C4DCA U 1 1 4C7C4DCA
P 3350 6650 P 3350 6650
F 0 "#PWR045" H 3350 6650 30 0001 C CNN F 0 "#PWR56" H 3350 6650 30 0001 C CNN
F 1 "GND" H 3350 6580 30 0001 C CNN F 1 "GND" H 3350 6580 30 0001 C CNN
1 3350 6650 1 3350 6650
1 0 0 -1 1 0 0 -1
@ -775,28 +775,28 @@ F 1 "22uF" H 2750 5550 50 0000 L CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR046 L +2.5V #PWR67
U 1 1 4C7C4D0B U 1 1 4C7C4D0B
P 6400 5400 P 6400 5400
F 0 "#PWR046" H 6400 5350 20 0001 C CNN F 0 "#PWR67" H 6400 5350 20 0001 C CNN
F 1 "+2.5V" H 6400 5500 30 0000 C CNN F 1 "+2.5V" H 6400 5500 30 0000 C CNN
1 6400 5400 1 6400 5400
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR047 L GND #PWR61
U 1 1 4C7C4CF3 U 1 1 4C7C4CF3
P 5500 6350 P 5500 6350
F 0 "#PWR047" H 5500 6350 30 0001 C CNN F 0 "#PWR61" H 5500 6350 30 0001 C CNN
F 1 "GND" H 5500 6280 30 0001 C CNN F 1 "GND" H 5500 6280 30 0001 C CNN
1 5500 6350 1 5500 6350
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR048 L GND #PWR65
U 1 1 4C7C4CF2 U 1 1 4C7C4CF2
P 6200 6350 P 6200 6350
F 0 "#PWR048" H 6200 6350 30 0001 C CNN F 0 "#PWR65" H 6200 6350 30 0001 C CNN
F 1 "GND" H 6200 6280 30 0001 C CNN F 1 "GND" H 6200 6280 30 0001 C CNN
1 6200 6350 1 6200 6350
1 0 0 -1 1 0 0 -1
@ -866,10 +866,10 @@ VFB2.5
Text Label 5450 5400 0 30 ~ 0 Text Label 5450 5400 0 30 ~ 0
SW_2.5 SW_2.5
$Comp $Comp
L GND #PWR049 L GND #PWR74
U 1 1 4C79C99F U 1 1 4C79C99F
P 7500 3650 P 7500 3650
F 0 "#PWR049" H 7500 3650 30 0001 C CNN F 0 "#PWR74" H 7500 3650 30 0001 C CNN
F 1 "GND" H 7500 3580 30 0001 C CNN F 1 "GND" H 7500 3580 30 0001 C CNN
1 7500 3650 1 7500 3650
1 0 0 -1 1 0 0 -1
@ -887,10 +887,10 @@ $EndComp
Text Label 7100 2700 0 30 ~ 0 Text Label 7100 2700 0 30 ~ 0
VIN_DC-DC-5.0 VIN_DC-DC-5.0
$Comp $Comp
L GND #PWR050 L GND #PWR62
U 1 1 4C79C99D U 1 1 4C79C99D
P 6050 3650 P 6050 3650
F 0 "#PWR050" H 6050 3650 30 0001 C CNN F 0 "#PWR62" H 6050 3650 30 0001 C CNN
F 1 "GND" H 6050 3580 30 0001 C CNN F 1 "GND" H 6050 3580 30 0001 C CNN
1 6050 3650 1 6050 3650
1 0 0 -1 1 0 0 -1
@ -926,46 +926,46 @@ F 2 "MLP6" H 6750 3050 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR051 L GND #PWR70
U 1 1 4C79C999 U 1 1 4C79C999
P 7300 3650 P 7300 3650
F 0 "#PWR051" H 7300 3650 30 0001 C CNN F 0 "#PWR70" H 7300 3650 30 0001 C CNN
F 1 "GND" H 7300 3580 30 0001 C CNN F 1 "GND" H 7300 3580 30 0001 C CNN
1 7300 3650 1 7300 3650
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR052 L GND #PWR79
U 1 1 4C79C962 U 1 1 4C79C962
P 8850 3650 P 8850 3650
F 0 "#PWR052" H 8850 3650 30 0001 C CNN F 0 "#PWR79" H 8850 3650 30 0001 C CNN
F 1 "GND" H 8850 3580 30 0001 C CNN F 1 "GND" H 8850 3580 30 0001 C CNN
1 8850 3650 1 8850 3650
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +5V #PWR053 L +5V #PWR85
U 1 1 4C79C951 U 1 1 4C79C951
P 10300 2700 P 10300 2700
F 0 "#PWR053" H 10300 2790 20 0001 C CNN F 0 "#PWR85" H 10300 2790 20 0001 C CNN
F 1 "+5V" H 10300 2790 30 0000 C CNN F 1 "+5V" H 10300 2790 30 0000 C CNN
1 10300 2700 1 10300 2700
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR054 L GND #PWR81
U 1 1 4C79C8B4 U 1 1 4C79C8B4
P 9500 3650 P 9500 3650
F 0 "#PWR054" H 9500 3650 30 0001 C CNN F 0 "#PWR81" H 9500 3650 30 0001 C CNN
F 1 "GND" H 9500 3580 30 0001 C CNN F 1 "GND" H 9500 3580 30 0001 C CNN
1 9500 3650 1 9500 3650
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR055 L GND #PWR84
U 1 1 4C79C8B3 U 1 1 4C79C8B3
P 10200 3650 P 10200 3650
F 0 "#PWR055" H 10200 3650 30 0001 C CNN F 0 "#PWR84" H 10200 3650 30 0001 C CNN
F 1 "GND" H 10200 3580 30 0001 C CNN F 1 "GND" H 10200 3580 30 0001 C CNN
1 10200 3650 1 10200 3650
1 0 0 -1 1 0 0 -1
@ -1059,10 +1059,10 @@ Text Label 7750 5300 0 40 Italic 0
Text Label 5900 1100 0 60 ~ 12 Text Label 5900 1100 0 60 ~ 12
Iout_1.2 Iout_1.2
$Comp $Comp
L GND #PWR056 L GND #PWR73
U 1 1 4C77073C U 1 1 4C77073C
P 7400 1700 P 7400 1700
F 0 "#PWR056" H 7400 1700 30 0001 C CNN F 0 "#PWR73" H 7400 1700 30 0001 C CNN
F 1 "GND" H 7400 1630 30 0001 C CNN F 1 "GND" H 7400 1630 30 0001 C CNN
1 7400 1700 1 7400 1700
1 0 0 -1 1 0 0 -1
@ -1098,19 +1098,19 @@ F 2 "0402" H 6300 1400 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR057 L GND #PWR66
U 1 1 4C770711 U 1 1 4C770711
P 6300 1700 P 6300 1700
F 0 "#PWR057" H 6300 1700 30 0001 C CNN F 0 "#PWR66" H 6300 1700 30 0001 C CNN
F 1 "GND" H 6300 1630 30 0001 C CNN F 1 "GND" H 6300 1630 30 0001 C CNN
1 6300 1700 1 6300 1700
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR058 L GND #PWR48
U 1 1 4C77068E U 1 1 4C77068E
P 950 1700 P 950 1700
F 0 "#PWR058" H 950 1700 30 0001 C CNN F 0 "#PWR48" H 950 1700 30 0001 C CNN
F 1 "GND" H 950 1630 30 0001 C CNN F 1 "GND" H 950 1630 30 0001 C CNN
1 950 1700 1 950 1700
1 0 0 -1 1 0 0 -1
@ -1158,19 +1158,19 @@ VFB1.2
Text Label 3850 950 0 30 ~ 0 Text Label 3850 950 0 30 ~ 0
VFB3.3 VFB3.3
$Comp $Comp
L +3.3V #PWR059 L +3.3V #PWR60
U 1 1 4C6D30A1 U 1 1 4C6D30A1
P 4850 750 P 4850 750
F 0 "#PWR059" H 4850 710 30 0001 C CNN F 0 "#PWR60" H 4850 710 30 0001 C CNN
F 1 "+3.3V" H 4850 860 30 0000 C CNN F 1 "+3.3V" H 4850 860 30 0000 C CNN
1 4850 750 1 4850 750
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +1.2V #PWR060 L +1.2V #PWR83
U 1 1 4C6D3097 U 1 1 4C6D3097
P 10150 750 P 10150 750
F 0 "#PWR060" H 10150 890 20 0001 C CNN F 0 "#PWR83" H 10150 890 20 0001 C CNN
F 1 "+1.2V" H 10150 860 30 0000 C CNN F 1 "+1.2V" H 10150 860 30 0000 C CNN
1 10150 750 1 10150 750
1 0 0 -1 1 0 0 -1
@ -1206,10 +1206,10 @@ F 2 "1206" H 9650 1450 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR061 L GND #PWR75
U 1 1 4C6D2FD4 U 1 1 4C6D2FD4
P 7550 1700 P 7550 1700
F 0 "#PWR061" H 7550 1700 30 0001 C CNN F 0 "#PWR75" H 7550 1700 30 0001 C CNN
F 1 "GND" H 7550 1630 30 0001 C CNN F 1 "GND" H 7550 1630 30 0001 C CNN
1 7550 1700 1 7550 1700
1 0 0 -1 1 0 0 -1
@ -1255,37 +1255,37 @@ F 2 "0402" H 10000 1450 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR062 L GND #PWR82
U 1 1 4C6D2FCF U 1 1 4C6D2FCF
P 9850 1700 P 9850 1700
F 0 "#PWR062" H 9850 1700 30 0001 C CNN F 0 "#PWR82" H 9850 1700 30 0001 C CNN
F 1 "GND" H 9850 1630 30 0001 C CNN F 1 "GND" H 9850 1630 30 0001 C CNN
1 9850 1700 1 9850 1700
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR063 L GND #PWR80
U 1 1 4C6D2FCE U 1 1 4C6D2FCE
P 9150 1700 P 9150 1700
F 0 "#PWR063" H 9150 1700 30 0001 C CNN F 0 "#PWR80" H 9150 1700 30 0001 C CNN
F 1 "GND" H 9150 1630 30 0001 C CNN F 1 "GND" H 9150 1630 30 0001 C CNN
1 9150 1700 1 9150 1700
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR064 L GND #PWR57
U 1 1 4C6D2F47 U 1 1 4C6D2F47
P 3850 1700 P 3850 1700
F 0 "#PWR064" H 3850 1700 30 0001 C CNN F 0 "#PWR57" H 3850 1700 30 0001 C CNN
F 1 "GND" H 3850 1630 30 0001 C CNN F 1 "GND" H 3850 1630 30 0001 C CNN
1 3850 1700 1 3850 1700
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR065 L GND #PWR59
U 1 1 4C6D2F41 U 1 1 4C6D2F41
P 4550 1700 P 4550 1700
F 0 "#PWR065" H 4550 1700 30 0001 C CNN F 0 "#PWR59" H 4550 1700 30 0001 C CNN
F 1 "GND" H 4550 1630 30 0001 C CNN F 1 "GND" H 4550 1630 30 0001 C CNN
1 4550 1700 1 4550 1700
1 0 0 -1 1 0 0 -1
@ -1331,10 +1331,10 @@ F 2 "0402" H 3850 1400 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR066 L GND #PWR52
U 1 1 4C6D2CCE U 1 1 4C6D2CCE
P 2300 1700 P 2300 1700
F 0 "#PWR066" H 2300 1700 30 0001 C CNN F 0 "#PWR52" H 2300 1700 30 0001 C CNN
F 1 "GND" H 2300 1630 30 0001 C CNN F 1 "GND" H 2300 1630 30 0001 C CNN
1 2300 1700 1 2300 1700
1 0 0 -1 1 0 0 -1
@ -1370,19 +1370,19 @@ F 2 "0805" H 2300 1400 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR067 L GND #PWR78
U 1 1 4C6D2C02 U 1 1 4C6D2C02
P 8500 1700 P 8500 1700
F 0 "#PWR067" H 8500 1700 30 0001 C CNN F 0 "#PWR78" H 8500 1700 30 0001 C CNN
F 1 "GND" H 8500 1630 30 0001 C CNN F 1 "GND" H 8500 1630 30 0001 C CNN
1 8500 1700 1 8500 1700
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR068 L GND #PWR55
U 1 1 4C6D2BFC U 1 1 4C6D2BFC
P 3200 1700 P 3200 1700
F 0 "#PWR068" H 3200 1700 30 0001 C CNN F 0 "#PWR55" H 3200 1700 30 0001 C CNN
F 1 "GND" H 3200 1630 30 0001 C CNN F 1 "GND" H 3200 1630 30 0001 C CNN
1 3200 1700 1 3200 1700
1 0 0 -1 1 0 0 -1
@ -1408,10 +1408,10 @@ F 2 "SOT23-5" H 3100 1050 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR069 L GND #PWR58
U 1 1 4C6C9F96 U 1 1 4C6C9F96
P 4500 6700 P 4500 6700
F 0 "#PWR069" H 4500 6700 30 0001 C CNN F 0 "#PWR58" H 4500 6700 30 0001 C CNN
F 1 "GND" H 4500 6630 30 0001 C CNN F 1 "GND" H 4500 6630 30 0001 C CNN
1 4500 6700 1 4500 6700
1 0 0 -1 1 0 0 -1
@ -1427,10 +1427,10 @@ F 2 "DFN10" H 4250 5450 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR070 L GND #PWR77
U 1 1 4C69F7A5 U 1 1 4C69F7A5
P 8050 4950 P 8050 4950
F 0 "#PWR070" H 8050 4950 30 0001 C CNN F 0 "#PWR77" H 8050 4950 30 0001 C CNN
F 1 "GND" H 8050 4880 30 0001 C CNN F 1 "GND" H 8050 4880 30 0001 C CNN
1 8050 4950 1 8050 4950
1 0 0 -1 1 0 0 -1

94
kicad/xue-rnc/USB.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 10 Oct 2010 09:18:11 AM COT EESchema Schematic File Version 2 date Sun 10 Oct 2010 06:23:22 PM COT
LIBS:power LIBS:power
LIBS:r_pack2 LIBS:r_pack2
LIBS:v0402mhs03 LIBS:v0402mhs03
@ -363,10 +363,10 @@ F 1 "15k" V 3975 6100 50 0000 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR079 L +3.3V #PWR41
U 1 1 4C7D365E U 1 1 4C7D365E
P 3975 5750 P 3975 5750
F 0 "#PWR079" H 3975 5710 30 0001 C CNN F 0 "#PWR41" H 3975 5710 30 0001 C CNN
F 1 "+3.3V" H 3975 5860 30 0000 C CNN F 1 "+3.3V" H 3975 5860 30 0000 C CNN
1 3975 5750 1 3975 5750
1 0 0 -1 1 0 0 -1
@ -378,10 +378,10 @@ USBA_D-
Text Label 4125 6550 0 40 ~ 0 Text Label 4125 6550 0 40 ~ 0
USBD_D- USBD_D-
$Comp $Comp
L GND #PWR080 L GND #PWR27
U 1 1 4C7D3584 U 1 1 4C7D3584
P 1750 7150 P 1750 7150
F 0 "#PWR080" H 1750 7150 30 0001 C CNN F 0 "#PWR27" H 1750 7150 30 0001 C CNN
F 1 "GND" H 1750 7080 30 0001 C CNN F 1 "GND" H 1750 7080 30 0001 C CNN
1 1750 7150 1 1750 7150
1 0 0 -1 1 0 0 -1
@ -405,10 +405,10 @@ F 1 "24" V 2400 6550 50 0000 C CNN
0 1 1 0 0 1 1 0
$EndComp $EndComp
$Comp $Comp
L GND #PWR081 L GND #PWR28
U 1 1 4C7D353A U 1 1 4C7D353A
P 1850 3450 P 1850 3450
F 0 "#PWR081" H 1850 3450 30 0001 C CNN F 0 "#PWR28" H 1850 3450 30 0001 C CNN
F 1 "GND" H 1850 3380 30 0001 C CNN F 1 "GND" H 1850 3380 30 0001 C CNN
1 1850 3450 1 1850 3450
1 0 0 -1 1 0 0 -1
@ -436,10 +436,10 @@ USB_CASE_DEV
Text Label 5850 2950 0 40 ~ 0 Text Label 5850 2950 0 40 ~ 0
USB_CASE_HOST USB_CASE_HOST
$Comp $Comp
L +3.3V #PWR082 L +3.3V #PWR42
U 1 1 4C7D32BA U 1 1 4C7D32BA
P 4350 2050 P 4350 2050
F 0 "#PWR082" H 4350 2010 30 0001 C CNN F 0 "#PWR42" H 4350 2010 30 0001 C CNN
F 1 "+3.3V" H 4350 2160 30 0000 C CNN F 1 "+3.3V" H 4350 2160 30 0000 C CNN
1 4350 2050 1 4350 2050
1 0 0 -1 1 0 0 -1
@ -504,91 +504,91 @@ F 2 "MLF16" H 1700 2750 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR083 L +3.3V #PWR34
U 1 1 4C695F50 U 1 1 4C695F50
P 2700 4600 P 2700 4600
F 0 "#PWR083" H 2700 4560 30 0001 C CNN F 0 "#PWR34" H 2700 4560 30 0001 C CNN
F 1 "+3.3V" H 2700 4710 30 0000 C CNN F 1 "+3.3V" H 2700 4710 30 0000 C CNN
1 2700 4600 1 2700 4600
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR084 L +3.3V #PWR29
U 1 1 4C695F4B U 1 1 4C695F4B
P 2100 6100 P 2100 6100
F 0 "#PWR084" H 2100 6060 30 0001 C CNN F 0 "#PWR29" H 2100 6060 30 0001 C CNN
F 1 "+3.3V" H 2100 6210 30 0000 C CNN F 1 "+3.3V" H 2100 6210 30 0000 C CNN
1 2100 6100 1 2100 6100
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR085 L +3.3V #PWR32
U 1 1 4C695F43 U 1 1 4C695F43
P 2650 1100 P 2650 1100
F 0 "#PWR085" H 2650 1060 30 0001 C CNN F 0 "#PWR32" H 2650 1060 30 0001 C CNN
F 1 "+3.3V" H 2650 1210 30 0000 C CNN F 1 "+3.3V" H 2650 1210 30 0000 C CNN
1 2650 1100 1 2650 1100
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +3.3V #PWR086 L +3.3V #PWR30
U 1 1 4C695F3B U 1 1 4C695F3B
P 2200 2400 P 2200 2400
F 0 "#PWR086" H 2200 2360 30 0001 C CNN F 0 "#PWR30" H 2200 2360 30 0001 C CNN
F 1 "+3.3V" H 2200 2510 30 0000 C CNN F 1 "+3.3V" H 2200 2510 30 0000 C CNN
1 2200 2400 1 2200 2400
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR087 L +2.5V #PWR39
U 1 1 4C695DCD U 1 1 4C695DCD
P 3200 4550 P 3200 4550
F 0 "#PWR087" H 3200 4500 20 0001 C CNN F 0 "#PWR39" H 3200 4500 20 0001 C CNN
F 1 "+2.5V" H 3200 4650 30 0000 C CNN F 1 "+2.5V" H 3200 4650 30 0000 C CNN
1 3200 4550 1 3200 4550
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR088 L GND #PWR40
U 1 1 4C695F0A U 1 1 4C695F0A
P 3200 5550 P 3200 5550
F 0 "#PWR088" H 3200 5550 30 0001 C CNN F 0 "#PWR40" H 3200 5550 30 0001 C CNN
F 1 "GND" H 3200 5480 30 0001 C CNN F 1 "GND" H 3200 5480 30 0001 C CNN
1 3200 5550 1 3200 5550
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR089 L GND #PWR33
U 1 1 4C695F09 U 1 1 4C695F09
P 2650 5550 P 2650 5550
F 0 "#PWR089" H 2650 5550 30 0001 C CNN F 0 "#PWR33" H 2650 5550 30 0001 C CNN
F 1 "GND" H 2650 5480 30 0001 C CNN F 1 "GND" H 2650 5480 30 0001 C CNN
1 2650 5550 1 2650 5550
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR090 L GND #PWR37
U 1 1 4C695DFE U 1 1 4C695DFE
P 3150 1850 P 3150 1850
F 0 "#PWR090" H 3150 1850 30 0001 C CNN F 0 "#PWR37" H 3150 1850 30 0001 C CNN
F 1 "GND" H 3150 1780 30 0001 C CNN F 1 "GND" H 3150 1780 30 0001 C CNN
1 3150 1850 1 3150 1850
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR091 L GND #PWR31
U 1 1 4C695DF8 U 1 1 4C695DF8
P 2600 1850 P 2600 1850
F 0 "#PWR091" H 2600 1850 30 0001 C CNN F 0 "#PWR31" H 2600 1850 30 0001 C CNN
F 1 "GND" H 2600 1780 30 0001 C CNN F 1 "GND" H 2600 1780 30 0001 C CNN
1 2600 1850 1 2600 1850
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR092 L +2.5V #PWR36
U 1 1 4C695DA7 U 1 1 4C695DA7
P 3150 1100 P 3150 1100
F 0 "#PWR092" H 3150 1050 20 0001 C CNN F 0 "#PWR36" H 3150 1050 20 0001 C CNN
F 1 "+2.5V" H 3150 1200 30 0000 C CNN F 1 "+2.5V" H 3150 1200 30 0000 C CNN
1 3150 1100 1 3150 1100
1 0 0 -1 1 0 0 -1
@ -669,28 +669,28 @@ USBD_VP
Text HLabel 1200 6750 0 40 BiDi ~ 0 Text HLabel 1200 6750 0 40 BiDi ~ 0
USBD_VM USBD_VM
$Comp $Comp
L GND #PWR093 L GND #PWR46
U 1 1 4C6552B5 U 1 1 4C6552B5
P 5500 7400 P 5500 7400
F 0 "#PWR093" H 5500 7400 30 0001 C CNN F 0 "#PWR46" H 5500 7400 30 0001 C CNN
F 1 "GND" H 5500 7330 30 0001 C CNN F 1 "GND" H 5500 7330 30 0001 C CNN
1 5500 7400 1 5500 7400
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR094 L GND #PWR38
U 1 1 4C6552B4 U 1 1 4C6552B4
P 3150 7500 P 3150 7500
F 0 "#PWR094" H 3150 7500 30 0001 C CNN F 0 "#PWR38" H 3150 7500 30 0001 C CNN
F 1 "GND" H 3150 7430 30 0001 C CNN F 1 "GND" H 3150 7430 30 0001 C CNN
1 3150 7500 1 3150 7500
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR095 L +2.5V #PWR25
U 1 1 4C6552B2 U 1 1 4C6552B2
P 1150 6150 P 1150 6150
F 0 "#PWR095" H 1150 6100 20 0001 C CNN F 0 "#PWR25" H 1150 6100 20 0001 C CNN
F 1 "+2.5V" H 1150 6250 30 0000 C CNN F 1 "+2.5V" H 1150 6250 30 0000 C CNN
1 1150 6150 1 1150 6150
1 0 0 -1 1 0 0 -1
@ -706,28 +706,28 @@ F 2 "0603" H 4650 7000 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR096 L GND #PWR43
U 1 1 4C6552AE U 1 1 4C6552AE
P 4650 7350 P 4650 7350
F 0 "#PWR096" H 4650 7350 30 0001 C CNN F 0 "#PWR43" H 4650 7350 30 0001 C CNN
F 1 "GND" H 4650 7280 30 0001 C CNN F 1 "GND" H 4650 7280 30 0001 C CNN
1 4650 7350 1 4650 7350
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR097 L GND #PWR45
U 1 1 4C63F2B5 U 1 1 4C63F2B5
P 4900 3700 P 4900 3700
F 0 "#PWR097" H 4900 3700 30 0001 C CNN F 0 "#PWR45" H 4900 3700 30 0001 C CNN
F 1 "GND" H 4900 3630 30 0001 C CNN F 1 "GND" H 4900 3630 30 0001 C CNN
1 4900 3700 1 4900 3700
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +5V #PWR098 L +5V #PWR44
U 1 1 4C63F295 U 1 1 4C63F295
P 4700 1350 P 4700 1350
F 0 "#PWR098" H 4700 1440 20 0001 C CNN F 0 "#PWR44" H 4700 1440 20 0001 C CNN
F 1 "+5V" H 4700 1440 30 0000 C CNN F 1 "+5V" H 4700 1440 30 0000 C CNN
1 4700 1350 1 4700 1350
1 0 0 -1 1 0 0 -1
@ -753,28 +753,28 @@ F 2 "0603" H 4900 3350 60 0001 C CNN
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L +2.5V #PWR099 L +2.5V #PWR26
U 1 1 4C63EC16 U 1 1 4C63EC16
P 1250 2450 P 1250 2450
F 0 "#PWR099" H 1250 2400 20 0001 C CNN F 0 "#PWR26" H 1250 2400 20 0001 C CNN
F 1 "+2.5V" H 1250 2550 30 0000 C CNN F 1 "+2.5V" H 1250 2550 30 0000 C CNN
1 1250 2450 1 1250 2450
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR0100 L GND #PWR35
U 1 1 4C63EA1B U 1 1 4C63EA1B
P 3100 3800 P 3100 3800
F 0 "#PWR0100" H 3100 3800 30 0001 C CNN F 0 "#PWR35" H 3100 3800 30 0001 C CNN
F 1 "GND" H 3100 3730 30 0001 C CNN F 1 "GND" H 3100 3730 30 0001 C CNN
1 3100 3800 1 3100 3800
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR0101 L GND #PWR47
U 1 1 4C63E9FA U 1 1 4C63E9FA
P 5950 3750 P 5950 3750
F 0 "#PWR0101" H 5950 3750 30 0001 C CNN F 0 "#PWR47" H 5950 3750 30 0001 C CNN
F 1 "GND" H 5950 3680 30 0001 C CNN F 1 "GND" H 5950 3680 30 0001 C CNN
1 5950 3750 1 5950 3750
1 0 0 -1 1 0 0 -1

2
kicad/xue-rnc/eth_phy.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 10 Oct 2010 09:18:11 AM COT EESchema Schematic File Version 2 date Sun 10 Oct 2010 06:23:22 PM COT
LIBS:power LIBS:power
LIBS:r_pack2 LIBS:r_pack2
LIBS:v0402mhs03 LIBS:v0402mhs03

420
kicad/xue-rnc/expantion.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 10 Oct 2010 09:18:11 AM COT EESchema Schematic File Version 2 date Sun 10 Oct 2010 06:23:22 PM COT
LIBS:power LIBS:power
LIBS:r_pack2 LIBS:r_pack2
LIBS:v0402mhs03 LIBS:v0402mhs03
@ -63,6 +63,424 @@ Comment2 ""
Comment3 "" Comment3 ""
Comment4 "" Comment4 ""
$EndDescr $EndDescr
Text Label 1650 1450 0 60 ~ 0
FPGA_BANK0_IO_0
Text Label 1650 1550 0 60 ~ 0
FPGA_BANK0_IO_1
Text Label 1650 1750 0 60 ~ 0
FPGA_BANK0_IO_3
Text Label 1650 1650 0 60 ~ 0
FPGA_BANK0_IO_2
Text Label 1650 2050 0 60 ~ 0
FPGA_BANK0_IO_6
Text Label 1650 2150 0 60 ~ 0
FPGA_BANK0_IO_7
Text Label 1650 1950 0 60 ~ 0
FPGA_BANK0_IO_5
Text Label 1650 1850 0 60 ~ 0
FPGA_BANK0_IO_4
Text Label 1650 2650 0 60 ~ 0
FPGA_BANK0_IO_12
Text Label 1650 2750 0 60 ~ 0
FPGA_BANK0_IO_13
Text Label 1650 2950 0 60 ~ 0
FPGA_BANK0_IO_15
Text Label 1650 2850 0 60 ~ 0
FPGA_BANK0_IO_14
Text Label 1650 2450 0 60 ~ 0
FPGA_BANK0_IO_10
Text Label 1650 2550 0 60 ~ 0
FPGA_BANK0_IO_11
Text Label 1650 2350 0 60 ~ 0
FPGA_BANK0_IO_9
Text Label 1650 2250 0 60 ~ 0
FPGA_BANK0_IO_8
Entry Wire Line
2550 1450 2650 1550
Entry Wire Line
2550 1650 2650 1750
Entry Wire Line
2550 1550 2650 1650
Entry Wire Line
2550 1750 2650 1850
Entry Wire Line
2550 1850 2650 1950
Entry Wire Line
2550 1950 2650 2050
Entry Wire Line
2550 2050 2650 2150
Entry Wire Line
2550 2150 2650 2250
Entry Wire Line
2550 2250 2650 2350
Entry Wire Line
2550 2950 2650 3050
Entry Wire Line
2550 2850 2650 2950
Entry Wire Line
2550 2750 2650 2850
Entry Wire Line
2550 2550 2650 2650
Entry Wire Line
2550 2450 2650 2550
Entry Wire Line
2550 2350 2650 2450
Entry Wire Line
2550 2650 2650 2750
Text HLabel 3550 1300 2 60 BiDi ~ 0
FPGA_BANK0_IO_[0..64]
Text Label 1650 3050 0 60 ~ 0
FPGA_BANK0_IO_16
Text Label 1650 3150 0 60 ~ 0
FPGA_BANK0_IO_17
Text Label 1650 3350 0 60 ~ 0
FPGA_BANK0_IO_19
Text Label 1650 3250 0 60 ~ 0
FPGA_BANK0_IO_18
Text Label 1650 3650 0 60 ~ 0
FPGA_BANK0_IO_22
Text Label 1650 3750 0 60 ~ 0
FPGA_BANK0_IO_23
Text Label 1650 3550 0 60 ~ 0
FPGA_BANK0_IO_21
Text Label 1650 3450 0 60 ~ 0
FPGA_BANK0_IO_20
Text Label 1650 4250 0 60 ~ 0
FPGA_BANK0_IO_28
Text Label 1650 4350 0 60 ~ 0
FPGA_BANK0_IO_29
Text Label 1650 4550 0 60 ~ 0
FPGA_BANK0_IO_31
Text Label 1650 4450 0 60 ~ 0
FPGA_BANK0_IO_30
Text Label 1650 4050 0 60 ~ 0
FPGA_BANK0_IO_26
Text Label 1650 4150 0 60 ~ 0
FPGA_BANK0_IO_27
Text Label 1650 3950 0 60 ~ 0
FPGA_BANK0_IO_25
Text Label 1650 3850 0 60 ~ 0
FPGA_BANK0_IO_24
Text Label 1650 4650 0 60 ~ 0
FPGA_BANK0_IO_32
Text Label 1650 4750 0 60 ~ 0
FPGA_BANK0_IO_33
Entry Wire Line
2850 5150 2950 5050
Entry Wire Line
2850 5050 2950 4950
Text Label 2950 4950 0 60 ~ 0
FPGA_BANK0_IO_35
Text Label 2950 5050 0 60 ~ 0
FPGA_BANK0_IO_34
Text Label 2950 4850 0 60 ~ 0
FPGA_BANK0_IO_36
Text Label 2950 4750 0 60 ~ 0
FPGA_BANK0_IO_37
Entry Wire Line
2850 4850 2950 4750
Entry Wire Line
2850 4950 2950 4850
Entry Wire Line
2850 4750 2950 4650
Entry Wire Line
2850 4650 2950 4550
Text Label 2950 4550 0 60 ~ 0
FPGA_BANK0_IO_39
Text Label 2950 4650 0 60 ~ 0
FPGA_BANK0_IO_38
Text Label 2950 4450 0 60 ~ 0
FPGA_BANK0_IO_40
Text Label 2950 4350 0 60 ~ 0
FPGA_BANK0_IO_41
Entry Wire Line
2850 4450 2950 4350
Entry Wire Line
2850 4550 2950 4450
Entry Wire Line
2850 4350 2950 4250
Entry Wire Line
2850 4250 2950 4150
Text Label 2950 4150 0 60 ~ 0
FPGA_BANK0_IO_43
Text Label 2950 4250 0 60 ~ 0
FPGA_BANK0_IO_42
Text Label 2950 4050 0 60 ~ 0
FPGA_BANK0_IO_44
Text Label 2950 3950 0 60 ~ 0
FPGA_BANK0_IO_45
Entry Wire Line
2850 4050 2950 3950
Entry Wire Line
2850 4150 2950 4050
Entry Wire Line
2850 3950 2950 3850
Entry Wire Line
2850 3850 2950 3750
Text Label 2950 3750 0 60 ~ 0
FPGA_BANK0_IO_47
Text Label 2950 3850 0 60 ~ 0
FPGA_BANK0_IO_46
Text Label 2950 3650 0 60 ~ 0
FPGA_BANK0_IO_48
Text Label 2950 3550 0 60 ~ 0
FPGA_BANK0_IO_49
Entry Wire Line
2850 3650 2950 3550
Entry Wire Line
2850 3750 2950 3650
Entry Wire Line
2850 3550 2950 3450
Entry Wire Line
2850 3450 2950 3350
Text Label 2950 3350 0 60 ~ 0
FPGA_BANK0_IO_51
Text Label 2950 3450 0 60 ~ 0
FPGA_BANK0_IO_50
Text Label 2950 3250 0 60 ~ 0
FPGA_BANK0_IO_52
Text Label 2950 3150 0 60 ~ 0
FPGA_BANK0_IO_53
Entry Wire Line
2850 3250 2950 3150
Entry Wire Line
2850 3350 2950 3250
Entry Wire Line
2850 3150 2950 3050
Entry Wire Line
2850 3050 2950 2950
Text Label 2950 2950 0 60 ~ 0
FPGA_BANK0_IO_55
Text Label 2950 3050 0 60 ~ 0
FPGA_BANK0_IO_54
Text Label 2950 2250 0 60 ~ 0
FPGA_BANK0_IO_62
Text Label 2950 2150 0 60 ~ 0
FPGA_BANK0_IO_63
Text Label 2950 2350 0 60 ~ 0
FPGA_BANK0_IO_61
Text Label 2950 2450 0 60 ~ 0
FPGA_BANK0_IO_60
Text Label 2950 2050 0 60 ~ 0
FPGA_BANK0_IO_64
Text Label 2950 2850 0 60 ~ 0
FPGA_BANK0_IO_56
Text Label 2950 2750 0 60 ~ 0
FPGA_BANK0_IO_57
Text Label 2950 2550 0 60 ~ 0
FPGA_BANK0_IO_59
Text Label 2950 2650 0 60 ~ 0
FPGA_BANK0_IO_58
Entry Wire Line
2550 4250 2650 4350
Entry Wire Line
2550 3950 2650 4050
Entry Wire Line
2550 4050 2650 4150
Entry Wire Line
2550 4150 2650 4250
Entry Wire Line
2550 4350 2650 4450
Entry Wire Line
2550 4450 2650 4550
Entry Wire Line
2550 4550 2650 4650
Entry Wire Line
2550 3850 2650 3950
Entry Wire Line
2550 3750 2650 3850
Entry Wire Line
2550 3650 2650 3750
Entry Wire Line
2550 3550 2650 3650
Entry Wire Line
2550 3450 2650 3550
Entry Wire Line
2550 3350 2650 3450
Entry Wire Line
2550 3150 2650 3250
Entry Wire Line
2550 3250 2650 3350
Entry Wire Line
2550 3050 2650 3150
Entry Wire Line
2550 4750 2650 4850
Entry Wire Line
2550 4650 2650 4750
Text Label 1650 5050 0 60 ~ 0
FPGA_BANK0_IO_36
Text Label 1650 4850 0 60 ~ 0
FPGA_BANK0_IO_34
Text Label 1650 4950 0 60 ~ 0
FPGA_BANK0_IO_35
Entry Wire Line
2550 4950 2650 5050
Entry Wire Line
2550 5050 2650 5150
Entry Wire Line
2550 4850 2650 4950
Wire Bus Line
2650 5250 2850 5250
Wire Bus Line
2650 1550 2650 5250
Wire Wire Line
1650 4950 2550 4950
Wire Wire Line
2550 4750 1650 4750
Wire Wire Line
3800 2050 2950 2050
Wire Wire Line
3800 2250 2950 2250
Wire Wire Line
3800 2150 2950 2150
Wire Wire Line
3800 2350 2950 2350
Wire Wire Line
3800 2450 2950 2450
Wire Wire Line
3800 3250 2950 3250
Wire Wire Line
3800 3150 2950 3150
Wire Wire Line
3800 2950 2950 2950
Wire Wire Line
3800 3050 2950 3050
Wire Wire Line
2550 3050 1650 3050
Wire Wire Line
1650 4650 2550 4650
Wire Wire Line
2550 1450 1650 1450
Wire Wire Line
2550 1550 1650 1550
Wire Wire Line
2550 1750 1650 1750
Wire Wire Line
2550 1650 1650 1650
Wire Wire Line
2550 2050 1650 2050
Wire Wire Line
2550 2150 1650 2150
Wire Wire Line
2550 1950 1650 1950
Wire Wire Line
2550 1850 1650 1850
Wire Wire Line
2550 2650 1650 2650
Wire Wire Line
2550 2750 1650 2750
Wire Wire Line
2550 2950 1650 2950
Wire Wire Line
2550 2850 1650 2850
Wire Wire Line
2550 2450 1650 2450
Wire Wire Line
2550 2550 1650 2550
Wire Wire Line
2550 2350 1650 2350
Wire Wire Line
2550 2250 1650 2250
Wire Wire Line
1650 4550 2550 4550
Wire Wire Line
1650 4350 2550 4350
Wire Wire Line
1650 4450 2550 4450
Wire Wire Line
1650 4050 2550 4050
Wire Wire Line
1650 3950 2550 3950
Wire Wire Line
1650 4150 2550 4150
Wire Wire Line
1650 4250 2550 4250
Wire Wire Line
1650 3450 2550 3450
Wire Wire Line
1650 3350 2550 3350
Wire Wire Line
1650 3150 2550 3150
Wire Wire Line
1650 3250 2550 3250
Wire Wire Line
1650 3650 2550 3650
Wire Wire Line
1650 3550 2550 3550
Wire Wire Line
1650 3750 2550 3750
Wire Wire Line
1650 3850 2550 3850
Wire Wire Line
3800 4950 2950 4950
Wire Wire Line
3800 5050 2950 5050
Wire Wire Line
3800 4850 2950 4850
Wire Wire Line
3800 4750 2950 4750
Wire Wire Line
3800 4550 2950 4550
Wire Wire Line
3800 4650 2950 4650
Wire Wire Line
3800 4450 2950 4450
Wire Wire Line
3800 4350 2950 4350
Wire Wire Line
3800 4150 2950 4150
Wire Wire Line
3800 4250 2950 4250
Wire Wire Line
3800 4050 2950 4050
Wire Wire Line
3800 3950 2950 3950
Wire Wire Line
3800 3750 2950 3750
Wire Wire Line
3800 3850 2950 3850
Wire Wire Line
3800 3650 2950 3650
Wire Wire Line
3800 3550 2950 3550
Wire Wire Line
3800 3350 2950 3350
Wire Wire Line
3800 3450 2950 3450
Wire Wire Line
3800 2850 2950 2850
Wire Wire Line
3800 2750 2950 2750
Wire Wire Line
3800 2550 2950 2550
Wire Wire Line
3800 2650 2950 2650
Wire Wire Line
2550 4850 1650 4850
Wire Wire Line
1650 5050 2550 5050
Wire Bus Line
2850 1300 2850 5250
Wire Bus Line
2850 1300 3550 1300
Entry Wire Line
2850 2950 2950 2850
Entry Wire Line
2850 2850 2950 2750
Entry Wire Line
2850 2750 2950 2650
Entry Wire Line
2850 2650 2950 2550
Entry Wire Line
2850 2550 2950 2450
Entry Wire Line
2850 2450 2950 2350
Entry Wire Line
2850 2350 2950 2250
Entry Wire Line
2850 2250 2950 2150
Entry Wire Line
2850 2150 2950 2050
$Comp $Comp
L CONN_20X2 P2 L CONN_20X2 P2
U 1 1 4CB0D9BF U 1 1 4CB0D9BF

26
kicad/xue-rnc/sensor.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 10 Oct 2010 09:18:11 AM COT EESchema Schematic File Version 2 date Sun 10 Oct 2010 06:23:22 PM COT
LIBS:power LIBS:power
LIBS:r_pack2 LIBS:r_pack2
LIBS:v0402mhs03 LIBS:v0402mhs03
@ -429,46 +429,46 @@ Text HLabel 3950 700 0 40 BiDi ~ 0
Text HLabel 3050 700 0 40 BiDi ~ 0 Text HLabel 3050 700 0 40 BiDi ~ 0
+2.8_VDDPLL +2.8_VDDPLL
$Comp $Comp
L GND #PWR01 L GND #PWR113
U 1 1 4C9E3D34 U 1 1 4C9E3D34
P 7900 1350 P 7900 1350
F 0 "#PWR01" H 7900 1350 30 0001 C CNN F 0 "#PWR113" H 7900 1350 30 0001 C CNN
F 1 "GND" H 7900 1280 30 0001 C CNN F 1 "GND" H 7900 1280 30 0001 C CNN
1 7900 1350 1 7900 1350
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR02 L GND #PWR111
U 1 1 4C9E3D31 U 1 1 4C9E3D31
P 6400 1350 P 6400 1350
F 0 "#PWR02" H 6400 1350 30 0001 C CNN F 0 "#PWR111" H 6400 1350 30 0001 C CNN
F 1 "GND" H 6400 1280 30 0001 C CNN F 1 "GND" H 6400 1280 30 0001 C CNN
1 6400 1350 1 6400 1350
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR03 L GND #PWR110
U 1 1 4C9E3CE6 U 1 1 4C9E3CE6
P 5000 1350 P 5000 1350
F 0 "#PWR03" H 5000 1350 30 0001 C CNN F 0 "#PWR110" H 5000 1350 30 0001 C CNN
F 1 "GND" H 5000 1280 30 0001 C CNN F 1 "GND" H 5000 1280 30 0001 C CNN
1 5000 1350 1 5000 1350
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR04 L GND #PWR109
U 1 1 4C9E3CE3 U 1 1 4C9E3CE3
P 4100 1350 P 4100 1350
F 0 "#PWR04" H 4100 1350 30 0001 C CNN F 0 "#PWR109" H 4100 1350 30 0001 C CNN
F 1 "GND" H 4100 1280 30 0001 C CNN F 1 "GND" H 4100 1280 30 0001 C CNN
1 4100 1350 1 4100 1350
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR05 L GND #PWR108
U 1 1 4C9E3CE0 U 1 1 4C9E3CE0
P 3200 1350 P 3200 1350
F 0 "#PWR05" H 3200 1350 30 0001 C CNN F 0 "#PWR108" H 3200 1350 30 0001 C CNN
F 1 "GND" H 3200 1280 30 0001 C CNN F 1 "GND" H 3200 1280 30 0001 C CNN
1 3200 1350 1 3200 1350
1 0 0 -1 1 0 0 -1
@ -623,10 +623,10 @@ NoConn ~ 5100 5550
NoConn ~ 5250 5550 NoConn ~ 5250 5550
NoConn ~ 4950 5550 NoConn ~ 4950 5550
$Comp $Comp
L GND #PWR06 L GND #PWR112
U 1 1 4C9E3B8A U 1 1 4C9E3B8A
P 6400 5700 P 6400 5700
F 0 "#PWR06" H 6400 5700 30 0001 C CNN F 0 "#PWR112" H 6400 5700 30 0001 C CNN
F 1 "GND" H 6400 5630 30 0001 C CNN F 1 "GND" H 6400 5630 30 0001 C CNN
1 6400 5700 1 6400 5700
1 0 0 -1 1 0 0 -1

22
kicad/xue-rnc/sensor_psu.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 10 Oct 2010 09:18:11 AM COT EESchema Schematic File Version 2 date Sun 10 Oct 2010 06:23:22 PM COT
LIBS:power LIBS:power
LIBS:r_pack2 LIBS:r_pack2
LIBS:v0402mhs03 LIBS:v0402mhs03
@ -334,46 +334,46 @@ Text GLabel 9850 2700 2 40 BiDi ~ 0
Text GLabel 9850 750 2 40 BiDi ~ 0 Text GLabel 9850 750 2 40 BiDi ~ 0
+2.8_VDDIO +2.8_VDDIO
$Comp $Comp
L GND #PWR07 L GND #PWR117
U 1 1 4C9E2BD7 U 1 1 4C9E2BD7
P 7950 2350 P 7950 2350
F 0 "#PWR07" H 7950 2350 30 0001 C CNN F 0 "#PWR117" H 7950 2350 30 0001 C CNN
F 1 "GND" H 7950 2280 30 0001 C CNN F 1 "GND" H 7950 2280 30 0001 C CNN
1 7950 2350 1 7950 2350
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR08 L GND #PWR118
U 1 1 4C9E2BD2 U 1 1 4C9E2BD2
P 7950 4250 P 7950 4250
F 0 "#PWR08" H 7950 4250 30 0001 C CNN F 0 "#PWR118" H 7950 4250 30 0001 C CNN
F 1 "GND" H 7950 4180 30 0001 C CNN F 1 "GND" H 7950 4180 30 0001 C CNN
1 7950 4250 1 7950 4250
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR09 L GND #PWR116
U 1 1 4C9E2BCC U 1 1 4C9E2BCC
P 2650 6150 P 2650 6150
F 0 "#PWR09" H 2650 6150 30 0001 C CNN F 0 "#PWR116" H 2650 6150 30 0001 C CNN
F 1 "GND" H 2650 6080 30 0001 C CNN F 1 "GND" H 2650 6080 30 0001 C CNN
1 2650 6150 1 2650 6150
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR010 L GND #PWR115
U 1 1 4C9E2BC8 U 1 1 4C9E2BC8
P 2650 4200 P 2650 4200
F 0 "#PWR010" H 2650 4200 30 0001 C CNN F 0 "#PWR115" H 2650 4200 30 0001 C CNN
F 1 "GND" H 2650 4130 30 0001 C CNN F 1 "GND" H 2650 4130 30 0001 C CNN
1 2650 4200 1 2650 4200
1 0 0 -1 1 0 0 -1
$EndComp $EndComp
$Comp $Comp
L GND #PWR011 L GND #PWR114
U 1 1 4C9E2BC2 U 1 1 4C9E2BC2
P 2650 2350 P 2650 2350
F 0 "#PWR011" H 2650 2350 30 0001 C CNN F 0 "#PWR114" H 2650 2350 30 0001 C CNN
F 1 "GND" H 2650 2280 30 0001 C CNN F 1 "GND" H 2650 2280 30 0001 C CNN
1 2650 2350 1 2650 2350
1 0 0 -1 1 0 0 -1

2
kicad/xue-rnc/xue-rnc-cache.lib
View File

@ -1,4 +1,4 @@
EESchema-LIBRARY Version 2.3 Date: Sun 10 Oct 2010 09:18:11 AM COT EESchema-LIBRARY Version 2.3 Date: Sun 10 Oct 2010 06:23:22 PM COT
# #
# +1.2V # +1.2V
# #

14600
kicad/xue-rnc/xue-rnc.brd
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File diff suppressed because it is too large Load Diff

2474
kicad/xue-rnc/xue-rnc.net
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File diff suppressed because it is too large Load Diff

2
kicad/xue-rnc/xue-rnc.pro
View File

@ -1,4 +1,4 @@
update=Sun 10 Oct 2010 09:18:02 AM COT update=Mon 11 Oct 2010 12:24:24 PM COT
version=1 version=1
last_client=pcbnew last_client=pcbnew
[common] [common]

805
kicad/xue-rnc/xue-rnc.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Sun 10 Oct 2010 09:18:11 AM COT EESchema Schematic File Version 2 date Sun 10 Oct 2010 06:23:22 PM COT
LIBS:power LIBS:power
LIBS:r_pack2 LIBS:r_pack2
LIBS:v0402mhs03 LIBS:v0402mhs03
@ -52,7 +52,7 @@ LIBS:m12-tu400a
LIBS:xue-rnc-cache LIBS:xue-rnc-cache
EELAYER 24 0 EELAYER 24 0
EELAYER END EELAYER END
$Descr A2 23400 16535 $Descr A3 16535 11700
Sheet 1 12 Sheet 1 12
Title "" Title ""
Date "10 oct 2010" Date "10 oct 2010"
@ -63,470 +63,453 @@ Comment2 ""
Comment3 "" Comment3 ""
Comment4 "" Comment4 ""
$EndDescr $EndDescr
Wire Bus Line
9550 5600 10900 5600
Wire Wire Line
5200 4050 6200 4050
Wire Wire Line
5200 3050 6200 3050
Wire Wire Line
5200 3850 6200 3850
Wire Wire Line
5200 3650 6200 3650
Wire Wire Line
6200 3450 5200 3450
Wire Wire Line
5200 3250 6200 3250
Wire Bus Line
6200 4550 5200 4550
Wire Wire Line
3400 4750 3650 4750
Wire Wire Line
3400 4450 3650 4450
Wire Wire Line
3400 4150 3650 4150
Wire Wire Line
10850 10100 9500 10100
Wire Wire Line
10850 9900 9500 9900
Wire Wire Line
6200 5750 5200 5750
Wire Wire Line
6200 5550 5200 5550
Wire Wire Line
10900 4600 9550 4600
Wire Wire Line
10900 4500 9550 4500
Wire Wire Line
10900 4150 9550 4150
Wire Wire Line
10900 3950 9550 3950
Wire Wire Line
10900 3850 9550 3850
Wire Bus Line
10900 4250 9550 4250
Wire Wire Line
10850 1300 9550 1300
Wire Wire Line
9550 3200 10900 3200
Wire Bus Line
10850 1800 9550 1800
Wire Bus Line
9550 2200 10850 2200
Wire Wire Line
10850 9500 9500 9500
Wire Wire Line
10850 9300 9500 9300
Wire Wire Line
9550 2500 10850 2500
Wire Wire Line
9550 2300 10850 2300
Wire Wire Line
9550 2100 10850 2100
Wire Wire Line
9550 1900 10850 1900
Wire Wire Line
9550 1600 10850 1600
Wire Wire Line
9550 1200 10850 1200
Wire Wire Line
9550 950 10850 950
Wire Bus Line
4950 6800 6200 6800
Wire Wire Line
4950 7200 6200 7200
Wire Wire Line
4950 7300 6200 7300
Wire Wire Line
4950 7500 6200 7500
Wire Wire Line
4950 8350 6200 8350
Wire Wire Line
4950 8200 6200 8200
Wire Wire Line
4950 8750 6200 8750
Wire Wire Line
4950 10250 6200 10250
Wire Wire Line
4950 9350 6200 9350
Wire Wire Line
4950 9650 6200 9650
Wire Bus Line
4950 9000 6200 9000
Wire Wire Line
4950 7850 6200 7850
Wire Wire Line
4950 9900 6200 9900
Wire Bus Line
4950 8900 6200 8900
Wire Bus Line
6200 8900 6200 8950
Wire Wire Line
4950 10000 6200 10000
Wire Wire Line
6200 7950 4950 7950
Wire Bus Line
4950 6900 6200 6900
Wire Wire Line
4950 9250 6200 9250
Wire Wire Line
4950 9550 6200 9550
Wire Wire Line
4950 10150 6200 10150
Wire Bus Line
4950 9100 6200 9100
Wire Wire Line
4950 10400 6200 10400
Wire Wire Line
4950 9800 6200 9800
Wire Wire Line
4950 8100 6200 8100
Wire Wire Line
4950 7750 6200 7750
Wire Wire Line
4950 7600 6200 7600
Wire Wire Line
4950 6650 6200 6650
Wire Bus Line
4950 7000 6200 7000
Wire Wire Line
9550 1100 10850 1100
Wire Wire Line
10850 1500 9550 1500
Wire Wire Line
9550 2000 10850 2000
Wire Wire Line
9550 2400 10850 2400
Wire Wire Line
10850 9200 9500 9200
Wire Wire Line
10850 9400 9500 9400
Wire Wire Line
10850 9600 9500 9600
Wire Wire Line
9550 3100 10900 3100
Wire Bus Line
9550 3300 10900 3300
Wire Wire Line
10850 1400 9550 1400
Wire Wire Line
9550 3750 10900 3750
Wire Wire Line
10900 4050 9550 4050
Wire Wire Line
10900 3650 9550 3650
Wire Bus Line
10900 4700 9550 4700
Wire Wire Line
6200 5450 5200 5450
Wire Wire Line
5200 5650 6200 5650
Wire Wire Line
10850 9800 9500 9800
Wire Wire Line
10850 10000 9500 10000
Wire Wire Line
10850 10200 9500 10200
Wire Wire Line
3400 4300 3650 4300
Wire Wire Line
3400 4600 3650 4600
Wire Wire Line
6200 3150 5200 3150
Wire Wire Line
5200 3350 6200 3350
Wire Wire Line
5200 3550 6200 3550
Wire Wire Line
5200 3750 6200 3750
Wire Wire Line
6200 2950 5200 2950
Wire Wire Line
5200 3950 6200 3950
Wire Wire Line
5200 4150 6200 4150
$Sheet $Sheet
S 14800 5850 1100 5850 S 10900 5250 1050 800
U 4CB0D95D U 4CB0D95D
F0 "FPGA GPIOS" 60 F0 "FPGA GPIOS" 60
F1 "expantion.sch" 60 F1 "expantion.sch" 60
$EndSheet $EndSheet
Wire Wire Line
9100 4950 10100 4950
Wire Wire Line
9100 4750 10100 4750
Wire Wire Line
10100 3750 9100 3750
Wire Wire Line
9100 4550 10100 4550
Wire Wire Line
9100 4350 10100 4350
Wire Wire Line
9100 4150 10100 4150
Wire Wire Line
10100 3950 9100 3950
Wire Wire Line
7300 5400 7550 5400
Wire Wire Line
7300 5100 7550 5100
Wire Wire Line
14750 13050 13400 13050
Wire Wire Line
14750 12850 13400 12850
Wire Wire Line
14750 12650 13400 12650
Wire Wire Line
9100 6950 10100 6950
Wire Wire Line
10100 6750 9100 6750
Wire Bus Line
14800 5500 13450 5500
Wire Wire Line
14800 4450 13450 4450
Wire Wire Line
14800 4850 13450 4850
Wire Wire Line
13450 4550 14800 4550
Wire Wire Line
14750 2200 13450 2200
Wire Bus Line
13450 4100 14800 4100
Wire Wire Line
13450 3900 14800 3900
Wire Wire Line
14750 12450 13400 12450
Wire Wire Line
14750 12250 13400 12250
Wire Wire Line
14750 12050 13400 12050
Wire Wire Line
13450 3200 14750 3200
Wire Wire Line
13450 2800 14750 2800
Wire Wire Line
14750 2300 13450 2300
Wire Wire Line
13450 1900 14750 1900
Wire Bus Line
8850 9850 10100 9850
Wire Wire Line
8850 9500 10100 9500
Wire Wire Line
8850 10450 10100 10450
Wire Wire Line
8850 10600 10100 10600
Wire Wire Line
8850 10950 10100 10950
Wire Wire Line
8850 12650 10100 12650
Wire Wire Line
8850 13250 10100 13250
Wire Bus Line
8850 11950 10100 11950
Wire Wire Line
8850 13000 10100 13000
Wire Wire Line
8850 12400 10100 12400
Wire Wire Line
8850 12100 10100 12100
Wire Bus Line
8850 9750 10100 9750
Wire Wire Line
10100 10800 8850 10800
Wire Wire Line
8850 12850 10100 12850
Wire Bus Line
10100 11800 10100 11750
Wire Bus Line
10100 11750 8850 11750
Wire Wire Line
8850 12750 10100 12750
Wire Wire Line
8850 10700 10100 10700
Wire Bus Line
8850 11850 10100 11850
Wire Wire Line
8850 12500 10100 12500
Wire Wire Line
8850 12200 10100 12200
Wire Wire Line
8850 13100 10100 13100
Wire Wire Line
8850 11600 10100 11600
Wire Wire Line
8850 11050 10100 11050
Wire Wire Line
8850 11200 10100 11200
Wire Wire Line
8850 10350 10100 10350
Wire Wire Line
8850 10150 10100 10150
Wire Wire Line
8850 10050 10100 10050
Wire Bus Line
8850 9650 10100 9650
Wire Wire Line
13450 1750 14750 1750
Wire Wire Line
13450 2000 14750 2000
Wire Wire Line
13450 2400 14750 2400
Wire Wire Line
13450 2700 14750 2700
Wire Wire Line
13450 2900 14750 2900
Wire Wire Line
13450 3100 14750 3100
Wire Wire Line
13450 3300 14750 3300
Wire Wire Line
14750 12150 13400 12150
Wire Wire Line
14750 12350 13400 12350
Wire Bus Line
13450 3000 14750 3000
Wire Bus Line
14750 2600 13450 2600
Wire Wire Line
13450 4000 14800 4000
Wire Wire Line
14750 2100 13450 2100
Wire Bus Line
14800 5050 13450 5050
Wire Wire Line
14800 4650 13450 4650
Wire Wire Line
14800 4750 13450 4750
Wire Wire Line
14800 4950 13450 4950
Wire Wire Line
14800 5300 13450 5300
Wire Wire Line
14800 5400 13450 5400
Wire Wire Line
10100 6850 9100 6850
Wire Wire Line
10100 7050 9100 7050
Wire Wire Line
14750 12750 13400 12750
Wire Wire Line
14750 12950 13400 12950
Wire Wire Line
7300 4950 7550 4950
Wire Wire Line
7300 5250 7550 5250
Wire Wire Line
7300 5550 7550 5550
Wire Bus Line
10100 5350 9100 5350
Wire Wire Line
9100 4050 10100 4050
Wire Wire Line
10100 4250 9100 4250
Wire Wire Line
9100 4450 10100 4450
Wire Wire Line
9100 4650 10100 4650
Wire Wire Line
9100 3850 10100 3850
Wire Wire Line
9100 4850 10100 4850
$Sheet $Sheet
S 7550 3650 1550 2050 S 3650 2850 1550 2050
U 4C9E2AF4 U 4C9E2AF4
F0 "Image Sensor" 60 F0 "Image Sensor" 60
F1 "sensor.sch" 60 F1 "sensor.sch" 60
F2 "+2.8_VDDIO" B L 7550 5100 60 F2 "+2.8_VDDIO" B L 3650 4300 60
F3 "+1.8_VDD" B L 7550 5250 60 F3 "+1.8_VDD" B L 3650 4450 60
F4 "+2.8_VAA" B L 7550 5550 60 F4 "+2.8_VAA" B L 3650 4750 60
F5 "+2.8_VAAPIX" B L 7550 5400 60 F5 "+2.8_VAAPIX" B L 3650 4600 60
F6 "+2.8_VDDPLL" B L 7550 4950 60 F6 "+2.8_VDDPLL" B L 3650 4150 60
F7 "IS_TRIGGER" I R 9100 3750 60 F7 "IS_TRIGGER" I R 5200 2950 60
F8 "IS_FLASH" O R 9100 3850 60 F8 "IS_FLASH" O R 5200 3050 60
F9 "IS_SDA" B R 9100 3950 60 F9 "IS_SDA" B R 5200 3150 60
F10 "IS_SCL" B R 9100 4050 60 F10 "IS_SCL" B R 5200 3250 60
F11 "IS_I2C_ADDR" I R 9100 4150 60 F11 "IS_I2C_ADDR" I R 5200 3350 60
F12 "IS_EXTCLK" I R 9100 4250 60 F12 "IS_EXTCLK" I R 5200 3450 60
F13 "IS_RESET_N" I R 9100 4350 60 F13 "IS_RESET_N" I R 5200 3550 60
F14 "IS_OE_N" I R 9100 4450 60 F14 "IS_OE_N" I R 5200 3650 60
F15 "IS_STANDBY" I R 9100 4550 60 F15 "IS_STANDBY" I R 5200 3750 60
F16 "IS_TEST" I R 9100 4650 60 F16 "IS_TEST" I R 5200 3850 60
F17 "IS_PIXEL" O R 9100 4750 60 F17 "IS_PIXEL" O R 5200 3950 60
F18 "IS_LINE" O R 9100 4850 60 F18 "IS_LINE" O R 5200 4050 60
F19 "IS_FRAME" O R 9100 4950 60 F19 "IS_FRAME" O R 5200 4150 60
F20 "IS_DOUT[0..11]" O R 9100 5350 60 F20 "IS_DOUT[0..11]" O R 5200 4550 60
$EndSheet $EndSheet
$Sheet $Sheet
S 6200 4650 1100 1000 S 2300 3850 1100 1000
U 4C9E2B0F U 4C9E2B0F
F0 "Snesor PSU" 60 F0 "Snesor PSU" 60
F1 "sensor_psu.sch" 60 F1 "sensor_psu.sch" 60
F2 "+2.8_VDDPLL" B R 7300 4950 60 F2 "+2.8_VDDPLL" B R 3400 4150 60
F3 "+2.8_VDDIO" B R 7300 5100 60 F3 "+2.8_VDDIO" B R 3400 4300 60
F4 "+1.8_VDD" B R 7300 5250 60 F4 "+1.8_VDD" B R 3400 4450 60
F5 "+2.8_VAAPIX" B R 7300 5400 60 F5 "+2.8_VAAPIX" B R 3400 4600 60
F6 "+2.8_VAA" B R 7300 5550 60 F6 "+2.8_VAA" B R 3400 4750 60
$EndSheet $EndSheet
$Sheet $Sheet
S 10100 1500 3350 6650 S 6200 700 3350 5450
U 4C7BC2B2 U 4C7BC2B2
F0 "FPGA, Port0, Port2, PROG IF" 60 F0 "FPGA, Port0, Port2, PROG IF" 60
F1 "FPGA_0_2_PROG.sch" 60 F1 "FPGA_0_2_PROG.sch" 60
F2 "S6_TCK" I L 10100 6750 60 F2 "S6_TCK" I L 6200 5450 60
F3 "S6_TDI" I L 10100 6850 60 F3 "S6_TDI" I L 6200 5550 60
F4 "S6_TDO" O L 10100 6950 60 F4 "S6_TDO" O L 6200 5650 60
F5 "S6_TMS" I L 10100 7050 60 F5 "S6_TMS" I L 6200 5750 60
F6 "PROG_MISO[0..3]" B R 13450 5500 60 F6 "PROG_MISO[0..3]" B R 9550 4700 60
F7 "PROG_CCLK" O R 13450 5400 60 F7 "PROG_CCLK" O R 9550 4600 60
F8 "PROG_CSO" O R 13450 5300 60 F8 "PROG_CSO" O R 9550 4500 60
F9 "NF_D[0..7]" B R 13450 5050 60 F9 "NF_D[0..7]" B R 9550 4250 60
F10 "ETH_COL" B R 13450 2200 60 F10 "ETH_COL" B R 9550 1400 60
F11 "ETH_CRS" B R 13450 2100 60 F11 "ETH_CRS" B R 9550 1300 60
F12 "NF_WE_N" O R 13450 4750 60 F12 "NF_WE_N" O R 9550 3950 60
F13 "NF_ALE" O R 13450 4550 60 F13 "NF_ALE" O R 9550 3750 60
F14 "NF_CLE" O R 13450 4650 60 F14 "NF_CLE" O R 9550 3850 60
F15 "NF_CS1_N" O R 13450 4450 60 F15 "NF_CS1_N" O R 9550 3650 60
F16 "NF_RE_N" O R 13450 4850 60 F16 "NF_RE_N" O R 9550 4050 60
F17 "NF_RNB" B R 13450 4950 60 F17 "NF_RNB" B R 9550 4150 60
F18 "SD_CLK" B R 13450 3900 60 F18 "SD_CLK" B R 9550 3100 60
F19 "SD_CMD" B R 13450 4000 60 F19 "SD_CMD" B R 9550 3200 60
F20 "SD_DAT[0..3]" B R 13450 4100 60 F20 "SD_DAT[0..3]" B R 9550 3300 60
F21 "ETH_CLK" B R 13450 3300 60 F21 "ETH_CLK" B R 9550 2500 60
F22 "ETH_RXC" B R 13450 1900 60 F22 "ETH_RXC" B R 9550 1100 60
F23 "ETH_TXC" B R 13450 2900 60 F23 "ETH_TXC" B R 9550 2100 60
F24 "ETH_TXD[0..3]" O R 13450 3000 60 F24 "ETH_TXD[0..3]" O R 9550 2200 60
F25 "ETH_TXEN" B R 13450 3100 60 F25 "ETH_TXEN" B R 9550 2300 60
F26 "ETH_TXER" B R 13450 3200 60 F26 "ETH_TXER" B R 9550 2400 60
F27 "ETH_RXER" B R 13450 2800 60 F27 "ETH_RXER" B R 9550 2000 60
F28 "ETH_RXDV" B R 13450 2700 60 F28 "ETH_RXDV" B R 9550 1900 60
F29 "ETH_RXD[0..3]" I R 13450 2600 60 F29 "ETH_RXD[0..3]" I R 9550 1800 60
F30 "ETH_RESET_N" B R 13450 2000 60 F30 "ETH_RESET_N" B R 9550 1200 60
F31 "ETH_MDIO" B R 13450 2300 60 F31 "ETH_MDIO" B R 9550 1500 60
F32 "ETH_MDC" B R 13450 2400 60 F32 "ETH_MDC" B R 9550 1600 60
F33 "ETH_INT" B R 13450 1750 60 F33 "ETH_INT" B R 9550 950 60
F34 "IS_DOUT[0..11]" I L 10100 5350 60 F34 "IS_DOUT[0..11]" I L 6200 4550 60
F35 "IS_TEST" O L 10100 4650 60 F35 "IS_TEST" O L 6200 3850 60
F36 "IS_STANDBY" O L 10100 4550 60 F36 "IS_STANDBY" O L 6200 3750 60
F37 "IS_OE_N" O L 10100 4450 60 F37 "IS_OE_N" O L 6200 3650 60
F38 "IS_RESET_N" O L 10100 4350 60 F38 "IS_RESET_N" O L 6200 3550 60
F39 "IS_EXTCLK" O L 10100 4250 60 F39 "IS_EXTCLK" O L 6200 3450 60
F40 "IS_I2C_ADDR" O L 10100 4150 60 F40 "IS_I2C_ADDR" O L 6200 3350 60
F41 "IS_SCL" B L 10100 4050 60 F41 "IS_SCL" B L 6200 3250 60
F42 "IS_SDA" B L 10100 3950 60 F42 "IS_SDA" B L 6200 3150 60
F43 "IS_FRAME" I L 10100 4950 60 F43 "IS_FRAME" I L 6200 4150 60
F44 "IS_LINE" I L 10100 4850 60 F44 "IS_LINE" I L 6200 4050 60
F45 "IS_PIXEL" I L 10100 4750 60 F45 "IS_PIXEL" I L 6200 3950 60
F46 "IS_FLASH" I L 10100 3850 60 F46 "IS_FLASH" I L 6200 3050 60
F47 "IS_TRIGGER" O L 10100 3750 60 F47 "IS_TRIGGER" O L 6200 2950 60
F48 "FPGA_VCCO2_IO_AA18" B R 13450 5950 60 F48 "FPGA_BANK0_IO_[0..64]" B R 9550 5600 60
F49 "FPGA_VCCO2_IO_AB21" B R 13450 6050 60
F50 "FPGA_VCCO2_IO_W18" B R 13450 6150 60
F51 "FPGA_VCCO2_IO_AB16" B R 13450 6250 60
F52 "FPGA_VCCO2_IO_AB15" B R 13450 6350 60
F53 "FPGA_VCCO2_IO_V7" B R 13450 6450 60
F54 "FPGA_VCCO2_IO_W6" B R 13450 6550 60
F55 "FPGA_VCCO2_IO_W4" B R 13450 6650 60
F56 "FPGA_VCCO2_IO_Y10" B R 13450 6750 60
F57 "FPGA_VCCO2_IO_Y9" B R 13450 6850 60
F58 "FPGA_VCCO2_IO_Y15" B R 13450 6950 60
F59 "FPGA_VCCO2_IO_Y16" B R 13450 7050 60
F60 "FPGA_VCCO2_IO_W10" B R 13450 7150 60
F61 "FPGA_VCCO2_IO_W11" B R 13450 7250 60
F62 "FPGA_VCCO2_IO_Y12" B R 13450 7350 60
F63 "FPGA_VCCO2_IO_AB14" B R 13450 7450 60
F64 "FPGA_VCCO2_IO_AB13" B R 13450 7550 60
F65 "FPGA_VCCO2_IO_Y11" B R 13450 7650 60
F66 "FPGA_VCCO2_IO_W8" B R 13450 7750 60
F67 "FPGA_VCCO2_IO_U9" B R 13450 7850 60
$EndSheet $EndSheet
$Sheet $Sheet
S 10100 9250 3300 4350 S 6200 6400 3300 4350
U 4C7BC2A2 U 4C7BC2A2
F0 "FPGA Port 1, Port 3 DDR, USB" 60 F0 "FPGA Port 1, Port 3 DDR, USB" 60
F1 "FPGA_1_3.sch" 60 F1 "FPGA_1_3.sch" 60
F2 "USBD_VP" B R 13400 12950 60 F2 "USBD_VP" B R 9500 10100 60
F3 "USBD_SPD" B R 13400 12650 60 F3 "USBD_SPD" B R 9500 9800 60
F4 "USBD_OE_N" B R 13400 12750 60 F4 "USBD_OE_N" B R 9500 9900 60
F5 "USBD_RCV" B R 13400 12850 60 F5 "USBD_RCV" B R 9500 10000 60
F6 "USBD_VM" B R 13400 13050 60 F6 "USBD_VM" B R 9500 10200 60
F7 "M0_CKE" O L 10100 12650 60 F7 "M0_CKE" O L 6200 9800 60
F8 "M0_UDM" O L 10100 12400 60 F8 "M0_UDM" O L 6200 9550 60
F9 "M0_UDQS" O L 10100 12100 60 F9 "M0_UDQS" O L 6200 9250 60
F10 "M0_BA[0..1]" O L 10100 11950 60 F10 "M0_BA[0..1]" O L 6200 9100 60
F11 "M0_CAS#" O L 10100 13000 60 F11 "M0_CAS#" O L 6200 10150 60
F12 "M0_RAS#" O L 10100 13100 60 F12 "M0_RAS#" O L 6200 10250 60
F13 "M0_WE#" O L 10100 13250 60 F13 "M0_WE#" O L 6200 10400 60
F14 "M0_LDM" O L 10100 12500 60 F14 "M0_LDM" O L 6200 9650 60
F15 "M0_LDQS" O L 10100 12200 60 F15 "M0_LDQS" O L 6200 9350 60
F16 "M1_UDQS" O L 10100 10050 60 F16 "M1_UDQS" O L 6200 7200 60
F17 "M1_UDM" O L 10100 10350 60 F17 "M1_UDM" O L 6200 7500 60
F18 "M1_LDQS" O L 10100 10150 60 F18 "M1_LDQS" O L 6200 7300 60
F19 "M1_LDM" O L 10100 10450 60 F19 "M1_LDM" O L 6200 7600 60
F20 "M1_WE#" O L 10100 11200 60 F20 "M1_WE#" O L 6200 8350 60
F21 "M1_CKE" O L 10100 10600 60 F21 "M1_CKE" O L 6200 7750 60
F22 "M1_RAS#" O L 10100 11050 60 F22 "M1_RAS#" O L 6200 8200 60
F23 "M1_CAS#" O L 10100 10950 60 F23 "M1_CAS#" O L 6200 8100 60
F24 "M1_BA[0..1]" O L 10100 9850 60 F24 "M1_BA[0..1]" O L 6200 7000 60
F25 "M1_CS#" O L 10100 9500 60 F25 "M1_CS#" O L 6200 6650 60
F26 "USBA_VM" B R 13400 12450 60 F26 "USBA_VM" B R 9500 9600 60
F27 "USBA_VP" B R 13400 12350 60 F27 "USBA_VP" B R 9500 9500 60
F28 "USBA_RCV" B R 13400 12250 60 F28 "USBA_RCV" B R 9500 9400 60
F29 "USBA_OE_N" B R 13400 12150 60 F29 "USBA_OE_N" B R 9500 9300 60
F30 "USBA_SPD" B R 13400 12050 60 F30 "USBA_SPD" B R 9500 9200 60
F31 "M1_DQ[0..15]" B L 10100 9650 60 F31 "M1_DQ[0..15]" B L 6200 6800 60
F32 "M0_CS#" O L 10100 11600 60 F32 "M0_CS#" O L 6200 8750 60
F33 "M0_DQ[0..15]" B L 10100 11750 60 F33 "M0_DQ[0..15]" B L 6200 8900 60
F34 "M0_A[0..12]" O L 10100 11850 60 F34 "M0_A[0..12]" O L 6200 9000 60
F35 "M1_A[0..12]" O L 10100 9750 60 F35 "M1_A[0..12]" O L 6200 6900 60
F36 "M1_CLK" O L 10100 10700 60 F36 "M1_CLK" O L 6200 7850 60
F37 "M1_CLK#" O L 10100 10800 60 F37 "M1_CLK#" O L 6200 7950 60
F38 "M0_CLK" O L 10100 12750 60 F38 "M0_CLK" O L 6200 9900 60
F39 "M0_CLK#" O L 10100 12850 60 F39 "M0_CLK#" O L 6200 10000 60
F40 "FPGA_2.5V_IO_M17" B R 13400 9900 60 F40 "FPGA_2.5V_IO_M17" B R 9500 7050 60
F41 "FPGA_2.5V_IO_N16" B R 13400 10000 60 F41 "FPGA_2.5V_IO_N16" B R 9500 7150 60
F42 "FPGA_2.5V_IO_P19" B R 13400 10100 60 F42 "FPGA_2.5V_IO_P19" B R 9500 7250 60
F43 "FPGA_2.5V_IO_P17" B R 13400 10200 60 F43 "FPGA_2.5V_IO_P17" B R 9500 7350 60
F44 "FPGA_2.5V_IO_P18" B R 13400 10300 60 F44 "FPGA_2.5V_IO_P18" B R 9500 7450 60
F45 "FPGA_2.5V_IO_U19" B R 13400 10400 60 F45 "FPGA_2.5V_IO_U19" B R 9500 7550 60
F46 "FPGA_2.5V_IO_T20" B R 13400 10500 60 F46 "FPGA_2.5V_IO_T20" B R 9500 7650 60
F47 "FPGA_2.5V_IO_V20" B R 13400 10600 60 F47 "FPGA_2.5V_IO_V20" B R 9500 7750 60
F48 "FPGA_2.5V_IO_W20" B R 13400 10700 60 F48 "FPGA_2.5V_IO_W20" B R 9500 7850 60
F49 "FPGA_2.5V_IO_W22" B R 13400 10800 60 F49 "FPGA_2.5V_IO_W22" B R 9500 7950 60
F50 "FPGA_2.5V_IO_V3" B R 13400 10900 60 F50 "FPGA_2.5V_IO_V3" B R 9500 8050 60
F51 "FPGA_2.5V_IO_U4" B R 13400 11000 60 F51 "FPGA_2.5V_IO_U4" B R 9500 8150 60
F52 "FPGA_2.5V_IO_T3" B R 13400 11100 60 F52 "FPGA_2.5V_IO_T3" B R 9500 8250 60
F53 "FPGA_2.5V_IO_T4" B R 13400 11200 60 F53 "FPGA_2.5V_IO_T4" B R 9500 8350 60
F54 "FPGA_2.5V_IO_P7" B R 13400 11300 60 F54 "FPGA_2.5V_IO_P7" B R 9500 8450 60
F55 "FPGA_2.5V_IO_P8" B R 13400 11400 60 F55 "FPGA_2.5V_IO_P8" B R 9500 8550 60
F56 "FPGA_2.5V_IO_W1" B R 13400 11500 60 F56 "FPGA_2.5V_IO_W1" B R 9500 8650 60
F57 "FPGA_2.5V_IO_W3" B R 13400 11600 60 F57 "FPGA_2.5V_IO_W3" B R 9500 8750 60
F58 "FPGA_2.5V_IO_Y1" B R 13400 11700 60 F58 "FPGA_2.5V_IO_Y1" B R 9500 8850 60
F59 "FPGA_2.5V_IO_Y2" B R 13400 11800 60 F59 "FPGA_2.5V_IO_Y2" B R 9500 8950 60
$EndSheet $EndSheet
$Sheet $Sheet
S 7900 6700 1200 700 S 4000 5400 1200 700
U 4C716A4D U 4C716A4D
F0 "DBG_PRG" 60 F0 "DBG_PRG" 60
F1 "DBG_PRG.sch" 60 F1 "DBG_PRG.sch" 60
F2 "FPGA_TDO" B R 9100 6950 60 F2 "FPGA_TDO" B R 5200 5650 60
F3 "FPGA_TDI" B R 9100 6850 60 F3 "FPGA_TDI" B R 5200 5550 60
F4 "FPGA_TMS" B R 9100 7050 60 F4 "FPGA_TMS" B R 5200 5750 60
F5 "FPGA_TCK" B R 9100 6750 60 F5 "FPGA_TCK" B R 5200 5450 60
$EndSheet $EndSheet
$Sheet $Sheet
S 7900 1750 1200 750 S 4000 950 1200 750
U 4C69ED5F U 4C69ED5F
F0 "PSU" 60 F0 "PSU" 60
F1 "PSU.sch" 60 F1 "PSU.sch" 60
$EndSheet $EndSheet
$Sheet $Sheet
S 14800 3700 1050 1950 S 10900 2900 1050 1950
U 4C4227FE U 4C4227FE
F0 "Non volatile memories" 60 F0 "Non volatile memories" 60
F1 "NV_MEMORIES.sch" 60 F1 "NV_MEMORIES.sch" 60
F2 "SD_CMD" I L 14800 4000 60 F2 "SD_CMD" I L 10900 3200 60
F3 "SD_CLK" I L 14800 3900 60 F3 "SD_CLK" I L 10900 3100 60
F4 "SD_DAT[0..3]" B L 14800 4100 60 F4 "SD_DAT[0..3]" B L 10900 3300 60
F5 "NF_D[0..7]" B L 14800 5050 60 F5 "NF_D[0..7]" B L 10900 4250 60
F6 "NF_ALE" B L 14800 4550 60 F6 "NF_ALE" B L 10900 3750 60
F7 "NF_CLE" B L 14800 4650 60 F7 "NF_CLE" B L 10900 3850 60
F8 "NF_WE_N" B L 14800 4750 60 F8 "NF_WE_N" B L 10900 3950 60
F9 "NF_CS1_N" B L 14800 4450 60 F9 "NF_CS1_N" B L 10900 3650 60
F10 "NF_RE_N" B L 14800 4850 60 F10 "NF_RE_N" B L 10900 4050 60
F11 "NF_RNB" B L 14800 4950 60 F11 "NF_RNB" B L 10900 4150 60
F12 "SPI_CLK" I L 14800 5400 60 F12 "SPI_CLK" I L 10900 4600 60
F13 "SPI_FLASH_CS#" I L 14800 5300 60 F13 "SPI_FLASH_CS#" I L 10900 4500 60
F14 "SPI_DQ[0..3]" B L 14800 5500 60 F14 "SPI_DQ[0..3]" B L 10900 4700 60
$EndSheet $EndSheet
$Sheet $Sheet
S 14750 12000 1100 1150 S 10850 9150 1100 1150
U 4C5F1EDC U 4C5F1EDC
F0 "USB" 60 F0 "USB" 60
F1 "USB.sch" 60 F1 "USB.sch" 60
F2 "USBA_SPD" B L 14750 12050 60 F2 "USBA_SPD" B L 10850 9200 60
F3 "USBA_OE_N" B L 14750 12150 60 F3 "USBA_OE_N" B L 10850 9300 60
F4 "USBA_RCV" B L 14750 12250 60 F4 "USBA_RCV" B L 10850 9400 60
F5 "USBA_VP" B L 14750 12350 60 F5 "USBA_VP" B L 10850 9500 60
F6 "USBA_VM" B L 14750 12450 60 F6 "USBA_VM" B L 10850 9600 60
F7 "USBD_SPD" B L 14750 12650 60 F7 "USBD_SPD" B L 10850 9800 60
F8 "USBD_OE_N" B L 14750 12750 60 F8 "USBD_OE_N" B L 10850 9900 60
F9 "USBD_RCV" B L 14750 12850 60 F9 "USBD_RCV" B L 10850 10000 60
F10 "USBD_VP" B L 14750 12950 60 F10 "USBD_VP" B L 10850 10100 60
F11 "USBD_VM" B L 14750 13050 60 F11 "USBD_VM" B L 10850 10200 60
$EndSheet $EndSheet
Text Notes 19700 15650 0 60 ~ 0 Text Notes 19700 15650 0 60 ~ 0
Copyright: Andres.Calderon@emQbit.com / Juan.Brinez@emQbit.com Copyright: Andres.Calderon@emQbit.com / Juan.Brinez@emQbit.com
$Sheet $Sheet
S 14750 1650 1300 1800 S 10850 850 1300 1800
U 4C4320F3 U 4C4320F3
F0 "Ethernet Phy" 60 F0 "Ethernet Phy" 60
F1 "eth_phy.sch" 60 F1 "eth_phy.sch" 60
F2 "ETH_RXC" O L 14750 1900 60 F2 "ETH_RXC" O L 10850 1100 60
F3 "ETH_RST_N" I L 14750 2000 60 F3 "ETH_RST_N" I L 10850 1200 60
F4 "ETH_CRS" O L 14750 2100 60 F4 "ETH_CRS" O L 10850 1300 60
F5 "ETH_COL" O L 14750 2200 60 F5 "ETH_COL" O L 10850 1400 60
F6 "ETH_MDIO" B L 14750 2300 60 F6 "ETH_MDIO" B L 10850 1500 60
F7 "ETH_MDC" I L 14750 2400 60 F7 "ETH_MDC" I L 10850 1600 60
F8 "ETH_RXD[0..3]" O L 14750 2600 60 F8 "ETH_RXD[0..3]" O L 10850 1800 60
F9 "ETH_RXDV" O L 14750 2700 60 F9 "ETH_RXDV" O L 10850 1900 60
F10 "ETH_RXER" O L 14750 2800 60 F10 "ETH_RXER" O L 10850 2000 60
F11 "ETH_TXC" B L 14750 2900 60 F11 "ETH_TXC" B L 10850 2100 60
F12 "ETH_TXD[0..3]" I L 14750 3000 60 F12 "ETH_TXD[0..3]" I L 10850 2200 60
F13 "ETH_TXEN" I L 14750 3100 60 F13 "ETH_TXEN" I L 10850 2300 60
F14 "ETH_TXER" I L 14750 3200 60 F14 "ETH_TXER" I L 10850 2400 60
F15 "ETH_CLK" I L 14750 3300 60 F15 "ETH_CLK" I L 10850 2500 60
F16 "ETH_INT" O L 14750 1750 60 F16 "ETH_INT" O L 10850 950 60
$EndSheet $EndSheet
$Sheet $Sheet
S 7750 9400 1100 4000 S 3850 6550 1100 4000
U 4C421DD3 U 4C421DD3
F0 "DDR Banks" 60 F0 "DDR Banks" 60
F1 "DRAM.sch" 60 F1 "DRAM.sch" 60
F2 "M0_BA[0..1]" I R 8850 11950 60 F2 "M0_BA[0..1]" I R 4950 9100 60
F3 "M1_BA[0..1]" I R 8850 9850 60 F3 "M1_BA[0..1]" I R 4950 7000 60
F4 "M0_WE#" I R 8850 13250 60 F4 "M0_WE#" I R 4950 10400 60
F5 "M0_RAS#" I R 8850 13100 60 F5 "M0_RAS#" I R 4950 10250 60
F6 "M1_RAS#" I R 8850 11050 60 F6 "M1_RAS#" I R 4950 8200 60
F7 "M1_WE#" I R 8850 11200 60 F7 "M1_WE#" I R 4950 8350 60
F8 "M0_CAS#" I R 8850 13000 60 F8 "M0_CAS#" I R 4950 10150 60
F9 "M0_CKE" I R 8850 12650 60 F9 "M0_CKE" I R 4950 9800 60
F10 "M0_CLK" I R 8850 12750 60 F10 "M0_CLK" I R 4950 9900 60
F11 "M0_CLK#" I R 8850 12850 60 F11 "M0_CLK#" I R 4950 10000 60
F12 "M0_CS#" I R 8850 11600 60 F12 "M0_CS#" I R 4950 8750 60
F13 "M1_CLK#" I R 8850 10800 60 F13 "M1_CLK#" I R 4950 7950 60
F14 "M1_CLK" I R 8850 10700 60 F14 "M1_CLK" I R 4950 7850 60
F15 "M1_CKE" I R 8850 10600 60 F15 "M1_CKE" I R 4950 7750 60
F16 "M1_CAS#" I R 8850 10950 60 F16 "M1_CAS#" I R 4950 8100 60
F17 "M0_DQ[0..15]" B R 8850 11750 60 F17 "M0_DQ[0..15]" B R 4950 8900 60
F18 "M0_UDM" I R 8850 12400 60 F18 "M0_UDM" I R 4950 9550 60
F19 "M0_LDQS" I R 8850 12200 60 F19 "M0_LDQS" I R 4950 9350 60
F20 "M0_A[0..12]" I R 8850 11850 60 F20 "M0_A[0..12]" I R 4950 9000 60
F21 "M0_LDM" I R 8850 12500 60 F21 "M0_LDM" I R 4950 9650 60
F22 "M0_UDQS" I R 8850 12100 60 F22 "M0_UDQS" I R 4950 9250 60
F23 "M1_UDQS" I R 8850 10050 60 F23 "M1_UDQS" I R 4950 7200 60
F24 "M1_LDM" I R 8850 10450 60 F24 "M1_LDM" I R 4950 7600 60
F25 "M1_LDQS" I R 8850 10150 60 F25 "M1_LDQS" I R 4950 7300 60
F26 "M1_UDM" I R 8850 10350 60 F26 "M1_UDM" I R 4950 7500 60
F27 "M1_CS#" I R 8850 9500 60 F27 "M1_CS#" I R 4950 6650 60
F28 "M1_A[0..12]" I R 8850 9750 60 F28 "M1_A[0..12]" I R 4950 6900 60
F29 "M1_DQ[0..15]" B R 8850 9650 60 F29 "M1_DQ[0..15]" B R 4950 6800 60
$EndSheet $EndSheet
$EndSCHEMATC $EndSCHEMATC