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Code

removed camera and camera_psu schematics pages

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This commit is contained in:
Wolfgang Spraul 2010-12-19 14:07:33 +00:00
parent fe25eaf1d5
commit a7a2fabfcb
11 changed files with 69 additions and 86 deletions
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11
xue-rnc/.gitignore vendored Normal file
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@ -0,0 +1,11 @@
dbg_prg.bak
ether.bak
expansion.bak
flash.bak
fpga1.bak
fpga2.bak
psu.bak
sdram.bak
usb.bak
xue-rnc-cache.lib
xue-rnc.bak

9
xue-rnc/dbg_prg.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 12 Nov 2010 06:20:49 PM COT
EESchema Schematic File Version 2 date Sun 19 Dec 2010 02:02:59 PM UTC
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03
@ -50,14 +50,15 @@ LIBS:reg102
LIBS:mt9m033
LIBS:m12-tu400a
LIBS:ft2232c
LIBS:fxo-hc536r
LIBS:zx62d-b-5p8
LIBS:xue-rnc-cache
LIBS:a7130
EELAYER 24 0
EELAYER END
$Descr A4 11700 8267
Sheet 7 12
Sheet 3 10
Title ""
Date "12 nov 2010"
Date "19 dec 2010"
Rev ""
Comp ""
Comment1 ""

10
xue-rnc/ether.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 12 Nov 2010 06:20:49 PM COT
EESchema Schematic File Version 2 date Sun 19 Dec 2010 02:02:59 PM UTC
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03
@ -50,13 +50,15 @@ LIBS:reg102
LIBS:mt9m033
LIBS:m12-tu400a
LIBS:ft2232c
LIBS:xue-rnc-cache
LIBS:fxo-hc536r
LIBS:zx62d-b-5p8
LIBS:a7130
EELAYER 24 0
EELAYER END
$Descr A4 11700 8267
Sheet 11 12
Sheet 11 10
Title ""
Date "12 nov 2010"
Date "19 dec 2010"
Rev ""
Comp ""
Comment1 ""

10
xue-rnc/expansion.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 12 Nov 2010 06:20:49 PM COT
EESchema Schematic File Version 2 date Sun 19 Dec 2010 02:02:59 PM UTC
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03
@ -50,13 +50,15 @@ LIBS:reg102
LIBS:mt9m033
LIBS:m12-tu400a
LIBS:ft2232c
LIBS:xue-rnc-cache
LIBS:fxo-hc536r
LIBS:zx62d-b-5p8
LIBS:a7130
EELAYER 24 0
EELAYER END
$Descr A4 11700 8267
Sheet 2 12
Sheet 2 10
Title ""
Date "12 nov 2010"
Date "19 dec 2010"
Rev ""
Comp ""
Comment1 ""

10
xue-rnc/flash.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 12 Nov 2010 06:20:49 PM COT
EESchema Schematic File Version 2 date Sun 19 Dec 2010 02:02:59 PM UTC
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03
@ -50,13 +50,15 @@ LIBS:reg102
LIBS:mt9m033
LIBS:m12-tu400a
LIBS:ft2232c
LIBS:xue-rnc-cache
LIBS:fxo-hc536r
LIBS:zx62d-b-5p8
LIBS:a7130
EELAYER 24 0
EELAYER END
$Descr A4 11700 8267
Sheet 9 12
Sheet 9 10
Title ""
Date "12 nov 2010"
Date "19 dec 2010"
Rev ""
Comp ""
Comment1 ""

10
xue-rnc/fpga1.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 12 Nov 2010 06:20:49 PM COT
EESchema Schematic File Version 2 date Sun 19 Dec 2010 02:02:59 PM UTC
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03
@ -50,13 +50,15 @@ LIBS:reg102
LIBS:mt9m033
LIBS:m12-tu400a
LIBS:ft2232c
LIBS:xue-rnc-cache
LIBS:fxo-hc536r
LIBS:zx62d-b-5p8
LIBS:a7130
EELAYER 24 0
EELAYER END
$Descr A3 16535 11700
Sheet 5 12
Sheet 5 10
Title ""
Date "12 nov 2010"
Date "19 dec 2010"
Rev ""
Comp ""
Comment1 ""

10
xue-rnc/fpga2.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 12 Nov 2010 06:20:49 PM COT
EESchema Schematic File Version 2 date Sun 19 Dec 2010 02:02:59 PM UTC
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03
@ -50,13 +50,15 @@ LIBS:reg102
LIBS:mt9m033
LIBS:m12-tu400a
LIBS:ft2232c
LIBS:xue-rnc-cache
LIBS:fxo-hc536r
LIBS:zx62d-b-5p8
LIBS:a7130
EELAYER 24 0
EELAYER END
$Descr A3 16535 11700
Sheet 6 12
Sheet 6 10
Title ""
Date "12 nov 2010"
Date "19 dec 2010"
Rev ""
Comp ""
Comment1 ""

9
xue-rnc/psu.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 12 Nov 2010 06:20:49 PM COT
EESchema Schematic File Version 2 date Sun 19 Dec 2010 02:02:59 PM UTC
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03
@ -50,14 +50,15 @@ LIBS:reg102
LIBS:mt9m033
LIBS:m12-tu400a
LIBS:ft2232c
LIBS:fxo-hc536r
LIBS:zx62d-b-5p8
LIBS:a7130
LIBS:xue-rnc-cache
EELAYER 24 0
EELAYER END
$Descr A4 11700 8267
Sheet 8 12
Sheet 8 10
Title ""
Date "12 nov 2010"
Date "19 dec 2010"
Rev ""
Comp ""
Comment1 ""

10
xue-rnc/sdram.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 12 Nov 2010 06:20:49 PM COT
EESchema Schematic File Version 2 date Sun 19 Dec 2010 02:02:59 PM UTC
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03
@ -50,13 +50,15 @@ LIBS:reg102
LIBS:mt9m033
LIBS:m12-tu400a
LIBS:ft2232c
LIBS:xue-rnc-cache
LIBS:fxo-hc536r
LIBS:zx62d-b-5p8
LIBS:a7130
EELAYER 24 0
EELAYER END
$Descr A4 11700 8267
Sheet 9 12
Sheet 9 10
Title ""
Date "12 nov 2010"
Date "19 dec 2010"
Rev ""
Comp ""
Comment1 ""

10
xue-rnc/usb.sch
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@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 12 Nov 2010 06:20:49 PM COT
EESchema Schematic File Version 2 date Sun 19 Dec 2010 02:02:59 PM UTC
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03
@ -50,13 +50,15 @@ LIBS:reg102
LIBS:mt9m033
LIBS:m12-tu400a
LIBS:ft2232c
LIBS:xue-rnc-cache
LIBS:fxo-hc536r
LIBS:zx62d-b-5p8
LIBS:a7130
EELAYER 24 0
EELAYER END
$Descr A4 11700 8267
Sheet 10 12
Sheet 10 10
Title ""
Date "12 nov 2010"
Date "19 dec 2010"
Rev ""
Comp ""
Comment1 ""

56
xue-rnc/xue-rnc.sch
View File

@ -1,4 +1,4 @@
EESchema Schematic File Version 2 date Fri 12 Nov 2010 06:20:49 PM COT
EESchema Schematic File Version 2 date Sun 19 Dec 2010 02:02:59 PM UTC
LIBS:power
LIBS:r_pack2
LIBS:v0402mhs03
@ -50,13 +50,15 @@ LIBS:reg102
LIBS:mt9m033
LIBS:m12-tu400a
LIBS:ft2232c
LIBS:xue-rnc-cache
LIBS:fxo-hc536r
LIBS:zx62d-b-5p8
LIBS:a7130
EELAYER 24 0
EELAYER END
$Descr A3 16535 11700
Sheet 1 12
Sheet 1 10
Title ""
Date "12 nov 2010"
Date "19 dec 2010"
Rev ""
Comp ""
Comment1 ""
@ -92,12 +94,6 @@ Wire Wire Line
5200 3250 6200 3250
Wire Bus Line
6200 4550 5200 4550
Wire Wire Line
3400 4750 3650 4750
Wire Wire Line
3400 4450 3650 4450
Wire Wire Line
3400 4150 3650 4150
Wire Wire Line
10850 10100 9500 10100
Wire Wire Line
@ -240,10 +236,6 @@ Wire Wire Line
10850 10000 9500 10000
Wire Wire Line
10850 10200 9500 10200
Wire Wire Line
3400 4300 3650 4300
Wire Wire Line
3400 4600 3650 4600
Wire Wire Line
6200 3150 5200 3150
Wire Wire Line
@ -488,40 +480,4 @@ F0 "expansion" 60
F1 "expansion.sch" 60
F2 "FPGA_BANK0_IO_[0..64]" B L 10900 5600 60
$EndSheet
$Sheet
S 2300 3850 1100 1000
U 4C9E2B0F
F0 "camera_psu" 60
F1 "camera_psu.sch" 60
F2 "+2.8_VDDPLL" B R 3400 4150 60
F3 "+2.8_VDDIO" B R 3400 4300 60
F4 "+1.8_VDD" B R 3400 4450 60
F5 "+2.8_VAAPIX" B R 3400 4600 60
F6 "+2.8_VAA" B R 3400 4750 60
$EndSheet
$Sheet
S 3650 2850 1550 2050
U 4C9E2AF4
F0 "camera" 60
F1 "camera.sch" 60
F2 "+2.8_VDDIO" B L 3650 4300 60
F3 "+1.8_VDD" B L 3650 4450 60
F4 "+2.8_VAA" B L 3650 4750 60
F5 "+2.8_VAAPIX" B L 3650 4600 60
F6 "+2.8_VDDPLL" B L 3650 4150 60
F7 "IS_TRIGGER" I R 5200 2950 60
F8 "IS_FLASH" O R 5200 3050 60
F9 "IS_SDA" B R 5200 3150 60
F10 "IS_SCL" B R 5200 3250 60
F11 "IS_I2C_ADDR" I R 5200 3350 60
F12 "IS_EXTCLK" I R 5200 3450 60
F13 "IS_RESET_N" I R 5200 3550 60
F14 "IS_OE_N" I R 5200 3650 60
F15 "IS_STANDBY" I R 5200 3750 60
F16 "IS_TEST" I R 5200 3850 60
F17 "IS_PIXEL" O R 5200 3950 60
F18 "IS_LINE" O R 5200 4050 60
F19 "IS_FRAME" O R 5200 4150 60
F20 "IS_DOUT[0..11]" O R 5200 4550 60
$EndSheet
$EndSCHEMATC