From ef75347b57fd10d1caadbd560f36ea41b125f8cf Mon Sep 17 00:00:00 2001 From: Andres Calderon Date: Fri, 13 Aug 2010 15:42:35 -0500 Subject: [PATCH] spi memory added --- kicad/library/x25x64mb.lib | 21 + kicad/xue-rnc/DRAM.sch | 123 +- kicad/xue-rnc/FPGA.sch | 378 ++---- kicad/xue-rnc/NV_MEMORIES.sch | 316 +++-- kicad/xue-rnc/USB.sch | 108 +- kicad/xue-rnc/eth_phy.sch | 47 +- kicad/xue-rnc/xue-rnc-cache.lib | 20 +- kicad/xue-rnc/xue-rnc.brd | 2151 +++++++++++++++++-------------- kicad/xue-rnc/xue-rnc.cmp | 17 +- kicad/xue-rnc/xue-rnc.net | 703 +++++----- kicad/xue-rnc/xue-rnc.pro | 165 +-- kicad/xue-rnc/xue-rnc.sch | 313 +++-- 12 files changed, 2380 insertions(+), 1982 deletions(-) create mode 100644 kicad/library/x25x64mb.lib diff --git a/kicad/library/x25x64mb.lib b/kicad/library/x25x64mb.lib new file mode 100644 index 0000000..64ee21d --- /dev/null +++ b/kicad/library/x25x64mb.lib @@ -0,0 +1,21 @@ +EESchema-LIBRARY Version 2.3 Date: Fri 13 Aug 2010 03:12:42 PM COT +# +# X25X64MB +# +DEF X25X64MB U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "X25X64MB" 0 -150 60 H V C CNN +DRAW +S 550 -250 -550 250 0 1 0 f +X CE# 1 -850 100 300 R 50 50 1 1 I I +X SO 2 -850 0 300 R 50 50 1 1 O +X WP# 3 -850 -100 300 R 50 50 1 1 O I +X Vss 4 -850 -200 300 R 50 50 1 1 W +X SI 5 850 -150 300 L 50 50 1 1 I +X SCK 6 850 -50 300 L 50 50 1 1 I C +X RST# 7 850 50 300 L 50 50 1 1 I I +X Vdd 8 850 150 300 L 50 50 1 1 W +ENDDRAW +ENDDEF +# +#End Library diff --git a/kicad/xue-rnc/DRAM.sch b/kicad/xue-rnc/DRAM.sch index 8180ecb..e70f70e 100644 --- a/kicad/xue-rnc/DRAM.sch +++ b/kicad/xue-rnc/DRAM.sch @@ -1,5 +1,48 @@ -EESchema Schematic File Version 2 date Fri 13 Aug 2010 11:23:32 AM COT -LIBS:power,../library/v0402mhs03,../library/usb-48204-0001,../library/microsmd075f,../library/mic2550ayts,../library/rj45-48025,../library/xue-nv,../library/xc6slx75fgg484,../library/xc6slx45fgg484,../library/micron_mobile_ddr,../library/micron_ddr_512Mb,../library/k8001,device,transistors,conn,linear,regul,74xx,cmos4000,adc-dac,memory,xilinx,special,microcontrollers,dsp,microchip,analog_switches,motorola,texas,intel,audio,interface,digital-audio,philips,display,cypress,siliconi,opto,atmel,contrib,valves,../library/pasives-connectors,./xue-rnc.cache +EESchema Schematic File Version 2 date Fri 13 Aug 2010 03:41:42 PM COT +LIBS:power +LIBS:v0402mhs03 +LIBS:usb-48204-0001 +LIBS:microsmd075f +LIBS:mic2550ayts +LIBS:rj45-48025 +LIBS:xue-nv +LIBS:xc6slx75fgg484 +LIBS:xc6slx45fgg484 +LIBS:micron_mobile_ddr +LIBS:micron_ddr_512Mb +LIBS:k8001 +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:pasives-connectors +LIBS:x25x64mb +LIBS:xue-rnc-cache EELAYER 24 0 EELAYER END $Descr A4 11700 8267 @@ -13,22 +56,6 @@ Comment2 "" Comment3 "" Comment4 "" $EndDescr -Kmarq B 4200 2750 "Warning Pin passive Unconnected" F=1 -Kmarq B 4200 2850 "Warning Pin passive Unconnected" F=1 -Kmarq B 4200 2950 "Warning Pin passive Unconnected" F=1 -Kmarq B 4200 3050 "Warning Pin passive Unconnected" F=1 -Kmarq B 4200 3150 "Warning Pin passive Unconnected" F=1 -Kmarq B 4200 3250 "Warning Pin passive Unconnected" F=1 -Kmarq B 4200 3350 "Warning Pin passive Unconnected" F=1 -Kmarq B 9450 2750 "Warning Pin passive Unconnected" F=1 -Kmarq B 9450 2850 "Warning Pin passive Unconnected" F=1 -Kmarq B 9450 2950 "Warning Pin passive Unconnected" F=1 -Kmarq B 9450 3050 "Warning Pin passive Unconnected" F=1 -Kmarq B 9450 3150 "Warning Pin passive Unconnected" F=1 -Kmarq B 9450 3250 "Warning Pin passive Unconnected" F=1 -Kmarq B 9450 3350 "Warning Pin passive Unconnected" F=1 -Kmarq B 6900 5800 "Warning Pin power_in not driven (Net 50)" F=1 -Kmarq B 6900 6200 "Warning Pin power_in not driven (Net 37)" F=1 Text Notes 8000 7300 0 60 ~ 0 Copyright: Andres.Calderon@emQbit.com / Juan.Brinez@emQbit.com Wire Bus Line @@ -468,43 +495,43 @@ L CAP C34 U 1 1 4C61D1D4 P 6900 6000 F 0 "C34" H 6950 6100 50 0000 L CNN -F 1 "1uF" H 6950 5900 50 0000 L CNN +F 1 "10uF" H 6950 5900 50 0000 L CNN F 2 "1206" H 6900 6000 60 0001 C CNN 1 6900 6000 1 0 0 -1 $EndComp $Comp -L GND #PWR038 +L GND #PWR9 U 1 1 4C61D1D3 P 6900 6200 -F 0 "#PWR038" H 6900 6200 30 0001 C CNN +F 0 "#PWR9" H 6900 6200 30 0001 C CNN F 1 "GND" H 6900 6130 30 0001 C CNN 1 6900 6200 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR039 +L +2.5V #PWR8 U 1 1 4C61D1D2 P 6900 5800 -F 0 "#PWR039" H 6900 5750 20 0001 C CNN +F 0 "#PWR8" H 6900 5750 20 0001 C CNN F 1 "+2.5V" H 6900 5900 30 0000 C CNN 1 6900 5800 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR040 +L +2.5V #PWR1 U 1 1 4C61D192 P 1700 5800 -F 0 "#PWR040" H 1700 5750 20 0001 C CNN +F 0 "#PWR1" H 1700 5750 20 0001 C CNN F 1 "+2.5V" H 1700 5900 30 0000 C CNN 1 1700 5800 1 0 0 -1 $EndComp $Comp -L GND #PWR041 +L GND #PWR2 U 1 1 4C61D17F P 1700 6200 -F 0 "#PWR041" H 1700 6200 30 0001 C CNN +F 0 "#PWR2" H 1700 6200 30 0001 C CNN F 1 "GND" H 1700 6130 30 0001 C CNN 1 1700 6200 1 0 0 -1 @@ -514,25 +541,25 @@ L CAP C33 U 1 1 4C61D151 P 1700 6000 F 0 "C33" H 1750 6100 50 0000 L CNN -F 1 "1uF" H 1750 5900 50 0000 L CNN +F 1 "10uF" H 1750 5900 50 0000 L CNN F 2 "1206" H 1700 6000 60 0001 C CNN 1 1700 6000 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR042 +L +2.5V #PWR4 U 1 1 4C61CFCF P 3050 1750 -F 0 "#PWR042" H 3050 1700 20 0001 C CNN +F 0 "#PWR4" H 3050 1700 20 0001 C CNN F 1 "+2.5V" H 3050 1850 30 0000 C CNN 1 3050 1750 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR043 +L +2.5V #PWR11 U 1 1 4C61CFC6 P 8300 1750 -F 0 "#PWR043" H 8300 1700 20 0001 C CNN +F 0 "#PWR11" H 8300 1700 20 0001 C CNN F 1 "+2.5V" H 8300 1850 30 0000 C CNN 1 8300 1750 1 0 0 -1 @@ -598,37 +625,37 @@ F 2 "0603" H 7450 6000 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR044 +L +2.5V #PWR12 U 1 1 4C61CF9F P 8300 5750 -F 0 "#PWR044" H 8300 5700 20 0001 C CNN +F 0 "#PWR12" H 8300 5700 20 0001 C CNN F 1 "+2.5V" H 8300 5850 30 0000 C CNN 1 8300 5750 1 0 0 -1 $EndComp $Comp -L GND #PWR045 +L GND #PWR13 U 1 1 4C61CF9E P 8300 6350 -F 0 "#PWR045" H 8300 6350 30 0001 C CNN +F 0 "#PWR13" H 8300 6350 30 0001 C CNN F 1 "GND" H 8300 6280 30 0001 C CNN 1 8300 6350 1 0 0 -1 $EndComp $Comp -L GND #PWR046 +L GND #PWR6 U 1 1 4C61CF90 P 3050 6350 -F 0 "#PWR046" H 3050 6350 30 0001 C CNN +F 0 "#PWR6" H 3050 6350 30 0001 C CNN F 1 "GND" H 3050 6280 30 0001 C CNN 1 3050 6350 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR047 +L +2.5V #PWR5 U 1 1 4C61CF89 P 3050 5750 -F 0 "#PWR047" H 3050 5700 20 0001 C CNN +F 0 "#PWR5" H 3050 5700 20 0001 C CNN F 1 "+2.5V" H 3050 5850 30 0000 C CNN 1 3050 5750 1 0 0 -1 @@ -714,19 +741,19 @@ F 2 "0402" H 9850 1850 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR048 +L +2.5V #PWR14 U 1 1 4C61CE2F P 9850 1000 -F 0 "#PWR048" H 9850 950 20 0001 C CNN +F 0 "#PWR14" H 9850 950 20 0001 C CNN F 1 "+2.5V" H 9850 1100 30 0000 C CNN 1 9850 1000 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR049 +L +2.5V #PWR7 U 1 1 4C61CDF1 P 4550 900 -F 0 "#PWR049" H 4550 850 20 0001 C CNN +F 0 "#PWR7" H 4550 850 20 0001 C CNN F 1 "+2.5V" H 4550 1000 30 0000 C CNN 1 4550 900 1 0 0 -1 @@ -818,10 +845,10 @@ $EndComp Text HLabel 4950 5350 2 60 BiDi ~ 0 M0_DQ[0..15] $Comp -L GND #PWR050 +L GND #PWR3 U 1 1 4C58A712 P 3000 5200 -F 0 "#PWR050" H 3000 5200 30 0001 C CNN +F 0 "#PWR3" H 3000 5200 30 0001 C CNN F 1 "GND" H 3000 5130 30 0001 C CNN 1 3000 5200 1 0 0 -1 @@ -1115,10 +1142,10 @@ Entry Wire Line Entry Wire Line 9950 3650 10050 3750 $Comp -L GND #PWR051 +L GND #PWR10 U 1 1 4C437C3F P 8250 5200 -F 0 "#PWR051" H 8250 5200 30 0001 C CNN +F 0 "#PWR10" H 8250 5200 30 0001 C CNN F 1 "GND" H 8250 5130 30 0001 C CNN 1 8250 5200 1 0 0 -1 diff --git a/kicad/xue-rnc/FPGA.sch b/kicad/xue-rnc/FPGA.sch index a1d4f67..16ce348 100644 --- a/kicad/xue-rnc/FPGA.sch +++ b/kicad/xue-rnc/FPGA.sch @@ -1,9 +1,52 @@ -EESchema Schematic File Version 2 date Fri 13 Aug 2010 11:23:32 AM COT -LIBS:power,../library/v0402mhs03,../library/usb-48204-0001,../library/microsmd075f,../library/mic2550ayts,../library/rj45-48025,../library/xue-nv,../library/xc6slx75fgg484,../library/xc6slx45fgg484,../library/micron_mobile_ddr,../library/micron_ddr_512Mb,../library/k8001,device,transistors,conn,linear,regul,74xx,cmos4000,adc-dac,memory,xilinx,special,microcontrollers,dsp,microchip,analog_switches,motorola,texas,intel,audio,interface,digital-audio,philips,display,cypress,siliconi,opto,atmel,contrib,valves,../library/pasives-connectors,./xue-rnc.cache +EESchema Schematic File Version 2 date Fri 13 Aug 2010 03:41:42 PM COT +LIBS:power +LIBS:v0402mhs03 +LIBS:usb-48204-0001 +LIBS:microsmd075f +LIBS:mic2550ayts +LIBS:rj45-48025 +LIBS:xue-nv +LIBS:xc6slx75fgg484 +LIBS:xc6slx45fgg484 +LIBS:micron_mobile_ddr +LIBS:micron_ddr_512Mb +LIBS:k8001 +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:pasives-connectors +LIBS:x25x64mb +LIBS:xue-rnc-cache EELAYER 24 0 EELAYER END $Descr A2 23400 16535 -Sheet 3 6 +Sheet 4 6 Title "" Date "13 aug 2010" Rev "" @@ -13,6 +56,12 @@ Comment2 "" Comment3 "" Comment4 "" $EndDescr +Wire Wire Line + 18000 7750 17650 7750 +Wire Wire Line + 17650 7550 18000 7550 +Wire Wire Line + 17650 7350 18000 7350 Wire Notes Line 1050 12800 6450 12800 Wire Notes Line @@ -1033,6 +1082,12 @@ Wire Wire Line Wire Wire Line 5700 13650 5700 13600 Connection ~ 5350 13650 +Wire Wire Line + 18000 7250 17650 7250 +Wire Wire Line + 18000 7450 17650 7450 +Wire Wire Line + 18000 7650 17650 7650 $Comp L C C66 U 1 1 4C656D9D @@ -1043,19 +1098,19 @@ F 1 "470nF" H 5750 13300 50 0000 L CNN 1 0 0 -1 $EndComp $Comp -L +3.3V #PWR013 +L +3.3V #PWR28 U 1 1 4C656D9C P 4300 13100 -F 0 "#PWR013" H 4300 13060 30 0001 C CNN +F 0 "#PWR28" H 4300 13060 30 0001 C CNN F 1 "+3.3V" H 4300 13210 30 0000 C CNN 1 4300 13100 1 0 0 -1 $EndComp $Comp -L GND #PWR014 +L GND #PWR29 U 1 1 4C656D9B P 4300 13700 -F 0 "#PWR014" H 4300 13700 30 0001 C CNN +F 0 "#PWR29" H 4300 13700 30 0001 C CNN F 1 "GND" H 4300 13630 30 0001 C CNN 1 4300 13700 1 0 0 -1 @@ -1117,19 +1172,19 @@ F 1 "470nF" H 5750 14150 50 0000 L CNN 1 0 0 -1 $EndComp $Comp -L +3.3V #PWR015 +L +3.3V #PWR30 U 1 1 4C656D48 P 4300 13950 -F 0 "#PWR015" H 4300 13910 30 0001 C CNN +F 0 "#PWR30" H 4300 13910 30 0001 C CNN F 1 "+3.3V" H 4300 14060 30 0000 C CNN 1 4300 13950 1 0 0 -1 $EndComp $Comp -L GND #PWR016 +L GND #PWR31 U 1 1 4C656D47 P 4300 14550 -F 0 "#PWR016" H 4300 14550 30 0001 C CNN +F 0 "#PWR31" H 4300 14550 30 0001 C CNN F 1 "GND" H 4300 14480 30 0001 C CNN 1 4300 14550 1 0 0 -1 @@ -1182,19 +1237,19 @@ F 1 "470nF" H 5750 15000 50 0000 L CNN 1 0 0 -1 $EndComp $Comp -L +3.3V #PWR017 +L +3.3V #PWR32 U 1 1 4C656D01 P 4300 14800 -F 0 "#PWR017" H 4300 14760 30 0001 C CNN +F 0 "#PWR32" H 4300 14760 30 0001 C CNN F 1 "+3.3V" H 4300 14910 30 0000 C CNN 1 4300 14800 1 0 0 -1 $EndComp $Comp -L GND #PWR018 +L GND #PWR33 U 1 1 4C656CFD P 4300 15400 -F 0 "#PWR018" H 4300 15400 30 0001 C CNN +F 0 "#PWR33" H 4300 15400 30 0001 C CNN F 1 "GND" H 4300 15330 30 0001 C CNN 1 4300 15400 1 0 0 -1 @@ -1238,19 +1293,19 @@ F 1 "100uF" H 4350 15000 50 0000 L CNN 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR019 +L +2.5V #PWR25 U 1 1 4C656CC3 P 1350 14800 -F 0 "#PWR019" H 1350 14750 20 0001 C CNN +F 0 "#PWR25" H 1350 14750 20 0001 C CNN F 1 "+2.5V" H 1350 14900 30 0000 C CNN 1 1350 14800 1 0 0 -1 $EndComp $Comp -L GND #PWR020 +L GND #PWR26 U 1 1 4C656CBC P 1350 15400 -F 0 "#PWR020" H 1350 15400 30 0001 C CNN +F 0 "#PWR26" H 1350 15400 30 0001 C CNN F 1 "GND" H 1350 15330 30 0001 C CNN 1 1350 15400 1 0 0 -1 @@ -1296,10 +1351,10 @@ $EndComp Text Notes 1450 14000 0 30 ~ 0 VCC_AUX Decoupling Capacitors (7) $Comp -L GND #PWR021 +L GND #PWR24 U 1 1 4C656C68 P 1350 14600 -F 0 "#PWR021" H 1350 14600 30 0001 C CNN +F 0 "#PWR24" H 1350 14600 30 0001 C CNN F 1 "GND" H 1350 14530 30 0001 C CNN 1 1350 14600 1 0 0 -1 @@ -1368,19 +1423,19 @@ F 1 "100uF" H 1400 14200 50 0000 L CNN 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR022 +L +2.5V #PWR23 U 1 1 4C656BBA P 1350 14000 -F 0 "#PWR022" H 1350 13950 20 0001 C CNN +F 0 "#PWR23" H 1350 13950 20 0001 C CNN F 1 "+2.5V" H 1350 14100 30 0000 C CNN 1 1350 14000 1 0 0 -1 $EndComp $Comp -L GND #PWR023 +L GND #PWR22 U 1 1 4C656BA8 P 1350 13800 -F 0 "#PWR023" H 1350 13800 30 0001 C CNN +F 0 "#PWR22" H 1350 13800 30 0001 C CNN F 1 "GND" H 1350 13730 30 0001 C CNN 1 1350 13800 1 0 0 -1 @@ -1415,10 +1470,10 @@ F 1 "4.7uF" H 1750 13400 50 0000 L CNN 1 0 0 -1 $EndComp $Comp -L +1.2V #PWR024 +L +1.2V #PWR21 U 1 1 4C656AA1 P 1350 13200 -F 0 "#PWR024" H 1350 13340 20 0001 C CNN +F 0 "#PWR21" H 1350 13340 20 0001 C CNN F 1 "+1.2V" H 1350 13310 30 0000 C CNN 1 1350 13200 1 0 0 -1 @@ -1432,231 +1487,6 @@ F 1 "100uF" H 1400 13400 50 0000 L CNN 1 1350 13500 1 0 0 -1 $EndComp -Kmarq B 14250 8750 "Warning Pin passive Unconnected" F=1 -Kmarq B 17650 7250 "Warning Pin passive Unconnected" F=1 -Kmarq B 17650 7350 "Warning Pin passive Unconnected" F=1 -Kmarq B 17650 7450 "Warning Pin passive Unconnected" F=1 -Kmarq B 17650 7550 "Warning Pin passive Unconnected" F=1 -Kmarq B 17650 7650 "Warning Pin passive Unconnected" F=1 -Kmarq B 17650 7750 "Warning Pin passive Unconnected" F=1 -Kmarq B 17650 7850 "Warning Pin passive Unconnected" F=1 -Kmarq B 17650 7950 "Warning Pin passive Unconnected" F=1 -Kmarq B 17650 8050 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 1150 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 1250 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 1350 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 1450 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 1550 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 1650 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 1750 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 1850 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 1950 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 2050 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 2150 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 2250 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 2350 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 2450 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 2550 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 2650 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 3550 "Warning Pin passive Unconnected" F=1 -Kmarq B 13900 4550 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 1150 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 1250 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 1850 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 1950 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 2050 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 2150 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 2250 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 2350 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 2450 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 2550 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 2650 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 2750 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 2850 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 2950 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 3050 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 3550 "Warning Pin passive Unconnected" F=1 -Kmarq B 18300 4550 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 1200 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 1300 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 1400 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 1500 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 1600 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 1700 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 1800 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 1900 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 2000 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 2100 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 2200 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 2300 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 2400 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 2500 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 2600 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 2700 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 2800 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 2900 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 3000 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 3100 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 3200 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 3300 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 3400 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 4000 "Warning Pin passive Unconnected" F=1 -Kmarq B 3200 5000 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 1300 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 1400 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 1500 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 1600 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 1700 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 1800 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 1900 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 2000 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 2100 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 2200 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 2300 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 2400 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 2500 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 2600 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 2700 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 2800 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 2900 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 3000 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 3200 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 3900 "Warning Pin passive Unconnected" F=1 -Kmarq B 7400 4900 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 6800 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 6900 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 7000 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 7100 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 7200 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 7300 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 7400 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 7500 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 7600 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 7700 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 7800 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 7900 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 8000 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 8100 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 8200 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 8300 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 8400 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 8500 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 8600 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 8700 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 8800 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 8900 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 9000 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 9100 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 9200 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 9300 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 9400 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 9500 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 9600 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 9700 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 9800 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 9900 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 10000 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 10100 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 10200 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 10300 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 10400 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 10500 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 10600 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 10700 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 10800 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 10900 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 11000 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 11100 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 11200 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 11300 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 11400 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 11500 "Warning Pin passive Unconnected" F=1 -Kmarq B 3300 11600 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 6900 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 7000 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 7100 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 7200 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 7300 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 7400 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 7500 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 7600 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 7700 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 7800 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 7900 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 8000 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 8100 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 8200 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 8300 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 8400 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 8500 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 8600 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 8700 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 8800 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 8900 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 9000 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 9100 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 9200 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 9300 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 9400 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 9500 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 9600 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 9700 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 9800 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 9900 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 10000 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 10100 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 10200 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 10300 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 10400 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 10500 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 10600 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 10700 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 10800 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 10900 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 11000 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 11100 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 11200 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 11300 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 11400 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 11500 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 11600 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 11700 "Warning Pin passive Unconnected" F=1 -Kmarq B 7300 11800 "Warning Pin passive Unconnected" F=1 -Kmarq B 16400 12400 "Warning Pin passive Unconnected" F=1 -Kmarq B 15900 12400 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 10400 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 10500 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 10600 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 10700 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 10800 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 10900 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 11000 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 11100 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 11200 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 11300 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 11400 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 11500 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 11600 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 11700 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 11800 "Warning Pin passive Unconnected" F=1 -Kmarq B 12500 11900 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 10500 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 10600 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 10700 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 10800 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 10900 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 11000 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 11100 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 11200 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 11300 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 11400 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 11500 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 11600 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 11700 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 11800 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 11900 "Warning Pin passive Unconnected" F=1 -Kmarq B 19500 12000 "Warning Pin passive Unconnected" F=1 -Kmarq B 16500 9850 "Warning Pin power_in not driven (Net 101)" F=1 Text HLabel 18650 8050 2 60 BiDi ~ 0 NF_D[0..7] Text Label 18250 8850 2 60 ~ 0 @@ -1695,47 +1525,59 @@ Text HLabel 14200 8650 0 60 BiDi ~ 0 ETH_COL Text HLabel 14200 8550 0 60 BiDi ~ 0 ETH_CRS +Text HLabel 18000 7750 2 60 Output ~ 0 +NF_WE_N +Text HLabel 18000 7650 2 60 Output ~ 0 +NF_ALE +Text HLabel 18000 7550 2 60 Output ~ 0 +NF_CLE +Text HLabel 18000 7450 2 60 Output ~ 0 +NF_CS1_N +Text HLabel 18000 7350 2 60 Output ~ 0 +NF_RE_N +Text HLabel 18000 7250 2 60 BiDi ~ 0 +NF_RNB $Comp -L +3.3V #PWR025 +L +3.3V #PWR37 U 1 1 4C61E5B3 P 15900 6100 -F 0 "#PWR025" H 15900 6060 30 0001 C CNN +F 0 "#PWR37" H 15900 6060 30 0001 C CNN F 1 "+3.3V" H 15900 6210 30 0000 C CNN 1 15900 6100 1 0 0 -1 $EndComp $Comp -L +1.2V #PWR026 +L +1.2V #PWR40 U 1 1 4C61E58C P 16500 9850 -F 0 "#PWR026" H 16500 9990 20 0001 C CNN +F 0 "#PWR40" H 16500 9990 20 0001 C CNN F 1 "+1.2V" H 16500 9960 30 0000 C CNN 1 16500 9850 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR027 +L +2.5V #PWR36 U 1 1 4C61E577 P 15000 9850 -F 0 "#PWR027" H 15000 9800 20 0001 C CNN +F 0 "#PWR36" H 15000 9800 20 0001 C CNN F 1 "+2.5V" H 15000 9950 30 0000 C CNN 1 15000 9850 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR028 +L +2.5V #PWR38 U 1 1 4C61E523 P 16000 600 -F 0 "#PWR028" H 16000 550 20 0001 C CNN +F 0 "#PWR38" H 16000 550 20 0001 C CNN F 1 "+2.5V" H 16000 700 30 0000 C CNN 1 16000 600 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR029 +L +2.5V #PWR34 U 1 1 4C61E51F P 5300 650 -F 0 "#PWR029" H 5300 600 20 0001 C CNN +F 0 "#PWR34" H 5300 600 20 0001 C CNN F 1 "+2.5V" H 5300 750 30 0000 C CNN 1 5300 650 1 0 0 -1 @@ -1781,19 +1623,19 @@ M0_BA[0..1] Text HLabel 12400 4850 0 60 Output ~ 0 M1_CS# $Comp -L GND #PWR030 +L GND #PWR35 U 1 1 4C60C24F P 12550 5100 -F 0 "#PWR030" H 12550 5100 30 0001 C CNN +F 0 "#PWR35" H 12550 5100 30 0001 C CNN F 1 "GND" H 12550 5030 30 0001 C CNN 1 12550 5100 -1 0 0 -1 $EndComp $Comp -L GND #PWR031 +L GND #PWR27 U 1 1 4C60C21D P 1600 5950 -F 0 "#PWR031" H 1600 5950 30 0001 C CNN +F 0 "#PWR27" H 1600 5950 30 0001 C CNN F 1 "GND" H 1600 5880 30 0001 C CNN 1 1600 5950 -1 0 0 -1 @@ -2269,10 +2111,10 @@ M0_CLK Text HLabel 7750 4700 2 60 Output ~ 0 M0_CLK# $Comp -L GND #PWR032 +L GND #PWR39 U 1 1 4C439B7E P 16400 12650 -F 0 "#PWR032" H 16400 12650 30 0001 C CNN +F 0 "#PWR39" H 16400 12650 30 0001 C CNN F 1 "GND" H 16400 12580 30 0001 C CNN 1 16400 12650 -1 0 0 -1 diff --git a/kicad/xue-rnc/NV_MEMORIES.sch b/kicad/xue-rnc/NV_MEMORIES.sch index 8e59c6a..dece425 100644 --- a/kicad/xue-rnc/NV_MEMORIES.sch +++ b/kicad/xue-rnc/NV_MEMORIES.sch @@ -1,9 +1,52 @@ -EESchema Schematic File Version 2 date Fri 13 Aug 2010 11:23:32 AM COT -LIBS:power,../library/v0402mhs03,../library/usb-48204-0001,../library/microsmd075f,../library/mic2550ayts,../library/rj45-48025,../library/xue-nv,../library/xc6slx75fgg484,../library/xc6slx45fgg484,../library/micron_mobile_ddr,../library/micron_ddr_512Mb,../library/k8001,device,transistors,conn,linear,regul,74xx,cmos4000,adc-dac,memory,xilinx,special,microcontrollers,dsp,microchip,analog_switches,motorola,texas,intel,audio,interface,digital-audio,philips,display,cypress,siliconi,opto,atmel,contrib,valves,../library/pasives-connectors,./xue-rnc.cache +EESchema Schematic File Version 2 date Fri 13 Aug 2010 03:41:42 PM COT +LIBS:power +LIBS:v0402mhs03 +LIBS:usb-48204-0001 +LIBS:microsmd075f +LIBS:mic2550ayts +LIBS:rj45-48025 +LIBS:xue-nv +LIBS:xc6slx75fgg484 +LIBS:xc6slx45fgg484 +LIBS:micron_mobile_ddr +LIBS:micron_ddr_512Mb +LIBS:k8001 +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:pasives-connectors +LIBS:x25x64mb +LIBS:xue-rnc-cache EELAYER 24 0 EELAYER END $Descr A4 11700 8267 -Sheet 5 6 +Sheet 2 6 Title "" Date "13 aug 2010" Rev "" @@ -13,134 +56,145 @@ Comment2 "" Comment3 "" Comment4 "" $EndDescr -Kmarq B 3850 6200 "Warning Pin BiDi Unconnected" F=1 -Kmarq B 7950 2900 "Warning Pin power_in not driven (Net 71)" F=1 -Kmarq B 3200 5800 "Warning Pin BiDi Unconnected" F=1 -Kmarq B 7050 2700 "Warning Pin BiDi Unconnected" F=1 -Kmarq B 7050 3150 "Warning Pin input Unconnected" F=1 -Kmarq B 7050 2750 "Warning Pin input Unconnected" F=1 -Kmarq B 7050 3100 "Warning Pin input Unconnected" F=1 -Kmarq B 7050 3200 "Warning Pin BiDi Unconnected" F=1 -Kmarq B 7050 2650 "Warning Pin input not driven (Net 2)" F=1 -Text HLabel 8450 2400 2 60 BiDi ~ 0 -NF_D[0..7] +Wire Wire Line + 2650 2300 2650 2450 +Wire Wire Line + 7850 2900 7950 2900 +Wire Wire Line + 7950 3000 7950 2950 +Wire Wire Line + 7950 2950 7850 2950 Wire Bus Line - 8450 2400 8250 2400 + 1250 5500 1650 5500 Wire Bus Line - 8250 2400 8250 3200 + 1650 5500 1650 5900 Wire Wire Line - 7850 2700 8150 2700 + 3100 5450 3100 5800 Wire Wire Line - 7850 2650 8150 2650 -Wire Wire Line - 7850 2550 8150 2550 -Wire Wire Line - 7850 2600 8150 2600 -Wire Wire Line - 7850 3200 8150 3200 -Wire Wire Line - 7850 3150 8150 3150 -Wire Wire Line - 7850 3250 8150 3250 -Wire Wire Line - 7850 3300 8150 3300 -Wire Wire Line - 1750 5900 2200 5900 -Wire Wire Line - 1750 6000 2200 6000 -Wire Wire Line - 1750 5800 2200 5800 -Wire Wire Line - 1750 5700 2200 5700 -Wire Wire Line - 3200 5950 2800 5950 -Wire Wire Line - 3200 5850 2800 5850 -Wire Wire Line - 3200 5900 2800 5900 -Wire Wire Line - 3050 6150 3050 5700 -Wire Wire Line - 3950 6300 3950 6200 -Connection ~ 4400 5750 -Wire Wire Line - 4300 5750 4400 5750 -Wire Wire Line - 4400 5850 4300 5850 -Wire Wire Line - 3050 5700 3200 5700 -Connection ~ 7400 4300 -Wire Wire Line - 7400 4400 7400 4200 -Connection ~ 7800 4900 -Wire Wire Line - 7800 4800 7800 4900 -Connection ~ 7800 4300 -Wire Wire Line - 7800 4400 7800 4300 -Connection ~ 6550 2650 -Wire Wire Line - 7050 2650 6450 2650 -Connection ~ 6850 2650 -Wire Wire Line - 6850 2950 7050 2950 -Wire Wire Line - 6850 3250 7050 3250 -Wire Wire Line - 6850 3150 7050 3150 -Wire Wire Line - 7050 2700 6850 2700 -Wire Wire Line - 7050 2600 6850 2600 -Wire Wire Line - 6850 2750 7050 2750 -Wire Wire Line - 6850 3100 7050 3100 -Wire Wire Line - 6850 3200 7050 3200 -Wire Wire Line - 6850 2900 7050 2900 -Wire Wire Line - 6850 2600 6850 2650 -Wire Wire Line - 6550 2650 6550 2550 -Wire Wire Line - 7400 4300 8200 4300 -Wire Wire Line - 8200 4300 8200 4400 -Wire Wire Line - 7400 4900 8200 4900 -Wire Wire Line - 8200 4900 8200 4800 -Wire Wire Line - 7400 4800 7400 5000 -Connection ~ 7400 4900 -Wire Wire Line - 4300 5800 4400 5800 -Connection ~ 4400 5800 -Wire Wire Line - 4400 5750 4400 5950 -Connection ~ 4400 5850 -Wire Wire Line - 3200 5600 2800 5600 -Wire Wire Line - 3200 5650 2800 5650 + 3100 5800 3200 5800 Wire Wire Line 3200 5750 2800 5750 Wire Wire Line - 3200 5800 3100 5800 + 3200 5650 2800 5650 Wire Wire Line - 3100 5800 3100 5450 + 3200 5600 2800 5600 +Connection ~ 4400 5850 +Wire Wire Line + 4400 5950 4400 5750 +Connection ~ 4400 5800 +Wire Wire Line + 4300 5800 4400 5800 +Connection ~ 7400 4900 +Wire Wire Line + 7400 4800 7400 5000 +Wire Wire Line + 8200 4800 8200 4900 +Wire Wire Line + 8200 4900 7400 4900 +Wire Wire Line + 8200 4400 8200 4300 +Wire Wire Line + 8200 4300 7400 4300 +Wire Wire Line + 6550 2650 6550 2550 +Wire Wire Line + 6850 2650 6850 2600 +Wire Wire Line + 6850 2900 7050 2900 +Wire Wire Line + 6850 3200 7050 3200 +Wire Wire Line + 6850 3100 7050 3100 +Wire Wire Line + 6850 2750 7050 2750 +Wire Wire Line + 6850 2600 7050 2600 +Wire Wire Line + 7050 2700 6850 2700 +Wire Wire Line + 6850 3150 7050 3150 +Wire Wire Line + 6850 3250 7050 3250 +Wire Wire Line + 6850 2950 7050 2950 +Connection ~ 6850 2650 +Wire Wire Line + 7050 2650 6450 2650 +Connection ~ 6550 2650 +Wire Wire Line + 7800 4400 7800 4300 +Connection ~ 7800 4300 +Wire Wire Line + 7800 4800 7800 4900 +Connection ~ 7800 4900 +Wire Wire Line + 7400 4400 7400 4200 +Connection ~ 7400 4300 +Wire Wire Line + 3200 5700 3050 5700 +Wire Wire Line + 4400 5850 4300 5850 +Wire Wire Line + 4400 5750 4300 5750 +Connection ~ 4400 5750 +Wire Wire Line + 3950 6300 3950 6200 +Wire Wire Line + 3050 5700 3050 6150 +Wire Wire Line + 3200 5900 2800 5900 +Wire Wire Line + 3200 5850 2800 5850 +Wire Wire Line + 3200 5950 2800 5950 +Wire Wire Line + 1750 5700 2200 5700 +Wire Wire Line + 1750 5800 2200 5800 +Wire Wire Line + 1750 6000 2200 6000 +Wire Wire Line + 1750 5900 2200 5900 +Wire Wire Line + 7850 3300 8150 3300 +Wire Wire Line + 7850 3250 8150 3250 +Wire Wire Line + 7850 3150 8150 3150 +Wire Wire Line + 7850 3200 8150 3200 +Wire Wire Line + 7850 2600 8150 2600 +Wire Wire Line + 7850 2550 8150 2550 +Wire Wire Line + 7850 2650 8150 2650 +Wire Wire Line + 7850 2700 8150 2700 Wire Bus Line - 1650 5900 1650 5500 + 8250 3200 8250 2400 Wire Bus Line - 1650 5500 1250 5500 -Wire Wire Line - 7850 2950 7950 2950 -Wire Wire Line - 7950 2950 7950 3000 -Wire Wire Line - 7850 2900 7950 2900 + 8250 2400 8450 2400 +$Comp +L GND #PWR17 +U 1 1 4C65ABE9 +P 2650 2450 +F 0 "#PWR17" H 2650 2450 30 0001 C CNN +F 1 "GND" H 2650 2380 30 0001 C CNN + 1 2650 2450 + 1 0 0 -1 +$EndComp +$Comp +L X25X64MB U8 +U 1 1 4C65A75D +P 3500 2100 +F 0 "U8" H 3500 2100 60 0000 C CNN +F 1 "X25X64MB" H 3500 1950 60 0000 C CNN + 1 3500 2100 + 1 0 0 -1 +$EndComp +Text HLabel 8450 2400 2 60 BiDi ~ 0 +NF_D[0..7] Entry Wire Line 8150 2700 8250 2600 Entry Wire Line @@ -158,19 +212,19 @@ Entry Wire Line Entry Wire Line 8150 3150 8250 3050 $Comp -L +3.3V #PWR033 +L +3.3V #PWR19 U 1 1 4C646C14 P 7950 2900 -F 0 "#PWR033" H 7950 2860 30 0001 C CNN +F 0 "#PWR19" H 7950 2860 30 0001 C CNN F 1 "+3.3V" H 7950 3010 30 0000 C CNN 1 7950 2900 1 0 0 -1 $EndComp $Comp -L GND #PWR034 +L GND #PWR20 U 1 1 4C646BEA P 7950 3000 -F 0 "#PWR034" H 7950 3000 30 0001 C CNN +F 0 "#PWR20" H 7950 3000 30 0001 C CNN F 1 "GND" H 7950 2930 30 0001 C CNN 1 7950 3000 1 0 0 -1 @@ -220,10 +274,10 @@ SD_DAT3 Text Label 2800 5850 0 30 ~ 0 SD_CMD $Comp -L GND #PWR035 +L GND #PWR15 U 1 1 4C61D875 P 3050 6150 -F 0 "#PWR035" H 3050 6150 30 0001 C CNN +F 0 "#PWR15" H 3050 6150 30 0001 C CNN F 1 "GND" H 3050 6080 30 0001 C CNN 1 3050 6150 1 0 0 -1 @@ -235,19 +289,19 @@ SD_DAT0 Text Label 2800 5600 0 30 ~ 0 SD_DAT1 $Comp -L GND #PWR036 +L GND #PWR18 U 1 1 4C438ADC P 4400 5950 -F 0 "#PWR036" H 4400 5950 30 0001 C CNN +F 0 "#PWR18" H 4400 5950 30 0001 C CNN F 1 "GND" H 4400 5880 30 0001 C CNN 1 4400 5950 1 0 0 -1 $EndComp $Comp -L GND #PWR037 +L GND #PWR16 U 1 1 4C438AD5 P 3950 6300 -F 0 "#PWR037" H 3950 6300 30 0001 C CNN +F 0 "#PWR16" H 3950 6300 30 0001 C CNN F 1 "GND" H 3950 6230 30 0001 C CNN 1 3950 6300 1 0 0 -1 diff --git a/kicad/xue-rnc/USB.sch b/kicad/xue-rnc/USB.sch index 610c7d5..dce0fad 100644 --- a/kicad/xue-rnc/USB.sch +++ b/kicad/xue-rnc/USB.sch @@ -1,5 +1,48 @@ -EESchema Schematic File Version 2 date Fri 13 Aug 2010 11:23:32 AM COT -LIBS:power,../library/v0402mhs03,../library/usb-48204-0001,../library/microsmd075f,../library/mic2550ayts,../library/rj45-48025,../library/xue-nv,../library/xc6slx75fgg484,../library/xc6slx45fgg484,../library/micron_mobile_ddr,../library/micron_ddr_512Mb,../library/k8001,device,transistors,conn,linear,regul,74xx,cmos4000,adc-dac,memory,xilinx,special,microcontrollers,dsp,microchip,analog_switches,motorola,texas,intel,audio,interface,digital-audio,philips,display,cypress,siliconi,opto,atmel,contrib,valves,../library/pasives-connectors,./xue-rnc.cache +EESchema Schematic File Version 2 date Fri 13 Aug 2010 03:41:42 PM COT +LIBS:power +LIBS:v0402mhs03 +LIBS:usb-48204-0001 +LIBS:microsmd075f +LIBS:mic2550ayts +LIBS:rj45-48025 +LIBS:xue-nv +LIBS:xc6slx75fgg484 +LIBS:xc6slx45fgg484 +LIBS:micron_mobile_ddr +LIBS:micron_ddr_512Mb +LIBS:k8001 +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:pasives-connectors +LIBS:x25x64mb +LIBS:xue-rnc-cache EELAYER 24 0 EELAYER END $Descr A4 11700 8267 @@ -13,19 +56,6 @@ Comment2 "" Comment3 "" Comment4 "" $EndDescr -Kmarq B 4600 6750 "Warning Pin passive Unconnected" F=1 -Kmarq B 4400 5050 "Warning Pin power_in not driven (Net 357)" F=1 -Kmarq B 4400 6350 "Warning Pin passive Unconnected" F=1 -Kmarq B 1650 6750 "Warning HLabel USBD_VM not connected to SheetLabel" F=1 -Kmarq B 1700 6750 "Warning Pin BiDi Unconnected" F=1 -Kmarq B 1650 6650 "Warning HLabel USBD_VP not connected to SheetLabel" F=1 -Kmarq B 1700 6650 "Warning Pin BiDi Unconnected" F=1 -Kmarq B 1650 6550 "Warning HLabel USBD_RCV not connected to SheetLabel" F=1 -Kmarq B 1700 6550 "Warning Pin BiDi Unconnected" F=1 -Kmarq B 1650 6450 "Warning HLabel USBD_OE_N not connected to SheetLabel" F=1 -Kmarq B 1700 6450 "Warning Pin BiDi Unconnected" F=1 -Kmarq B 1650 6350 "Warning HLabel USBD_SPD not connected to SheetLabel" F=1 -Kmarq B 1700 6350 "Warning Pin BiDi Unconnected" F=1 $Comp L MIC2550AYTS U7 U 1 1 4C6552BF @@ -118,37 +148,37 @@ USBD_VP Text HLabel 1650 6750 0 40 BiDi ~ 0 USBD_VM $Comp -L GND #PWR01 +L GND #PWR52 U 1 1 4C6552B5 P 5650 7450 -F 0 "#PWR01" H 5650 7450 30 0001 C CNN +F 0 "#PWR52" H 5650 7450 30 0001 C CNN F 1 "GND" H 5650 7380 30 0001 C CNN 1 5650 7450 1 0 0 -1 $EndComp $Comp -L GND #PWR02 +L GND #PWR44 U 1 1 4C6552B4 P 2200 7500 -F 0 "#PWR02" H 2200 7500 30 0001 C CNN +F 0 "#PWR44" H 2200 7500 30 0001 C CNN F 1 "GND" H 2200 7430 30 0001 C CNN 1 2200 7500 1 0 0 -1 $EndComp $Comp -L GND #PWR03 +L GND #PWR46 U 1 1 4C6552B3 P 2850 5550 -F 0 "#PWR03" H 2850 5550 30 0001 C CNN +F 0 "#PWR46" H 2850 5550 30 0001 C CNN F 1 "GND" H 2850 5480 30 0001 C CNN 1 2850 5550 1 0 0 -1 $EndComp $Comp -L +2.5V #PWR04 +L +2.5V #PWR42 U 1 1 4C6552B2 P 1600 6150 -F 0 "#PWR04" H 1600 6100 20 0001 C CNN +F 0 "#PWR42" H 1600 6100 20 0001 C CNN F 1 "+2.5V" H 1600 6250 30 0000 C CNN 1 1600 6150 1 0 0 -1 @@ -178,19 +208,19 @@ F 2 "0603" H 4400 6050 60 0001 C CNN 1 0 0 -1 $EndComp $Comp -L +5V #PWR05 +L +5V #PWR48 U 1 1 4C6552AF P 4400 5050 -F 0 "#PWR05" H 4400 5140 20 0001 C CNN +F 0 "#PWR48" H 4400 5140 20 0001 C CNN F 1 "+5V" H 4400 5140 30 0000 C CNN 1 4400 5050 1 0 0 -1 $EndComp $Comp -L GND #PWR06 +L GND #PWR50 U 1 1 4C6552AE P 4600 7400 -F 0 "#PWR06" H 4600 7400 30 0001 C CNN +F 0 "#PWR50" H 4600 7400 30 0001 C CNN F 1 "GND" H 4600 7330 30 0001 C CNN 1 4600 7400 1 0 0 -1 @@ -422,19 +452,19 @@ Wire Wire Line Wire Wire Line 4550 3650 4550 3700 $Comp -L GND #PWR07 +L GND #PWR49 U 1 1 4C63F2B5 P 4550 3700 -F 0 "#PWR07" H 4550 3700 30 0001 C CNN +F 0 "#PWR49" H 4550 3700 30 0001 C CNN F 1 "GND" H 4550 3630 30 0001 C CNN 1 4550 3700 1 0 0 -1 $EndComp $Comp -L +5V #PWR08 +L +5V #PWR47 U 1 1 4C63F295 P 4350 1350 -F 0 "#PWR08" H 4350 1440 20 0001 C CNN +F 0 "#PWR47" H 4350 1440 20 0001 C CNN F 1 "+5V" H 4350 1440 30 0000 C CNN 1 4350 1350 1 0 0 -1 @@ -464,37 +494,37 @@ Warning!! VIF = 2.5!! ToDo: review the DS\n Text GLabel 2500 2400 3 40 BiDi ~ 0 3.3V $Comp -L +2.5V #PWR09 +L +2.5V #PWR41 U 1 1 4C63EC16 P 1550 2450 -F 0 "#PWR09" H 1550 2400 20 0001 C CNN +F 0 "#PWR41" H 1550 2400 20 0001 C CNN F 1 "+2.5V" H 1550 2550 30 0000 C CNN 1 1550 2450 1 0 0 -1 $EndComp $Comp -L GND #PWR010 +L GND #PWR45 U 1 1 4C63EA2A P 2800 1850 -F 0 "#PWR010" H 2800 1850 30 0001 C CNN +F 0 "#PWR45" H 2800 1850 30 0001 C CNN F 1 "GND" H 2800 1780 30 0001 C CNN 1 2800 1850 1 0 0 -1 $EndComp $Comp -L GND #PWR011 +L GND #PWR43 U 1 1 4C63EA1B P 2150 3800 -F 0 "#PWR011" H 2150 3800 30 0001 C CNN +F 0 "#PWR43" H 2150 3800 30 0001 C CNN F 1 "GND" H 2150 3730 30 0001 C CNN 1 2150 3800 1 0 0 -1 $EndComp $Comp -L GND #PWR012 +L GND #PWR51 U 1 1 4C63E9FA P 5600 3750 -F 0 "#PWR012" H 5600 3750 30 0001 C CNN +F 0 "#PWR51" H 5600 3750 30 0001 C CNN F 1 "GND" H 5600 3680 30 0001 C CNN 1 5600 3750 1 0 0 -1 diff --git a/kicad/xue-rnc/eth_phy.sch b/kicad/xue-rnc/eth_phy.sch index 1908063..c295583 100644 --- a/kicad/xue-rnc/eth_phy.sch +++ b/kicad/xue-rnc/eth_phy.sch @@ -1,5 +1,48 @@ -EESchema Schematic File Version 2 date Fri 13 Aug 2010 11:23:32 AM COT -LIBS:power,../library/v0402mhs03,../library/usb-48204-0001,../library/microsmd075f,../library/mic2550ayts,../library/rj45-48025,../library/xue-nv,../library/xc6slx75fgg484,../library/xc6slx45fgg484,../library/micron_mobile_ddr,../library/micron_ddr_512Mb,../library/k8001,device,transistors,conn,linear,regul,74xx,cmos4000,adc-dac,memory,xilinx,special,microcontrollers,dsp,microchip,analog_switches,motorola,texas,intel,audio,interface,digital-audio,philips,display,cypress,siliconi,opto,atmel,contrib,valves,../library/pasives-connectors,./xue-rnc.cache +EESchema Schematic File Version 2 date Fri 13 Aug 2010 03:41:42 PM COT +LIBS:power +LIBS:v0402mhs03 +LIBS:usb-48204-0001 +LIBS:microsmd075f +LIBS:mic2550ayts +LIBS:rj45-48025 +LIBS:xue-nv +LIBS:xc6slx75fgg484 +LIBS:xc6slx45fgg484 +LIBS:micron_mobile_ddr +LIBS:micron_ddr_512Mb +LIBS:k8001 +LIBS:device +LIBS:transistors +LIBS:conn +LIBS:linear +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:special +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:valves +LIBS:pasives-connectors +LIBS:x25x64mb +LIBS:xue-rnc-cache EELAYER 24 0 EELAYER END $Descr A4 11700 8267 diff --git a/kicad/xue-rnc/xue-rnc-cache.lib b/kicad/xue-rnc/xue-rnc-cache.lib index 5f007fe..f44a673 100644 --- a/kicad/xue-rnc/xue-rnc-cache.lib +++ b/kicad/xue-rnc/xue-rnc-cache.lib @@ -1,4 +1,4 @@ -EESchema-LIBRARY Version 2.3 Date: Fri 13 Aug 2010 09:19:35 AM COT +EESchema-LIBRARY Version 2.3 Date: Fri 13 Aug 2010 03:41:42 PM COT # # +1.2V # @@ -440,6 +440,24 @@ X 2 2 400 -100 150 L 30 30 1 1 B ENDDRAW ENDDEF # +# X25X64MB +# +DEF X25X64MB U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "X25X64MB" 0 -150 60 H V C CNN +DRAW +S 550 -250 -550 250 0 1 0 f +X CE# 1 -850 100 300 R 50 50 1 1 I I +X SO 2 -850 0 300 R 50 50 1 1 O +X WP# 3 -850 -100 300 R 50 50 1 1 O I +X Vss 4 -850 -200 300 R 50 50 1 1 W +X SI 5 850 -150 300 L 50 50 1 1 I +X SCK 6 850 -50 300 L 50 50 1 1 I C +X RST# 7 850 50 300 L 50 50 1 1 I I +X Vdd 8 850 150 300 L 50 50 1 1 W +ENDDRAW +ENDDEF +# # xc6slx45fgg484 # DEF xc6slx45fgg484 U 0 40 Y Y 5 F N diff --git a/kicad/xue-rnc/xue-rnc.brd b/kicad/xue-rnc/xue-rnc.brd index 7c054e7..83a2d91 100644 --- a/kicad/xue-rnc/xue-rnc.brd +++ b/kicad/xue-rnc/xue-rnc.brd @@ -1,16 +1,20 @@ -PCBNEW-BOARD Version 1 date Fri 13 Aug 2010 11:23:01 AM COT +PCBNEW-BOARD Version 1 date Fri 13 Aug 2010 03:19:27 PM COT + +# Created by Pcbnew(2010-07-15 BZR 2414)-unstable $GENERAL LayerCount 6 Ly 1FFF801F -Links 513 -NoConn 513 -Di -500 -500 70110 50303 +EnabledLayers 1FFF801F +Links 519 +NoConn 519 +Di 39754 13449 70210 50403 Ndraw 2 Ntrack 0 Nzone 0 -Nmodule 107 -Nnets 163 +BoardThickness 630 +Nmodule 108 +Nnets 168 $EndGENERAL $SHEETDESCR @@ -36,20 +40,20 @@ Layer[3] Inner4 signal Layer[4] Inner5 signal Layer[15] Front signal TrackWidth 80 -TrackWidthHistory 80 -TrackWidthHistory 170 TrackClearence 100 ZoneClearence 200 +TrackMinWidth 80 DrawSegmWidth 150 EdgeSegmWidth 150 ViaSize 350 ViaDrill 250 -ViaAltDrill 250 -ViaSizeHistory 350 -ViaSizeHistory 450 +ViaMinSize 350 +ViaMinDrill 200 MicroViaSize 200 MicroViaDrill 50 MicroViasAllowed 0 +MicroViaMinSize 200 +MicroViaMinDrill 50 TextPcbWidth 120 TextPcbSize 600 800 EdgeModWidth 150 @@ -57,6 +61,7 @@ TextModSize 600 600 TextModWidth 120 PadSize 600 600 PadDrill 320 +Pad2MaskClearance 100 AuxiliaryAxisOrg 0 0 $EndSETUP @@ -65,678 +70,876 @@ Na 0 "" St ~ $EndEQUIPOT $EQUIPOT -Na 1 "+2.5V" +Na 1 "+1.2V" St ~ $EndEQUIPOT $EQUIPOT -Na 2 "GND" +Na 2 "+2.5V" St ~ $EndEQUIPOT $EQUIPOT -Na 3 "/FPGA_Sp14" +Na 3 "+3.3V" St ~ $EndEQUIPOT $EQUIPOT -Na 4 "/FPGA_Sp11" +Na 4 "+5V" St ~ $EndEQUIPOT $EQUIPOT -Na 5 "/FPGA_Sp15" +Na 5 "/DDR_Ban100" St ~ $EndEQUIPOT $EQUIPOT -Na 6 "/FPGA_Sp16" +Na 6 "/DDR_Ban101" St ~ $EndEQUIPOT $EQUIPOT -Na 7 "/FPGA_Sp17" +Na 7 "/DDR_Ban102" St ~ $EndEQUIPOT $EQUIPOT -Na 8 "/FPGA_Sp18" +Na 8 "/DDR_Ban103" St ~ $EndEQUIPOT $EQUIPOT -Na 9 "/FPGA_Sp19" +Na 9 "/DDR_Ban108" St ~ $EndEQUIPOT $EQUIPOT -Na 10 "/Non_vol20" +Na 10 "/DDR_Ban109" St ~ $EndEQUIPOT $EQUIPOT -Na 11 "/Non_vol21" +Na 11 "/DDR_Ban110" St ~ $EndEQUIPOT $EQUIPOT -Na 12 "/Non_vol22" +Na 12 "/DDR_Ban112" St ~ $EndEQUIPOT $EQUIPOT -Na 13 "/Non_vol5" +Na 13 "/DDR_Ban114" St ~ $EndEQUIPOT $EQUIPOT -Na 14 "/Non_vol9" +Na 14 "/DDR_Ban116" St ~ $EndEQUIPOT $EQUIPOT -Na 15 "+3.3V" +Na 15 "/DDR_Ban117" St ~ $EndEQUIPOT $EQUIPOT -Na 16 "/FPGA_Sp23" +Na 16 "/DDR_Ban119" St ~ $EndEQUIPOT $EQUIPOT -Na 17 "/FPGA_Sp24" +Na 17 "/DDR_Ban44" St ~ $EndEQUIPOT $EQUIPOT -Na 18 "/FPGA_Sp25" +Na 18 "/DDR_Ban53" St ~ $EndEQUIPOT $EQUIPOT -Na 19 "/Non_vol26" +Na 19 "/DDR_Ban54" St ~ $EndEQUIPOT $EQUIPOT -Na 20 "/Non_vol10" +Na 20 "/DDR_Ban55" St ~ $EndEQUIPOT $EQUIPOT -Na 21 "/DDR_Ban27" +Na 21 "/DDR_Ban68" St ~ $EndEQUIPOT $EQUIPOT -Na 22 "/FPGA_Sp28" +Na 22 "/DDR_Ban71" St ~ $EndEQUIPOT $EQUIPOT -Na 23 "/FPGA_Sp29" +Na 23 "/DDR_Ban72" St ~ $EndEQUIPOT $EQUIPOT -Na 24 "/FPGA_Sp30" +Na 24 "/DDR_Ban73" St ~ $EndEQUIPOT $EQUIPOT -Na 25 "/FPGA_Sp31" +Na 25 "/DDR_Ban74" St ~ $EndEQUIPOT $EQUIPOT -Na 26 "/FPGA_Sp32" +Na 26 "/DDR_Ban75" St ~ $EndEQUIPOT $EQUIPOT -Na 27 "/FPGA_Sp33" +Na 27 "/DDR_Ban77" St ~ $EndEQUIPOT $EQUIPOT -Na 28 "/Non_vol34" +Na 28 "/DDR_Ban78" St ~ $EndEQUIPOT $EQUIPOT -Na 29 "/Non_vol35" +Na 29 "/DDR_Ban79" St ~ $EndEQUIPOT $EQUIPOT -Na 30 "/Non_vol6" +Na 30 "/DDR_Ban97" St ~ $EndEQUIPOT $EQUIPOT -Na 31 "/DDR_Banks/M1_A8" +Na 31 "/DDR_Ban99" St ~ $EndEQUIPOT $EQUIPOT -Na 32 "/DDR_Banks/M1_A9" +Na 32 "/DDR_Banks/M0_A2" St ~ $EndEQUIPOT $EQUIPOT -Na 33 "/DDR_Ban36" +Na 33 "/DDR_Banks/M0_A8" St ~ $EndEQUIPOT $EQUIPOT -Na 34 "/DDR_Ban37" +Na 34 "/DDR_Banks/M0_A9" St ~ $EndEQUIPOT $EQUIPOT -Na 35 "/FPGA_Sp38" +Na 35 "/DDR_Banks/M1_A2" St ~ $EndEQUIPOT $EQUIPOT -Na 36 "/FPGA_Sp39" +Na 36 "/DDR_Banks/M1_A4" St ~ $EndEQUIPOT $EQUIPOT -Na 37 "/FPGA_Sp40" +Na 37 "/DDR_Banks/M1_A6" St ~ $EndEQUIPOT $EQUIPOT -Na 38 "/FPGA_Sp41" +Na 38 "/DDR_Banks/M1_A7" St ~ $EndEQUIPOT $EQUIPOT -Na 39 "/FPGA_Sp42" +Na 39 "/Etherne1" St ~ $EndEQUIPOT $EQUIPOT -Na 40 "/Non_vol43" +Na 40 "/Etherne11" St ~ $EndEQUIPOT $EQUIPOT -Na 41 "/Non_vol44" +Na 41 "/Etherne12" St ~ $EndEQUIPOT $EQUIPOT -Na 42 "/Non_vol7" +Na 42 "/Etherne13" St ~ $EndEQUIPOT $EQUIPOT -Na 43 "/DDR_Ban45" +Na 43 "/Etherne15" St ~ $EndEQUIPOT $EQUIPOT -Na 44 "/DDR_Ban46" +Na 44 "/Etherne16" St ~ $EndEQUIPOT $EQUIPOT -Na 45 "/DDR_Banks/M0_A9" +Na 45 "/Etherne18" St ~ $EndEQUIPOT $EQUIPOT -Na 46 "/DDR_Banks/M0_A8" +Na 46 "/Etherne19" St ~ $EndEQUIPOT $EQUIPOT -Na 47 "/Non_vol8" +Na 47 "/Etherne2" St ~ $EndEQUIPOT $EQUIPOT -Na 48 "/DDR_Banks/M1_A7" +Na 48 "/Etherne3" St ~ $EndEQUIPOT $EQUIPOT -Na 49 "/DDR_Banks/M1_A2" +Na 49 "/Etherne33" St ~ $EndEQUIPOT $EQUIPOT -Na 50 "/DDR_Ban47" +Na 50 "/Etherne34" St ~ $EndEQUIPOT $EQUIPOT -Na 51 "/DDR_Banks/M0_A4" +Na 51 "/Etherne35" St ~ $EndEQUIPOT $EQUIPOT -Na 52 "/DDR_Ban48" +Na 52 "/Etherne36" St ~ $EndEQUIPOT $EQUIPOT -Na 53 "/DDR_Banks/M1_A4" +Na 53 "/Etherne4" St ~ $EndEQUIPOT $EQUIPOT -Na 54 "/DDR_Banks/M1_A0" +Na 54 "/Etherne46" St ~ $EndEQUIPOT $EQUIPOT -Na 55 "/DDR_Banks/M1_A1" +Na 55 "/Etherne48" St ~ $EndEQUIPOT $EQUIPOT -Na 56 "/DDR_Ban49" +Na 56 "/Etherne49" St ~ $EndEQUIPOT $EQUIPOT -Na 57 "/DDR_Ban50" +Na 57 "/FPGA_Sp104" St ~ $EndEQUIPOT $EQUIPOT -Na 58 "/DDR_Ban51" +Na 58 "/FPGA_Sp105" St ~ $EndEQUIPOT $EQUIPOT -Na 59 "/DDR_Ban52" +Na 59 "/FPGA_Sp106" St ~ $EndEQUIPOT $EQUIPOT -Na 60 "/DDR_Banks/M1_A3" +Na 60 "/FPGA_Sp107" St ~ $EndEQUIPOT $EQUIPOT -Na 61 "/DDR_Banks/M0_A1" +Na 61 "/FPGA_Sp111" St ~ $EndEQUIPOT $EQUIPOT -Na 62 "/DDR_Banks/M0_A0" +Na 62 "/FPGA_Sp113" St ~ $EndEQUIPOT $EQUIPOT -Na 63 "/DDR_Ban53" +Na 63 "/FPGA_Sp115" St ~ $EndEQUIPOT $EQUIPOT -Na 64 "/DDR_Ban54" +Na 64 "/FPGA_Sp118" St ~ $EndEQUIPOT $EQUIPOT -Na 65 "/DDR_Banks/M0_A2" +Na 65 "/FPGA_Sp120" St ~ $EndEQUIPOT $EQUIPOT -Na 66 "/DDR_Banks/M0_A7" +Na 66 "/FPGA_Sp121" St ~ $EndEQUIPOT $EQUIPOT -Na 67 "/DDR_Ban55" +Na 67 "/FPGA_Sp122" St ~ $EndEQUIPOT $EQUIPOT -Na 68 "/DDR_Ban56" +Na 68 "/FPGA_Sp123" St ~ $EndEQUIPOT $EQUIPOT -Na 69 "/DDR_Ban57" +Na 69 "/FPGA_Sp124" St ~ $EndEQUIPOT $EQUIPOT -Na 70 "/DDR_Ban58" +Na 70 "/FPGA_Sp125" St ~ $EndEQUIPOT $EQUIPOT -Na 71 "/DDR_Ban59" +Na 71 "/FPGA_Sp14" St ~ $EndEQUIPOT $EQUIPOT -Na 72 "/DDR_Ban60" +Na 72 "/FPGA_Sp17" St ~ $EndEQUIPOT $EQUIPOT -Na 73 "/DDR_Banks/M0_A6" +Na 73 "/FPGA_Sp20" St ~ $EndEQUIPOT $EQUIPOT -Na 74 "+1.2V" +Na 74 "/FPGA_Sp22" St ~ $EndEQUIPOT $EQUIPOT -Na 75 "/DDR_Ban61" +Na 75 "/FPGA_Sp24" St ~ $EndEQUIPOT $EQUIPOT -Na 76 "/DDR_Ban62" +Na 76 "/FPGA_Sp25" St ~ $EndEQUIPOT $EQUIPOT -Na 77 "/DDR_Ban63" +Na 77 "/FPGA_Sp26" St ~ $EndEQUIPOT $EQUIPOT -Na 78 "/DDR_Ban64" +Na 78 "/FPGA_Sp27" St ~ $EndEQUIPOT $EQUIPOT -Na 79 "/DDR_Ban65" +Na 79 "/FPGA_Sp28" St ~ $EndEQUIPOT $EQUIPOT -Na 80 "/DDR_Ban66" +Na 80 "/FPGA_Sp29" St ~ $EndEQUIPOT $EQUIPOT -Na 81 "/DDR_Banks/M0_A5" +Na 81 "/FPGA_Sp30" St ~ $EndEQUIPOT $EQUIPOT -Na 82 "/DDR_Ban67" +Na 82 "/FPGA_Sp31" St ~ $EndEQUIPOT $EQUIPOT -Na 83 "/DDR_Ban68" +Na 83 "/FPGA_Sp32" St ~ $EndEQUIPOT $EQUIPOT -Na 84 "/DDR_Banks/M0_A3" +Na 84 "/FPGA_Sp37" St ~ $EndEQUIPOT $EQUIPOT -Na 85 "/DDR_Ban69" +Na 85 "/FPGA_Sp38" St ~ $EndEQUIPOT $EQUIPOT -Na 86 "/DDR_Banks/M1_A6" +Na 86 "/FPGA_Sp39" St ~ $EndEQUIPOT $EQUIPOT -Na 87 "/DDR_Banks/M1_A5" +Na 87 "/FPGA_Sp40" St ~ $EndEQUIPOT $EQUIPOT -Na 88 "/DDR_Ban70" +Na 88 "/FPGA_Sp41" St ~ $EndEQUIPOT $EQUIPOT -Na 89 "/DDR_Ban71" +Na 89 "/FPGA_Sp42" St ~ $EndEQUIPOT $EQUIPOT -Na 90 "/DDR_Ban72" +Na 90 "/FPGA_Sp43" St ~ $EndEQUIPOT $EQUIPOT -Na 91 "/DDR_Ban73" +Na 91 "/FPGA_Sp45" St ~ $EndEQUIPOT $EQUIPOT -Na 92 "/DDR_Ban74" +Na 92 "/FPGA_Sp47" St ~ $EndEQUIPOT $EQUIPOT -Na 93 "/DDR_Ban75" +Na 93 "/FPGA_Sp50" St ~ $EndEQUIPOT $EQUIPOT -Na 94 "/DDR_Ban76" +Na 94 "/FPGA_Sp51" St ~ $EndEQUIPOT $EQUIPOT -Na 95 "/DDR_Ban77" +Na 95 "/FPGA_Sp56" St ~ $EndEQUIPOT $EQUIPOT -Na 96 "/DDR_Ban78" +Na 96 "/FPGA_Sp57" St ~ $EndEQUIPOT $EQUIPOT -Na 97 "/FPGA_Sp79" +Na 97 "/FPGA_Sp58" St ~ $EndEQUIPOT $EQUIPOT -Na 98 "/DDR_Ban80" +Na 98 "/FPGA_Sp59" St ~ $EndEQUIPOT $EQUIPOT -Na 99 "/DDR_Ban81" +Na 99 "/FPGA_Sp6" St ~ $EndEQUIPOT $EQUIPOT -Na 100 "/DDR_Ban82" +Na 100 "/FPGA_Sp60" St ~ $EndEQUIPOT $EQUIPOT -Na 101 "/DDR_Ban83" +Na 101 "/FPGA_Sp61" St ~ $EndEQUIPOT $EQUIPOT -Na 102 "/DDR_Ban84" +Na 102 "/FPGA_Sp62" St ~ $EndEQUIPOT $EQUIPOT -Na 103 "/FPGA_Sp85" +Na 103 "/FPGA_Sp63" St ~ $EndEQUIPOT $EQUIPOT -Na 104 "/DDR_Ban86" +Na 104 "/FPGA_Sp64" St ~ $EndEQUIPOT $EQUIPOT -Na 105 "/DDR_Ban87" +Na 105 "/FPGA_Sp65" St ~ $EndEQUIPOT $EQUIPOT -Na 106 "/DDR_Ban88" +Na 106 "/FPGA_Sp66" St ~ $EndEQUIPOT $EQUIPOT -Na 107 "/DDR_Ban89" +Na 107 "/FPGA_Sp67" St ~ $EndEQUIPOT $EQUIPOT -Na 108 "/FPGA_Sp90" +Na 108 "/FPGA_Sp69" St ~ $EndEQUIPOT $EQUIPOT -Na 109 "/FPGA_Sp91" +Na 109 "/FPGA_Sp70" St ~ $EndEQUIPOT $EQUIPOT -Na 110 "/DDR_Ban92" +Na 110 "/FPGA_Sp76" St ~ $EndEQUIPOT $EQUIPOT -Na 111 "/DDR_Ban93" +Na 111 "/FPGA_Sp80" St ~ $EndEQUIPOT $EQUIPOT -Na 112 "/DDR_Ban94" +Na 112 "/FPGA_Sp81" St ~ $EndEQUIPOT $EQUIPOT -Na 113 "/DDR_Ban95" +Na 113 "/FPGA_Sp82" St ~ $EndEQUIPOT $EQUIPOT -Na 114 "/FPGA_Sp96" +Na 114 "/FPGA_Sp83" St ~ $EndEQUIPOT $EQUIPOT -Na 115 "/DDR_Ban97" +Na 115 "/FPGA_Sp84" St ~ $EndEQUIPOT $EQUIPOT -Na 116 "/DDR_Ban98" +Na 116 "/FPGA_Sp85" St ~ $EndEQUIPOT $EQUIPOT -Na 117 "/DDR_Ban99" +Na 117 "/FPGA_Sp86" St ~ $EndEQUIPOT $EQUIPOT -Na 118 "N-000101" +Na 118 "/FPGA_Sp87" St ~ $EndEQUIPOT $EQUIPOT -Na 119 "/DDR_Ban100" +Na 119 "/FPGA_Sp88" St ~ $EndEQUIPOT $EQUIPOT -Na 120 "/DDR_Ban101" +Na 120 "/FPGA_Sp89" St ~ $EndEQUIPOT $EQUIPOT -Na 121 "/DDR_Ban102" +Na 121 "/FPGA_Sp90" St ~ $EndEQUIPOT $EQUIPOT -Na 122 "/DDR_Ban103" +Na 122 "/FPGA_Sp91" St ~ $EndEQUIPOT $EQUIPOT -Na 123 "/DDR_Ban104" +Na 123 "/FPGA_Sp92" St ~ $EndEQUIPOT $EQUIPOT -Na 124 "/DDR_Ban105" +Na 124 "/FPGA_Sp93" St ~ $EndEQUIPOT $EQUIPOT -Na 125 "/DDR_Ban106" +Na 125 "/FPGA_Sp94" St ~ $EndEQUIPOT $EQUIPOT -Na 126 "/DDR_Ban107" +Na 126 "/FPGA_Sp95" St ~ $EndEQUIPOT $EQUIPOT -Na 127 "/DDR_Ban108" +Na 127 "/FPGA_Sp96" St ~ $EndEQUIPOT $EQUIPOT -Na 128 "N-000069" +Na 128 "/FPGA_Sp98" St ~ $EndEQUIPOT $EQUIPOT -Na 129 "/Etherne4" +Na 129 "/Non_vol10" St ~ $EndEQUIPOT $EQUIPOT -Na 130 "N-000336" +Na 130 "/Non_vol21" St ~ $EndEQUIPOT $EQUIPOT -Na 131 "N-000331" +Na 131 "/Non_vol23" St ~ $EndEQUIPOT $EQUIPOT -Na 132 "/Etherne3" +Na 132 "/Non_vol5" St ~ $EndEQUIPOT $EQUIPOT -Na 133 "N-000329" +Na 133 "/Non_vol52" St ~ $EndEQUIPOT $EQUIPOT -Na 134 "/Etherne12" +Na 134 "/Non_vol7" St ~ $EndEQUIPOT $EQUIPOT -Na 135 "/Etherne13" +Na 135 "/Non_vol8" St ~ $EndEQUIPOT $EQUIPOT -Na 136 "/Etherne2" +Na 136 "/Non_vol9" St ~ $EndEQUIPOT $EQUIPOT -Na 137 "N-000330" +Na 137 "/USB/USBA_OE_N" St ~ $EndEQUIPOT $EQUIPOT -Na 138 "N-000337" +Na 138 "/USB/USBA_VP" St ~ $EndEQUIPOT $EQUIPOT -Na 139 "/Etherne1" +Na 139 "3.3V" St ~ $EndEQUIPOT $EQUIPOT -Na 140 "/Non_vol109" +Na 140 "GND" St ~ $EndEQUIPOT $EQUIPOT -Na 141 "N-000338" +Na 141 "N-000048" St ~ $EndEQUIPOT $EQUIPOT -Na 142 "N-000334" +Na 142 "N-000049" St ~ $EndEQUIPOT $EQUIPOT -Na 143 "N-000333" +Na 143 "N-000050" St ~ $EndEQUIPOT $EQUIPOT -Na 144 "N-000367" +Na 144 "N-000052" St ~ $EndEQUIPOT $EQUIPOT -Na 145 "N-000364" +Na 145 "N-000140" St ~ $EndEQUIPOT $EQUIPOT -Na 146 "N-000053" +Na 146 "N-000327" St ~ $EndEQUIPOT $EQUIPOT -Na 147 "N-000052" +Na 147 "N-000329" St ~ $EndEQUIPOT $EQUIPOT -Na 148 "N-000368" +Na 148 "N-000330" St ~ $EndEQUIPOT $EQUIPOT -Na 149 "N-000340" +Na 149 "N-000331" St ~ $EndEQUIPOT $EQUIPOT -Na 150 "N-000339" +Na 150 "N-000333" St ~ $EndEQUIPOT $EQUIPOT -Na 151 "N-000366" +Na 151 "N-000335" St ~ $EndEQUIPOT $EQUIPOT -Na 152 "N-000369" +Na 152 "N-000336" St ~ $EndEQUIPOT $EQUIPOT -Na 153 "+5V" +Na 153 "N-000338" St ~ $EndEQUIPOT $EQUIPOT -Na 154 "N-000365" +Na 154 "N-000347" St ~ $EndEQUIPOT $EQUIPOT -Na 155 "N-000051" +Na 155 "N-000349" St ~ $EndEQUIPOT $EQUIPOT -Na 156 "N-000054" +Na 156 "N-000350" St ~ $EndEQUIPOT $EQUIPOT -Na 157 "N-000363" +Na 157 "N-000351" St ~ $EndEQUIPOT $EQUIPOT -Na 158 "N-000355" +Na 158 "N-000352" St ~ $EndEQUIPOT $EQUIPOT -Na 159 "N-000361" +Na 159 "N-000353" St ~ $EndEQUIPOT $EQUIPOT -Na 160 "N-000359" +Na 160 "N-000355" St ~ $EndEQUIPOT $EQUIPOT -Na 161 "N-000358" +Na 161 "N-000357" St ~ $EndEQUIPOT $EQUIPOT -Na 162 "N-000360" +Na 162 "N-000358" St ~ $EndEQUIPOT +$EQUIPOT +Na 163 "N-000359" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 164 "N-000366" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 165 "N-000367" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 166 "N-000368" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 167 "N-000369" +St ~ +$EndEQUIPOT +$NCLASS +Name "Default" +Desc "This is the default net class." +Clearance 100 +TrackWidth 80 +ViaDia 350 +ViaDrill 250 +uViaDia 200 +uViaDrill 50 +AddNet "" +AddNet "+1.2V" +AddNet "+2.5V" +AddNet "+3.3V" +AddNet "+5V" +AddNet "/DDR_Ban100" +AddNet "/DDR_Ban101" +AddNet "/DDR_Ban102" +AddNet "/DDR_Ban103" +AddNet "/DDR_Ban108" +AddNet "/DDR_Ban109" +AddNet "/DDR_Ban110" +AddNet "/DDR_Ban112" +AddNet "/DDR_Ban114" +AddNet "/DDR_Ban116" +AddNet "/DDR_Ban117" +AddNet "/DDR_Ban119" +AddNet "/DDR_Ban44" +AddNet "/DDR_Ban53" +AddNet "/DDR_Ban54" +AddNet "/DDR_Ban55" +AddNet "/DDR_Ban68" +AddNet "/DDR_Ban71" +AddNet "/DDR_Ban72" +AddNet "/DDR_Ban73" +AddNet "/DDR_Ban74" +AddNet "/DDR_Ban75" +AddNet "/DDR_Ban77" +AddNet "/DDR_Ban78" +AddNet "/DDR_Ban79" +AddNet "/DDR_Ban97" +AddNet "/DDR_Ban99" +AddNet "/DDR_Banks/M0_A2" +AddNet "/DDR_Banks/M0_A8" +AddNet "/DDR_Banks/M0_A9" +AddNet "/DDR_Banks/M1_A2" +AddNet "/DDR_Banks/M1_A4" +AddNet "/DDR_Banks/M1_A6" +AddNet "/DDR_Banks/M1_A7" +AddNet "/Etherne1" +AddNet "/Etherne11" +AddNet "/Etherne12" +AddNet "/Etherne13" +AddNet "/Etherne15" +AddNet "/Etherne16" +AddNet "/Etherne18" +AddNet "/Etherne19" +AddNet "/Etherne2" +AddNet "/Etherne3" +AddNet "/Etherne33" +AddNet "/Etherne34" +AddNet "/Etherne35" +AddNet "/Etherne36" +AddNet "/Etherne4" +AddNet "/Etherne46" +AddNet "/Etherne48" +AddNet "/Etherne49" +AddNet "/FPGA_Sp104" +AddNet "/FPGA_Sp105" +AddNet "/FPGA_Sp106" +AddNet "/FPGA_Sp107" +AddNet "/FPGA_Sp111" +AddNet "/FPGA_Sp113" +AddNet "/FPGA_Sp115" +AddNet "/FPGA_Sp118" +AddNet "/FPGA_Sp120" +AddNet "/FPGA_Sp121" +AddNet "/FPGA_Sp122" +AddNet "/FPGA_Sp123" +AddNet "/FPGA_Sp124" +AddNet "/FPGA_Sp125" +AddNet "/FPGA_Sp14" +AddNet "/FPGA_Sp17" +AddNet "/FPGA_Sp20" +AddNet "/FPGA_Sp22" +AddNet "/FPGA_Sp24" +AddNet "/FPGA_Sp25" +AddNet "/FPGA_Sp26" +AddNet "/FPGA_Sp27" +AddNet "/FPGA_Sp28" +AddNet "/FPGA_Sp29" +AddNet "/FPGA_Sp30" +AddNet "/FPGA_Sp31" +AddNet "/FPGA_Sp32" +AddNet "/FPGA_Sp37" +AddNet "/FPGA_Sp38" +AddNet "/FPGA_Sp39" +AddNet "/FPGA_Sp40" +AddNet "/FPGA_Sp41" +AddNet "/FPGA_Sp42" +AddNet "/FPGA_Sp43" +AddNet "/FPGA_Sp45" +AddNet "/FPGA_Sp47" +AddNet "/FPGA_Sp50" +AddNet "/FPGA_Sp51" +AddNet "/FPGA_Sp56" +AddNet "/FPGA_Sp57" +AddNet "/FPGA_Sp58" +AddNet "/FPGA_Sp59" +AddNet "/FPGA_Sp6" +AddNet "/FPGA_Sp60" +AddNet "/FPGA_Sp61" +AddNet "/FPGA_Sp62" +AddNet "/FPGA_Sp63" +AddNet "/FPGA_Sp64" +AddNet "/FPGA_Sp65" +AddNet "/FPGA_Sp66" +AddNet "/FPGA_Sp67" +AddNet "/FPGA_Sp69" +AddNet "/FPGA_Sp70" +AddNet "/FPGA_Sp76" +AddNet "/FPGA_Sp80" +AddNet "/FPGA_Sp81" +AddNet "/FPGA_Sp82" +AddNet "/FPGA_Sp83" +AddNet "/FPGA_Sp84" +AddNet "/FPGA_Sp85" +AddNet "/FPGA_Sp86" +AddNet "/FPGA_Sp87" +AddNet "/FPGA_Sp88" +AddNet "/FPGA_Sp89" +AddNet "/FPGA_Sp90" +AddNet "/FPGA_Sp91" +AddNet "/FPGA_Sp92" +AddNet "/FPGA_Sp93" +AddNet "/FPGA_Sp94" +AddNet "/FPGA_Sp95" +AddNet "/FPGA_Sp96" +AddNet "/FPGA_Sp98" +AddNet "/Non_vol10" +AddNet "/Non_vol21" +AddNet "/Non_vol23" +AddNet "/Non_vol5" +AddNet "/Non_vol52" +AddNet "/Non_vol7" +AddNet "/Non_vol8" +AddNet "/Non_vol9" +AddNet "/USB/USBA_OE_N" +AddNet "/USB/USBA_VP" +AddNet "3.3V" +AddNet "GND" +AddNet "N-000048" +AddNet "N-000049" +AddNet "N-000050" +AddNet "N-000052" +AddNet "N-000140" +AddNet "N-000327" +AddNet "N-000329" +AddNet "N-000330" +AddNet "N-000331" +AddNet "N-000333" +AddNet "N-000335" +AddNet "N-000336" +AddNet "N-000338" +AddNet "N-000347" +AddNet "N-000349" +AddNet "N-000350" +AddNet "N-000351" +AddNet "N-000352" +AddNet "N-000353" +AddNet "N-000355" +AddNet "N-000357" +AddNet "N-000358" +AddNet "N-000359" +AddNet "N-000366" +AddNet "N-000367" +AddNet "N-000368" +AddNet "N-000369" +$EndNCLASS $MODULE 1206 -Po 55520 40470 0 15 4C5FF890 4C61D1D4 ~~ +Po 63780 39173 1800 15 4C5FF890 4C61D1D4 ~~ Li 1206 Sc 4C61D1D4 AR /4C421DD3/4C61D1D4 Op 0 0 0 At SMD -T0 0 -150 200 200 0 40 N V 25 N"C34" -T1 0 150 200 200 0 40 N I 25 N"1uF" +T0 0 -150 200 200 1800 40 N V 25 N"C34" +T1 0 150 200 200 1800 40 N I 25 N"10uF" DS -798 384 -798 -384 50 21 DS -798 -384 798 -384 50 21 DS 798 -384 798 384 50 21 DS 798 384 -798 384 50 21 $PAD -Sh "1" R 355 668 0 0 0 +Sh "1" R 355 668 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -570 0 $EndPAD $PAD -Sh "2" R 355 668 0 0 0 +Sh "2" R 355 668 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 570 0 $EndPAD $EndMODULE 1206 @@ -761,7 +964,7 @@ $PAD Sh "A1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -4133 -4133 $EndPAD $PAD @@ -782,70 +985,70 @@ $PAD Sh "A4" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 3 "/FPGA_Sp14" +Ne 71 "/FPGA_Sp14" Po -2952 -4133 $EndPAD $PAD Sh "A5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 4 "/FPGA_Sp11" +Ne 40 "/Etherne11" Po -2558 -4133 $EndPAD $PAD Sh "A6" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 5 "/FPGA_Sp15" +Ne 43 "/Etherne15" Po -2165 -4133 $EndPAD $PAD Sh "A7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 6 "/FPGA_Sp16" +Ne 44 "/Etherne16" Po -1771 -4133 $EndPAD $PAD Sh "A8" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 7 "/FPGA_Sp17" +Ne 72 "/FPGA_Sp17" Po -1377 -4133 $EndPAD $PAD Sh "A9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 8 "/FPGA_Sp18" +Ne 45 "/Etherne18" Po -983 -4133 $EndPAD $PAD Sh "A10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 9 "/FPGA_Sp19" +Ne 46 "/Etherne19" Po -590 -4133 $EndPAD $PAD Sh "A11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 10 "/Non_vol20" +Ne 73 "/FPGA_Sp20" Po -196 -4133 $EndPAD $PAD Sh "A12" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 11 "/Non_vol21" +Ne 130 "/Non_vol21" Po 196 -4133 $EndPAD $PAD Sh "A13" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 12 "/Non_vol22" +Ne 74 "/FPGA_Sp22" Po 590 -4133 $EndPAD $PAD @@ -859,28 +1062,28 @@ $PAD Sh "A15" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 0 "" +Ne 131 "/Non_vol23" Po 1377 -4133 $EndPAD $PAD Sh "A16" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 0 "" +Ne 75 "/FPGA_Sp24" Po 1771 -4133 $EndPAD $PAD Sh "A17" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 13 "/Non_vol5" +Ne 132 "/Non_vol5" Po 2165 -4133 $EndPAD $PAD Sh "A18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 14 "/Non_vol9" +Ne 136 "/Non_vol9" Po 2558 -4133 $EndPAD $PAD @@ -908,7 +1111,7 @@ $PAD Sh "A22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 4133 -4133 $EndPAD $PAD @@ -936,70 +1139,70 @@ $PAD Sh "B4" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -2952 -3739 $EndPAD $PAD Sh "B5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -2558 -3739 $EndPAD $PAD Sh "B6" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 16 "/FPGA_Sp23" +Ne 76 "/FPGA_Sp25" Po -2165 -3739 $EndPAD $PAD Sh "B7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -1771 -3739 $EndPAD $PAD Sh "B8" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 17 "/FPGA_Sp24" +Ne 77 "/FPGA_Sp26" Po -1377 -3739 $EndPAD $PAD Sh "B9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -983 -3739 $EndPAD $PAD Sh "B10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 18 "/FPGA_Sp25" +Ne 78 "/FPGA_Sp27" Po -590 -3739 $EndPAD $PAD Sh "B11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -196 -3739 $EndPAD $PAD Sh "B12" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 19 "/Non_vol26" +Ne 79 "/FPGA_Sp28" Po 196 -3739 $EndPAD $PAD Sh "B13" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 590 -3739 $EndPAD $PAD @@ -1013,35 +1216,35 @@ $PAD Sh "B15" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po 1377 -3739 $EndPAD $PAD Sh "B16" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 0 "" +Ne 80 "/FPGA_Sp29" Po 1771 -3739 $EndPAD $PAD Sh "B17" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 2165 -3739 $EndPAD $PAD Sh "B18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 20 "/Non_vol10" +Ne 129 "/Non_vol10" Po 2558 -3739 $EndPAD $PAD Sh "B19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po 2952 -3739 $EndPAD $PAD @@ -1069,14 +1272,14 @@ $PAD Sh "C1" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 21 "/DDR_Ban27" +Ne 81 "/FPGA_Sp30" Po -4133 -3346 $EndPAD $PAD Sh "C2" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -3739 -3346 $EndPAD $PAD @@ -1097,42 +1300,42 @@ $PAD Sh "C5" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 22 "/FPGA_Sp28" +Ne 82 "/FPGA_Sp31" Po -2558 -3346 $EndPAD $PAD Sh "C6" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 23 "/FPGA_Sp29" +Ne 83 "/FPGA_Sp32" Po -2165 -3346 $EndPAD $PAD Sh "C7" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 24 "/FPGA_Sp30" +Ne 49 "/Etherne33" Po -1771 -3346 $EndPAD $PAD Sh "C8" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 25 "/FPGA_Sp31" +Ne 50 "/Etherne34" Po -1377 -3346 $EndPAD $PAD Sh "C9" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 26 "/FPGA_Sp32" +Ne 51 "/Etherne35" Po -983 -3346 $EndPAD $PAD Sh "C10" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 27 "/FPGA_Sp33" +Ne 52 "/Etherne36" Po -590 -3346 $EndPAD $PAD @@ -1146,14 +1349,14 @@ $PAD Sh "C12" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 28 "/Non_vol34" +Ne 84 "/FPGA_Sp37" Po 196 -3346 $EndPAD $PAD Sh "C13" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 29 "/Non_vol35" +Ne 85 "/FPGA_Sp38" Po 590 -3346 $EndPAD $PAD @@ -1167,21 +1370,21 @@ $PAD Sh "C15" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 0 "" +Ne 86 "/FPGA_Sp39" Po 1377 -3346 $EndPAD $PAD Sh "C16" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 0 "" +Ne 87 "/FPGA_Sp40" Po 1771 -3346 $EndPAD $PAD Sh "C17" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 30 "/Non_vol6" +Ne 99 "/FPGA_Sp6" Po 2165 -3346 $EndPAD $PAD @@ -1202,35 +1405,35 @@ $PAD Sh "C20" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 31 "/DDR_Banks/M1_A8" +Ne 88 "/FPGA_Sp41" Po 3346 -3346 $EndPAD $PAD Sh "C21" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 3739 -3346 $EndPAD $PAD Sh "C22" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 32 "/DDR_Banks/M1_A9" +Ne 89 "/FPGA_Sp42" Po 4133 -3346 $EndPAD $PAD Sh "D1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 33 "/DDR_Ban36" +Ne 90 "/FPGA_Sp43" Po -4133 -2952 $EndPAD $PAD Sh "D2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 34 "/DDR_Ban37" +Ne 17 "/DDR_Ban44" Po -3739 -2952 $EndPAD $PAD @@ -1244,7 +1447,7 @@ $PAD Sh "D4" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -2952 -2952 $EndPAD $PAD @@ -1258,42 +1461,42 @@ $PAD Sh "D6" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 35 "/FPGA_Sp38" +Ne 91 "/FPGA_Sp45" Po -2165 -2952 $EndPAD $PAD Sh "D7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 36 "/FPGA_Sp39" +Ne 54 "/Etherne46" Po -1771 -2952 $EndPAD $PAD Sh "D8" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 37 "/FPGA_Sp40" +Ne 92 "/FPGA_Sp47" Po -1377 -2952 $EndPAD $PAD Sh "D9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 38 "/FPGA_Sp41" +Ne 55 "/Etherne48" Po -983 -2952 $EndPAD $PAD Sh "D10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 39 "/FPGA_Sp42" +Ne 56 "/Etherne49" Po -590 -2952 $EndPAD $PAD Sh "D11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 40 "/Non_vol43" +Ne 93 "/FPGA_Sp50" Po -196 -2952 $EndPAD $PAD @@ -1314,35 +1517,35 @@ $PAD Sh "D14" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 41 "/Non_vol44" +Ne 94 "/FPGA_Sp51" Po 983 -2952 $EndPAD $PAD Sh "D15" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 0 "" +Ne 133 "/Non_vol52" Po 1377 -2952 $EndPAD $PAD Sh "D16" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 1771 -2952 $EndPAD $PAD Sh "D17" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 42 "/Non_vol7" +Ne 134 "/Non_vol7" Po 2165 -2952 $EndPAD $PAD Sh "D18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 2558 -2952 $EndPAD $PAD @@ -1363,35 +1566,35 @@ $PAD Sh "D21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 43 "/DDR_Ban45" +Ne 18 "/DDR_Ban53" Po 3739 -2952 $EndPAD $PAD Sh "D22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 44 "/DDR_Ban46" +Ne 19 "/DDR_Ban54" Po 4133 -2952 $EndPAD $PAD Sh "E1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 45 "/DDR_Banks/M0_A9" +Ne 34 "/DDR_Banks/M0_A9" Po -4133 -2558 $EndPAD $PAD Sh "E2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -3739 -2558 $EndPAD $PAD Sh "E3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 46 "/DDR_Banks/M0_A8" +Ne 33 "/DDR_Banks/M0_A8" Po -3346 -2558 $EndPAD $PAD @@ -1419,7 +1622,7 @@ $PAD Sh "E7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -1771 -2558 $EndPAD $PAD @@ -1433,7 +1636,7 @@ $PAD Sh "E9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -983 -2558 $EndPAD $PAD @@ -1461,7 +1664,7 @@ $PAD Sh "E13" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po 590 -2558 $EndPAD $PAD @@ -1475,21 +1678,21 @@ $PAD Sh "E15" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 1377 -2558 $EndPAD $PAD Sh "E16" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 47 "/Non_vol8" +Ne 135 "/Non_vol8" Po 1771 -2558 $EndPAD $PAD Sh "E17" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po 2165 -2558 $EndPAD $PAD @@ -1503,28 +1706,28 @@ $PAD Sh "E19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 2952 -2558 $EndPAD $PAD Sh "E20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 48 "/DDR_Banks/M1_A7" +Ne 38 "/DDR_Banks/M1_A7" Po 3346 -2558 $EndPAD $PAD Sh "E21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 3739 -2558 $EndPAD $PAD Sh "E22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 49 "/DDR_Banks/M1_A2" +Ne 35 "/DDR_Banks/M1_A2" Po 4133 -2558 $EndPAD $PAD @@ -1538,21 +1741,21 @@ $PAD Sh "F2" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 50 "/DDR_Ban47" +Ne 20 "/DDR_Ban55" Po -3739 -2165 $EndPAD $PAD Sh "F3" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 51 "/DDR_Banks/M0_A4" +Ne 95 "/FPGA_Sp56" Po -3346 -2165 $EndPAD $PAD Sh "F4" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -2952 -2165 $EndPAD $PAD @@ -1566,7 +1769,7 @@ $PAD Sh "F6" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -2165 -2165 $EndPAD $PAD @@ -1601,7 +1804,7 @@ $PAD Sh "F11" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -196 -2165 $EndPAD $PAD @@ -1657,63 +1860,63 @@ $PAD Sh "F19" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 52 "/DDR_Ban48" +Ne 96 "/FPGA_Sp57" Po 2952 -2165 $EndPAD $PAD Sh "F20" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 53 "/DDR_Banks/M1_A4" +Ne 36 "/DDR_Banks/M1_A4" Po 3346 -2165 $EndPAD $PAD Sh "F21" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 54 "/DDR_Banks/M1_A0" +Ne 97 "/FPGA_Sp58" Po 3739 -2165 $EndPAD $PAD Sh "F22" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 55 "/DDR_Banks/M1_A1" +Ne 98 "/FPGA_Sp59" Po 4133 -2165 $EndPAD $PAD Sh "G1" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 56 "/DDR_Ban49" +Ne 100 "/FPGA_Sp60" Po -4133 -1771 $EndPAD $PAD Sh "G2" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -3739 -1771 $EndPAD $PAD Sh "G3" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 57 "/DDR_Ban50" +Ne 101 "/FPGA_Sp61" Po -3346 -1771 $EndPAD $PAD Sh "G4" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 58 "/DDR_Ban51" +Ne 102 "/FPGA_Sp62" Po -2952 -1771 $EndPAD $PAD Sh "G5" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -2558 -1771 $EndPAD $PAD @@ -1748,7 +1951,7 @@ $PAD Sh "G10" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -590 -1771 $EndPAD $PAD @@ -1762,7 +1965,7 @@ $PAD Sh "G12" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 196 -1771 $EndPAD $PAD @@ -1776,7 +1979,7 @@ $PAD Sh "G14" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po 983 -1771 $EndPAD $PAD @@ -1804,28 +2007,28 @@ $PAD Sh "G18" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 2558 -1771 $EndPAD $PAD Sh "G19" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 59 "/DDR_Ban52" +Ne 103 "/FPGA_Sp63" Po 2952 -1771 $EndPAD $PAD Sh "G20" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 60 "/DDR_Banks/M1_A3" +Ne 104 "/FPGA_Sp64" Po 3346 -1771 $EndPAD $PAD Sh "G21" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 3739 -1771 $EndPAD $PAD @@ -1839,49 +2042,49 @@ $PAD Sh "H1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 61 "/DDR_Banks/M0_A1" +Ne 105 "/FPGA_Sp65" Po -4133 -1377 $EndPAD $PAD Sh "H2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 62 "/DDR_Banks/M0_A0" +Ne 106 "/FPGA_Sp66" Po -3739 -1377 $EndPAD $PAD Sh "H3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 63 "/DDR_Ban53" +Ne 107 "/FPGA_Sp67" Po -3346 -1377 $EndPAD $PAD Sh "H4" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 64 "/DDR_Ban54" +Ne 21 "/DDR_Ban68" Po -2952 -1377 $EndPAD $PAD Sh "H5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 65 "/DDR_Banks/M0_A2" +Ne 32 "/DDR_Banks/M0_A2" Po -2558 -1377 $EndPAD $PAD Sh "H6" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 66 "/DDR_Banks/M0_A7" +Ne 108 "/FPGA_Sp69" Po -2165 -1377 $EndPAD $PAD Sh "H7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -1771 -1377 $EndPAD $PAD @@ -1895,7 +2098,7 @@ $PAD Sh "H9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -983 -1377 $EndPAD $PAD @@ -1937,7 +2140,7 @@ $PAD Sh "H15" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 1377 -1377 $EndPAD $PAD @@ -1965,63 +2168,63 @@ $PAD Sh "H19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 67 "/DDR_Ban55" +Ne 109 "/FPGA_Sp70" Po 2952 -1377 $EndPAD $PAD Sh "H20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 68 "/DDR_Ban56" +Ne 22 "/DDR_Ban71" Po 3346 -1377 $EndPAD $PAD Sh "H21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 69 "/DDR_Ban57" +Ne 23 "/DDR_Ban72" Po 3739 -1377 $EndPAD $PAD Sh "H22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 70 "/DDR_Ban58" +Ne 24 "/DDR_Ban73" Po 4133 -1377 $EndPAD $PAD Sh "J1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 71 "/DDR_Ban59" +Ne 25 "/DDR_Ban74" Po -4133 -983 $EndPAD $PAD Sh "J2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -3739 -983 $EndPAD $PAD Sh "J3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 72 "/DDR_Ban60" +Ne 26 "/DDR_Ban75" Po -3346 -983 $EndPAD $PAD Sh "J4" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 73 "/DDR_Banks/M0_A6" +Ne 110 "/FPGA_Sp76" Po -2952 -983 $EndPAD $PAD Sh "J5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -2558 -983 $EndPAD $PAD @@ -2042,56 +2245,56 @@ $PAD Sh "J8" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -1377 -983 $EndPAD $PAD Sh "J9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -983 -983 $EndPAD $PAD Sh "J10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -590 -983 $EndPAD $PAD Sh "J11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -196 -983 $EndPAD $PAD Sh "J12" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po 196 -983 $EndPAD $PAD Sh "J13" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 590 -983 $EndPAD $PAD Sh "J14" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po 983 -983 $EndPAD $PAD Sh "J15" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 1377 -983 $EndPAD $PAD @@ -2105,84 +2308,84 @@ $PAD Sh "J17" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 75 "/DDR_Ban61" +Ne 27 "/DDR_Ban77" Po 2165 -983 $EndPAD $PAD Sh "J18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 2558 -983 $EndPAD $PAD Sh "J19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 76 "/DDR_Ban62" +Ne 28 "/DDR_Ban78" Po 2952 -983 $EndPAD $PAD Sh "J20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 77 "/DDR_Ban63" +Ne 29 "/DDR_Ban79" Po 3346 -983 $EndPAD $PAD Sh "J21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 3739 -983 $EndPAD $PAD Sh "J22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 78 "/DDR_Ban64" +Ne 111 "/FPGA_Sp80" Po 4133 -983 $EndPAD $PAD Sh "K1" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 79 "/DDR_Ban65" +Ne 112 "/FPGA_Sp81" Po -4133 -590 $EndPAD $PAD Sh "K2" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 80 "/DDR_Ban66" +Ne 113 "/FPGA_Sp82" Po -3739 -590 $EndPAD $PAD Sh "K3" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 81 "/DDR_Banks/M0_A5" +Ne 114 "/FPGA_Sp83" Po -3346 -590 $EndPAD $PAD Sh "K4" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 82 "/DDR_Ban67" +Ne 115 "/FPGA_Sp84" Po -2952 -590 $EndPAD $PAD Sh "K5" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 83 "/DDR_Ban68" +Ne 116 "/FPGA_Sp85" Po -2558 -590 $EndPAD $PAD Sh "K6" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 84 "/DDR_Banks/M0_A3" +Ne 117 "/FPGA_Sp86" Po -2165 -590 $EndPAD $PAD @@ -2203,21 +2406,21 @@ $PAD Sh "K9" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -983 -590 $EndPAD $PAD Sh "K10" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -590 -590 $EndPAD $PAD Sh "K11" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -196 -590 $EndPAD $PAD @@ -2231,21 +2434,21 @@ $PAD Sh "K13" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po 590 -590 $EndPAD $PAD Sh "K14" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 983 -590 $EndPAD $PAD Sh "K15" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 1377 -590 $EndPAD $PAD @@ -2259,7 +2462,7 @@ $PAD Sh "K17" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 85 "/DDR_Ban69" +Ne 118 "/FPGA_Sp87" Po 2165 -590 $EndPAD $PAD @@ -2273,28 +2476,28 @@ $PAD Sh "K19" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 86 "/DDR_Banks/M1_A6" +Ne 37 "/DDR_Banks/M1_A6" Po 2952 -590 $EndPAD $PAD Sh "K20" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 87 "/DDR_Banks/M1_A5" +Ne 119 "/FPGA_Sp88" Po 3346 -590 $EndPAD $PAD Sh "K21" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 88 "/DDR_Ban70" +Ne 120 "/FPGA_Sp89" Po 3739 -590 $EndPAD $PAD Sh "K22" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 89 "/DDR_Ban71" +Ne 121 "/FPGA_Sp90" Po 4133 -590 $EndPAD $PAD @@ -2308,28 +2511,28 @@ $PAD Sh "L2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -3739 -196 $EndPAD $PAD Sh "L3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 90 "/DDR_Ban72" +Ne 122 "/FPGA_Sp91" Po -3346 -196 $EndPAD $PAD Sh "L4" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 91 "/DDR_Ban73" +Ne 123 "/FPGA_Sp92" Po -2952 -196 $EndPAD $PAD Sh "L5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -2558 -196 $EndPAD $PAD @@ -2343,56 +2546,56 @@ $PAD Sh "L7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -1771 -196 $EndPAD $PAD Sh "L8" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -1377 -196 $EndPAD $PAD Sh "L9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -983 -196 $EndPAD $PAD Sh "L10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -590 -196 $EndPAD $PAD Sh "L11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -196 -196 $EndPAD $PAD Sh "L12" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po 196 -196 $EndPAD $PAD Sh "L13" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 590 -196 $EndPAD $PAD Sh "L14" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po 983 -196 $EndPAD $PAD @@ -2406,7 +2609,7 @@ $PAD Sh "L16" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 1771 -196 $EndPAD $PAD @@ -2420,28 +2623,28 @@ $PAD Sh "L18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 2558 -196 $EndPAD $PAD Sh "L19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 92 "/DDR_Ban74" +Ne 124 "/FPGA_Sp93" Po 2952 -196 $EndPAD $PAD Sh "L20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 93 "/DDR_Ban75" +Ne 125 "/FPGA_Sp94" Po 3346 -196 $EndPAD $PAD Sh "L21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 3739 -196 $EndPAD $PAD @@ -2455,21 +2658,21 @@ $PAD Sh "M1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 94 "/DDR_Ban76" +Ne 126 "/FPGA_Sp95" Po -4133 196 $EndPAD $PAD Sh "M2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 95 "/DDR_Ban77" +Ne 127 "/FPGA_Sp96" Po -3739 196 $EndPAD $PAD Sh "M3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 96 "/DDR_Ban78" +Ne 30 "/DDR_Ban97" Po -3346 196 $EndPAD $PAD @@ -2511,49 +2714,49 @@ $PAD Sh "M9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -983 196 $EndPAD $PAD Sh "M10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -590 196 $EndPAD $PAD Sh "M11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -196 196 $EndPAD $PAD Sh "M12" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 196 196 $EndPAD $PAD Sh "M13" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po 590 196 $EndPAD $PAD Sh "M14" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 983 196 $EndPAD $PAD Sh "M15" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 1377 196 $EndPAD $PAD @@ -2574,7 +2777,7 @@ $PAD Sh "M18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 97 "/FPGA_Sp79" +Ne 128 "/FPGA_Sp98" Po 2558 196 $EndPAD $PAD @@ -2588,42 +2791,42 @@ $PAD Sh "M20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 98 "/DDR_Ban80" +Ne 31 "/DDR_Ban99" Po 3346 196 $EndPAD $PAD Sh "M21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 99 "/DDR_Ban81" +Ne 5 "/DDR_Ban100" Po 3739 196 $EndPAD $PAD Sh "M22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 100 "/DDR_Ban82" +Ne 6 "/DDR_Ban101" Po 4133 196 $EndPAD $PAD Sh "N1" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 101 "/DDR_Ban83" +Ne 7 "/DDR_Ban102" Po -4133 590 $EndPAD $PAD Sh "N2" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -3739 590 $EndPAD $PAD Sh "N3" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 102 "/DDR_Ban84" +Ne 8 "/DDR_Ban103" Po -3346 590 $EndPAD $PAD @@ -2637,7 +2840,7 @@ $PAD Sh "N5" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -2558 590 $EndPAD $PAD @@ -2658,49 +2861,49 @@ $PAD Sh "N8" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -1377 590 $EndPAD $PAD Sh "N9" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -983 590 $EndPAD $PAD Sh "N10" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -590 590 $EndPAD $PAD Sh "N11" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -196 590 $EndPAD $PAD Sh "N12" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po 196 590 $EndPAD $PAD Sh "N13" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 590 590 $EndPAD $PAD Sh "N14" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po 983 590 $EndPAD $PAD @@ -2714,21 +2917,21 @@ $PAD Sh "N16" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 103 "/FPGA_Sp85" +Ne 57 "/FPGA_Sp104" Po 1771 590 $EndPAD $PAD Sh "N17" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 2165 590 $EndPAD $PAD Sh "N18" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 2558 590 $EndPAD $PAD @@ -2742,35 +2945,35 @@ $PAD Sh "N20" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 104 "/DDR_Ban86" +Ne 58 "/FPGA_Sp105" Po 3346 590 $EndPAD $PAD Sh "N21" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 3739 590 $EndPAD $PAD Sh "N22" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 105 "/DDR_Ban87" +Ne 59 "/FPGA_Sp106" Po 4133 590 $EndPAD $PAD Sh "P1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 106 "/DDR_Ban88" +Ne 60 "/FPGA_Sp107" Po -4133 983 $EndPAD $PAD Sh "P2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 107 "/DDR_Ban89" +Ne 9 "/DDR_Ban108" Po -3739 983 $EndPAD $PAD @@ -2819,42 +3022,42 @@ $PAD Sh "P9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -983 983 $EndPAD $PAD Sh "P10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -590 983 $EndPAD $PAD Sh "P11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -196 983 $EndPAD $PAD Sh "P12" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 196 983 $EndPAD $PAD Sh "P13" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po 590 983 $EndPAD $PAD Sh "P14" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 983 983 $EndPAD $PAD @@ -2875,14 +3078,14 @@ $PAD Sh "P17" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 108 "/FPGA_Sp90" +Ne 138 "/USB/USBA_VP" Po 2165 983 $EndPAD $PAD Sh "P18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 109 "/FPGA_Sp91" +Ne 137 "/USB/USBA_OE_N" Po 2558 983 $EndPAD $PAD @@ -2903,35 +3106,35 @@ $PAD Sh "P21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 110 "/DDR_Ban92" +Ne 10 "/DDR_Ban109" Po 3739 983 $EndPAD $PAD Sh "P22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 111 "/DDR_Ban93" +Ne 11 "/DDR_Ban110" Po 4133 983 $EndPAD $PAD Sh "R1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 112 "/DDR_Ban94" +Ne 61 "/FPGA_Sp111" Po -4133 1377 $EndPAD $PAD Sh "R2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -3739 1377 $EndPAD $PAD Sh "R3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 113 "/DDR_Ban95" +Ne 12 "/DDR_Ban112" Po -3346 1377 $EndPAD $PAD @@ -2945,14 +3148,14 @@ $PAD Sh "R5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -2558 1377 $EndPAD $PAD Sh "R6" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -2165 1377 $EndPAD $PAD @@ -2980,7 +3183,7 @@ $PAD Sh "R10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -590 1377 $EndPAD $PAD @@ -2994,7 +3197,7 @@ $PAD Sh "R12" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 196 1377 $EndPAD $PAD @@ -3008,7 +3211,7 @@ $PAD Sh "R14" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po 983 1377 $EndPAD $PAD @@ -3036,35 +3239,35 @@ $PAD Sh "R18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 2558 1377 $EndPAD $PAD Sh "R19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 114 "/FPGA_Sp96" +Ne 62 "/FPGA_Sp113" Po 2952 1377 $EndPAD $PAD Sh "R20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 115 "/DDR_Ban97" +Ne 13 "/DDR_Ban114" Po 3346 1377 $EndPAD $PAD Sh "R21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 3739 1377 $EndPAD $PAD Sh "R22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 116 "/DDR_Ban98" +Ne 63 "/FPGA_Sp115" Po 4133 1377 $EndPAD $PAD @@ -3078,7 +3281,7 @@ $PAD Sh "T2" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 117 "/DDR_Ban99" +Ne 14 "/DDR_Ban116" Po -3739 1771 $EndPAD $PAD @@ -3127,7 +3330,7 @@ $PAD Sh "T9" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 118 "N-000101" +Ne 145 "N-000140" Po -983 1771 $EndPAD $PAD @@ -3155,7 +3358,7 @@ $PAD Sh "T13" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 118 "N-000101" +Ne 145 "N-000140" Po 590 1771 $EndPAD $PAD @@ -3211,7 +3414,7 @@ $PAD Sh "T21" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 119 "/DDR_Ban100" +Ne 15 "/DDR_Ban117" Po 3739 1771 $EndPAD $PAD @@ -3225,21 +3428,21 @@ $PAD Sh "U1" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 120 "/DDR_Ban101" +Ne 64 "/FPGA_Sp118" Po -4133 2165 $EndPAD $PAD Sh "U2" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -3739 2165 $EndPAD $PAD Sh "U3" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 121 "/DDR_Ban102" +Ne 16 "/DDR_Ban119" Po -3346 2165 $EndPAD $PAD @@ -3253,7 +3456,7 @@ $PAD Sh "U5" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -2558 2165 $EndPAD $PAD @@ -3267,7 +3470,7 @@ $PAD Sh "U7" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -1771 2165 $EndPAD $PAD @@ -3295,7 +3498,7 @@ $PAD Sh "U11" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -196 2165 $EndPAD $PAD @@ -3344,7 +3547,7 @@ $PAD Sh "U18" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 2558 2165 $EndPAD $PAD @@ -3358,35 +3561,35 @@ $PAD Sh "U20" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 122 "/DDR_Ban103" +Ne 65 "/FPGA_Sp120" Po 3346 2165 $EndPAD $PAD Sh "U21" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 3739 2165 $EndPAD $PAD Sh "U22" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 123 "/DDR_Ban104" +Ne 66 "/FPGA_Sp121" Po 4133 2165 $EndPAD $PAD Sh "V1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 124 "/DDR_Ban105" +Ne 67 "/FPGA_Sp122" Po -4133 2558 $EndPAD $PAD Sh "V2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 125 "/DDR_Ban106" +Ne 68 "/FPGA_Sp123" Po -3739 2558 $EndPAD $PAD @@ -3400,7 +3603,7 @@ $PAD Sh "V4" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -2952 2558 $EndPAD $PAD @@ -3414,7 +3617,7 @@ $PAD Sh "V6" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -2165 2558 $EndPAD $PAD @@ -3428,7 +3631,7 @@ $PAD Sh "V8" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 118 "N-000101" +Ne 145 "N-000140" Po -1377 2558 $EndPAD $PAD @@ -3442,7 +3645,7 @@ $PAD Sh "V10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -590 2558 $EndPAD $PAD @@ -3456,7 +3659,7 @@ $PAD Sh "V12" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 118 "N-000101" +Ne 145 "N-000140" Po 196 2558 $EndPAD $PAD @@ -3470,7 +3673,7 @@ $PAD Sh "V14" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 983 2558 $EndPAD $PAD @@ -3484,7 +3687,7 @@ $PAD Sh "V16" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 118 "N-000101" +Ne 145 "N-000140" Po 1771 2558 $EndPAD $PAD @@ -3519,14 +3722,14 @@ $PAD Sh "V21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 126 "/DDR_Ban107" +Ne 69 "/FPGA_Sp124" Po 3739 2558 $EndPAD $PAD Sh "V22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 127 "/DDR_Ban108" +Ne 70 "/FPGA_Sp125" Po 4133 2558 $EndPAD $PAD @@ -3540,7 +3743,7 @@ $PAD Sh "W2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -3739 2952 $EndPAD $PAD @@ -3561,7 +3764,7 @@ $PAD Sh "W5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 118 "N-000101" +Ne 145 "N-000140" Po -2558 2952 $EndPAD $PAD @@ -3575,7 +3778,7 @@ $PAD Sh "W7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -1771 2952 $EndPAD $PAD @@ -3638,7 +3841,7 @@ $PAD Sh "W16" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 1771 2952 $EndPAD $PAD @@ -3659,7 +3862,7 @@ $PAD Sh "W19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 2952 2952 $EndPAD $PAD @@ -3673,7 +3876,7 @@ $PAD Sh "W21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 3739 2952 $EndPAD $PAD @@ -3855,7 +4058,7 @@ $PAD Sh "AA3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 118 "N-000101" +Ne 145 "N-000140" Po -3346 3739 $EndPAD $PAD @@ -3869,7 +4072,7 @@ $PAD Sh "AA5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -2558 3739 $EndPAD $PAD @@ -3883,7 +4086,7 @@ $PAD Sh "AA7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 118 "N-000101" +Ne 145 "N-000140" Po -1771 3739 $EndPAD $PAD @@ -3897,7 +4100,7 @@ $PAD Sh "AA9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -983 3739 $EndPAD $PAD @@ -3911,7 +4114,7 @@ $PAD Sh "AA11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 118 "N-000101" +Ne 145 "N-000140" Po -196 3739 $EndPAD $PAD @@ -3925,7 +4128,7 @@ $PAD Sh "AA13" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 590 3739 $EndPAD $PAD @@ -3939,7 +4142,7 @@ $PAD Sh "AA15" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 118 "N-000101" +Ne 145 "N-000140" Po 1377 3739 $EndPAD $PAD @@ -3953,7 +4156,7 @@ $PAD Sh "AA17" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 2165 3739 $EndPAD $PAD @@ -3967,7 +4170,7 @@ $PAD Sh "AA19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 118 "N-000101" +Ne 145 "N-000140" Po 2952 3739 $EndPAD $PAD @@ -3995,7 +4198,7 @@ $PAD Sh "AB1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -4133 4133 $EndPAD $PAD @@ -4142,7 +4345,7 @@ $PAD Sh "AB22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 4133 4133 $EndPAD $EndMODULE FGG484bga-p10 @@ -4164,105 +4367,105 @@ $PAD Sh "12" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -1613 1082 $EndPAD $PAD Sh "11" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 17 "/FPGA_Sp24" +Ne 77 "/FPGA_Sp26" Po -1613 885 $EndPAD $PAD Sh "10" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 39 "/FPGA_Sp42" +Ne 56 "/Etherne49" Po -1613 688 $EndPAD $PAD Sh "9" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 6 "/FPGA_Sp16" +Ne 44 "/Etherne16" Po -1613 491 $EndPAD $PAD Sh "8" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -1613 295 $EndPAD $PAD Sh "7" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -1613 98 $EndPAD $PAD Sh "6" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 24 "/FPGA_Sp30" +Ne 49 "/Etherne33" Po -1613 -98 $EndPAD $PAD Sh "5" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 5 "/FPGA_Sp15" +Ne 43 "/Etherne15" Po -1613 -295 $EndPAD $PAD Sh "4" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 16 "/FPGA_Sp23" +Ne 76 "/FPGA_Sp25" Po -1613 -491 $EndPAD $PAD Sh "3" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 23 "/FPGA_Sp29" +Ne 83 "/FPGA_Sp32" Po -1613 -688 $EndPAD $PAD Sh "2" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 22 "/FPGA_Sp28" +Ne 82 "/FPGA_Sp31" Po -1613 -885 $EndPAD $PAD Sh "1" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 4 "/FPGA_Sp11" +Ne 40 "/Etherne11" Po -1613 -1082 $EndPAD $PAD Sh "48" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 35 "/FPGA_Sp38" +Ne 91 "/FPGA_Sp45" Po -1082 -1613 $EndPAD $PAD Sh "47" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 129 "/Etherne4" +Ne 53 "/Etherne4" Po -885 -1613 $EndPAD $PAD Sh "46" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 27 "/FPGA_Sp33" +Ne 52 "/Etherne36" Po -688 -1613 $EndPAD $PAD @@ -4276,7 +4479,7 @@ $PAD Sh "44" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -295 -1613 $EndPAD $PAD @@ -4297,56 +4500,56 @@ $PAD Sh "41" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 130 "N-000336" +Ne 147 "N-000329" Po 295 -1613 $EndPAD $PAD Sh "40" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 131 "N-000331" +Ne 152 "N-000336" Po 491 -1613 $EndPAD $PAD Sh "39" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 688 -1613 $EndPAD $PAD Sh "38" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 132 "/Etherne3" +Ne 48 "/Etherne3" Po 885 -1613 $EndPAD $PAD Sh "37" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 133 "N-000329" +Ne 150 "N-000333" Po 1082 -1613 $EndPAD $PAD Sh "25" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 3 "/FPGA_Sp14" +Ne 71 "/FPGA_Sp14" Po 1613 1082 $EndPAD $PAD Sh "26" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 134 "/Etherne12" +Ne 41 "/Etherne12" Po 1613 885 $EndPAD $PAD Sh "27" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 135 "/Etherne13" +Ne 42 "/Etherne13" Po 1613 688 $EndPAD $PAD @@ -4374,21 +4577,21 @@ $PAD Sh "31" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 136 "/Etherne2" +Ne 47 "/Etherne2" Po 1613 -98 $EndPAD $PAD Sh "32" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 137 "N-000330" +Ne 151 "N-000335" Po 1613 -295 $EndPAD $PAD Sh "33" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 138 "N-000337" +Ne 148 "N-000330" Po 1613 -491 $EndPAD $PAD @@ -4402,98 +4605,98 @@ $PAD Sh "35" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 1613 -885 $EndPAD $PAD Sh "36" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 1613 -1082 $EndPAD $PAD Sh "13" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 139 "/Etherne1" +Ne 39 "/Etherne1" Po -1082 1613 $EndPAD $PAD Sh "14" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 7 "/FPGA_Sp17" +Ne 72 "/FPGA_Sp17" Po -885 1613 $EndPAD $PAD Sh "15" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 37 "/FPGA_Sp40" +Ne 92 "/FPGA_Sp47" Po -688 1613 $EndPAD $PAD Sh "16" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 38 "/FPGA_Sp41" +Ne 55 "/Etherne48" Po -491 1613 $EndPAD $PAD Sh "17" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 25 "/FPGA_Sp31" +Ne 50 "/Etherne34" Po -295 1613 $EndPAD $PAD Sh "18" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 26 "/FPGA_Sp32" +Ne 51 "/Etherne35" Po -98 1613 $EndPAD $PAD Sh "19" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 8 "/FPGA_Sp18" +Ne 45 "/Etherne18" Po 98 1613 $EndPAD $PAD Sh "20" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 36 "/FPGA_Sp39" +Ne 54 "/Etherne46" Po 295 1613 $EndPAD $PAD Sh "21" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 9 "/FPGA_Sp19" +Ne 46 "/Etherne19" Po 491 1613 $EndPAD $PAD Sh "22" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 18 "/FPGA_Sp25" +Ne 78 "/FPGA_Sp27" Po 688 1613 $EndPAD $PAD Sh "23" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 885 1613 $EndPAD $PAD Sh "24" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po 1082 1613 $EndPAD $EndMODULE LQFP48 @@ -4757,28 +4960,28 @@ $PAD Sh "6" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 140 "/Non_vol109" +Ne 75 "/FPGA_Sp24" Po -1280 3850 $EndPAD $PAD Sh "7" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 140 "/Non_vol109" +Ne 75 "/FPGA_Sp24" Po -1090 3850 $EndPAD $PAD Sh "8" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 0 "" +Ne 80 "/FPGA_Sp29" Po -890 3850 $EndPAD $PAD Sh "9" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 0 "" +Ne 87 "/FPGA_Sp40" Po -690 3850 $EndPAD $PAD @@ -4799,14 +5002,14 @@ $PAD Sh "12" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -100 3850 $EndPAD $PAD Sh "13" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 100 3850 $EndPAD $PAD @@ -4827,28 +5030,28 @@ $PAD Sh "16" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 0 "" +Ne 133 "/Non_vol52" Po 690 3850 $EndPAD $PAD Sh "17" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 0 "" +Ne 131 "/Non_vol23" Po 880 3850 $EndPAD $PAD Sh "18" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 0 "" +Ne 86 "/FPGA_Sp39" Po 1080 3850 $EndPAD $PAD Sh "19" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po 1280 3850 $EndPAD $PAD @@ -4918,28 +5121,28 @@ $PAD Sh "29" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 41 "/Non_vol44" +Ne 94 "/FPGA_Sp51" Po 1470 -3850 $EndPAD $PAD Sh "30" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 12 "/Non_vol22" +Ne 74 "/FPGA_Sp22" Po 1280 -3850 $EndPAD $PAD Sh "31" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 29 "/Non_vol35" +Ne 85 "/FPGA_Sp38" Po 1080 -3850 $EndPAD $PAD Sh "32" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 11 "/Non_vol21" +Ne 130 "/Non_vol21" Po 880 -3850 $EndPAD $PAD @@ -4967,14 +5170,14 @@ $PAD Sh "36" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 100 -3850 $EndPAD $PAD Sh "37" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -100 -3850 $EndPAD $PAD @@ -5002,28 +5205,28 @@ $PAD Sh "41" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 19 "/Non_vol26" +Ne 79 "/FPGA_Sp28" Po -890 -3850 $EndPAD $PAD Sh "42" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 28 "/Non_vol34" +Ne 84 "/FPGA_Sp37" Po -1090 -3850 $EndPAD $PAD Sh "43" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 40 "/Non_vol43" +Ne 93 "/FPGA_Sp50" Po -1280 -3850 $EndPAD $PAD Sh "44" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 10 "/Non_vol20" +Ne 73 "/FPGA_Sp20" Po -1480 -3850 $EndPAD $PAD @@ -5056,105 +5259,105 @@ Po -2270 -3850 $EndPAD $EndMODULE NAND-48TSOP $MODULE MICROSD-500901 -Po 61730 16770 1800 15 4C5F34DA 4B76F5E2 ~~ +Po 60827 16732 0 0 4C5F34DA 4B76F5E2 ~~ Li MICROSD-500901 Sc 4B76F5E2 AR /4C4227FE/4B76F5E2 Op 0 0 0 -T0 -160 -652 157 157 1800 20 N V 21 N"J1" -T1 0 118 118 118 0 20 N I 21 N"MICROSD" -DS -2709 1675 -2709 -507 60 21 -DS -2707 3095 -2707 2747 60 21 -DS 2709 1699 2709 -500 60 21 -DS 2706 3088 2706 2767 60 21 -DS -1989 -1553 -1989 -1013 60 21 -DS -1989 -1013 1573 -1016 60 21 -DS 1573 -1016 1573 -1548 60 21 -DS -2707 -1555 2707 -1555 60 21 -DS -2707 3091 2707 3091 60 21 +T0 -160 652 157 157 0 20 M V 20 N"J1" +T1 0 -118 118 118 1800 20 M I 20 N"MICROSD" +DS -2709 -1675 -2709 507 60 20 +DS -2707 -3095 -2707 -2747 60 20 +DS 2709 -1699 2709 500 60 20 +DS 2706 -3088 2706 -2767 60 20 +DS -1989 1553 -1989 1013 60 20 +DS -1989 1013 1573 1016 60 20 +DS 1573 1016 1573 1548 60 20 +DS -2707 1555 2707 1555 60 20 +DS -2707 -3091 2707 -3091 60 20 $PAD -Sh "1" R 315 590 0 0 1800 +Sh "1" R 315 590 0 0 0 Dr 0 0 0 -At STD N 00888000 -Ne 13 "/Non_vol5" +At STD N 00440001 +Ne 132 "/Non_vol5" Po -1299 0 $EndPAD $PAD -Sh "2" R 315 590 0 0 1800 +Sh "2" R 315 590 0 0 0 Dr 0 0 0 -At STD N 00888000 -Ne 30 "/Non_vol6" +At STD N 00440001 +Ne 99 "/FPGA_Sp6" Po -866 0 $EndPAD $PAD -Sh "3" R 315 590 0 0 1800 +Sh "3" R 315 590 0 0 0 Dr 0 0 0 -At STD N 00888000 -Ne 42 "/Non_vol7" +At STD N 00440001 +Ne 134 "/Non_vol7" Po -433 0 $EndPAD $PAD -Sh "4" R 315 590 0 0 1800 +Sh "4" R 315 590 0 0 0 Dr 0 0 0 -At STD N 00888000 +At STD N 00440001 Ne 0 "" Po 0 0 $EndPAD $PAD -Sh "5" R 315 590 0 0 1800 +Sh "5" R 315 590 0 0 0 Dr 0 0 0 -At STD N 00888000 -Ne 47 "/Non_vol8" +At STD N 00440001 +Ne 135 "/Non_vol8" Po 433 0 $EndPAD $PAD -Sh "6" R 315 590 0 0 1800 +Sh "6" R 315 590 0 0 0 Dr 0 0 0 -At STD N 00888000 -Ne 2 "GND" +At STD N 00440001 +Ne 140 "GND" Po 866 0 $EndPAD $PAD -Sh "7" R 315 590 0 0 1800 +Sh "7" R 315 590 0 0 0 Dr 0 0 0 -At STD N 00888000 -Ne 14 "/Non_vol9" +At STD N 00440001 +Ne 136 "/Non_vol9" Po 1299 0 $EndPAD $PAD -Sh "8" R 315 590 0 0 1800 +Sh "8" R 315 590 0 0 0 Dr 0 0 0 -At STD N 00888000 -Ne 20 "/Non_vol10" +At STD N 00440001 +Ne 129 "/Non_vol10" Po 1732 0 $EndPAD $PAD -Sh "CASE" R 571 787 0 0 1800 +Sh "CASE" R 571 787 0 0 0 Dr 0 0 0 -At STD N 00888000 -Ne 2 "GND" -Po 2707 -1024 +At STD N 00440001 +Ne 140 "GND" +Po 2707 1024 $EndPAD $PAD -Sh "CASE" R 571 787 0 0 1800 +Sh "CASE" R 571 787 0 0 0 Dr 0 0 0 -At STD N 00888000 -Ne 2 "GND" -Po -2707 -1024 +At STD N 00440001 +Ne 140 "GND" +Po -2707 1024 $EndPAD $PAD -Sh "CASE" R 571 787 0 0 1800 +Sh "CASE" R 571 787 0 0 0 Dr 0 0 0 -At STD N 00888000 -Ne 2 "GND" -Po -2707 2244 +At STD N 00440001 +Ne 140 "GND" +Po -2707 -2244 $EndPAD $PAD -Sh "CASE" R 571 787 0 0 1800 +Sh "CASE" R 571 787 0 0 0 Dr 0 0 0 -At STD N 00888000 -Ne 2 "GND" -Po 2707 2244 +At STD N 00440001 +Ne 140 "GND" +Po 2707 -2244 $EndPAD $EndMODULE MICROSD-500901 $MODULE SD-48025 @@ -5173,112 +5376,112 @@ $PAD Sh "13" C 1646 1646 0 0 1800 Dr 1252 0 0 At STD N 0CC0FFFF -Ne 141 "N-000338" +Ne 149 "N-000331" Po 2250 0 $EndPAD $PAD Sh "13" C 984 984 0 0 1800 Dr 640 0 0 At STD N 0CC0FFFF -Ne 141 "N-000338" +Ne 149 "N-000331" Po 3100 -1200 $EndPAD $PAD Sh "14" C 1646 1646 0 0 1800 Dr 1252 0 0 At STD N 0CC0FFFF -Ne 141 "N-000338" +Ne 149 "N-000331" Po -2250 0 $EndPAD $PAD Sh "14" C 984 984 0 0 1800 Dr 640 0 0 At STD N 0CC0FFFF -Ne 141 "N-000338" +Ne 149 "N-000331" Po -3100 -1200 $EndPAD $PAD Sh "1" R 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 130 "N-000336" +Ne 147 "N-000329" Po -1750 -2500 $EndPAD $PAD Sh "3" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 128 "N-000069" +Ne 139 "3.3V" Po -750 -2500 $EndPAD $PAD Sh "5" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 2 "GND" +Ne 140 "GND" Po 250 -2500 $EndPAD $PAD Sh "7" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 138 "N-000337" +Ne 148 "N-000330" Po 1250 -2500 $EndPAD $PAD Sh "2" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 131 "N-000331" +Ne 152 "N-000336" Po -1250 -3500 $EndPAD $PAD Sh "4" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 2 "GND" +Ne 140 "GND" Po -250 -3500 $EndPAD $PAD Sh "6" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 128 "N-000069" +Ne 139 "3.3V" Po 750 -3500 $EndPAD $PAD Sh "8" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 137 "N-000330" +Ne 151 "N-000335" Po 1750 -3500 $EndPAD $PAD Sh "9" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 128 "N-000069" +Ne 139 "3.3V" Po -2150 -5400 $EndPAD $PAD Sh "10" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 142 "N-000334" +Ne 146 "N-000327" Po -1150 -5400 $EndPAD $PAD Sh "11" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 128 "N-000069" +Ne 139 "3.3V" Po 1150 -5400 $EndPAD $PAD Sh "12" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 143 "N-000333" +Ne 153 "N-000338" Po 2150 -5400 $EndPAD $EndMODULE SD-48025 @@ -5307,35 +5510,35 @@ $PAD Sh "1" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -767 -1112 $EndPAD $PAD Sh "2" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 114 "/FPGA_Sp96" +Ne 62 "/FPGA_Sp113" Po -511 -1112 $EndPAD $PAD Sh "3" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 103 "/FPGA_Sp85" +Ne 57 "/FPGA_Sp104" Po -255 -1112 $EndPAD $PAD Sh "4" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 108 "/FPGA_Sp90" +Ne 138 "/USB/USBA_VP" Po 0 -1112 $EndPAD $PAD Sh "5" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 97 "/FPGA_Sp79" +Ne 128 "/FPGA_Sp98" Po 255 -1112 $EndPAD $PAD @@ -5349,42 +5552,42 @@ $PAD Sh "7" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 2 "GND" +Ne 140 "GND" Po 767 -1112 $EndPAD $PAD Sh "8" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 2 "GND" +Ne 140 "GND" Po 767 1112 $EndPAD $PAD Sh "9" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 109 "/FPGA_Sp91" +Ne 137 "/USB/USBA_OE_N" Po 511 1112 $EndPAD $PAD Sh "10" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 144 "N-000367" +Ne 161 "N-000357" Po 255 1112 $EndPAD $PAD Sh "11" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 145 "N-000364" +Ne 159 "N-000353" Po 0 1112 $EndPAD $PAD Sh "12" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -255 1112 $EndPAD $PAD @@ -5398,7 +5601,7 @@ $PAD Sh "14" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -767 1112 $EndPAD $EndMODULE TSSOP-14 @@ -5420,91 +5623,91 @@ $PAD Sh "1" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -4094 2176 $EndPAD $PAD Sh "2" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 104 "/DDR_Ban86" +Ne 58 "/FPGA_Sp105" Po -3838 2176 $EndPAD $PAD Sh "3" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -3582 2176 $EndPAD $PAD Sh "4" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 105 "/DDR_Ban87" +Ne 59 "/FPGA_Sp106" Po -3326 2176 $EndPAD $PAD Sh "5" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 99 "/DDR_Ban81" +Ne 5 "/DDR_Ban100" Po -3070 2176 $EndPAD $PAD Sh "6" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -2814 2176 $EndPAD $PAD Sh "7" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 100 "/DDR_Ban82" +Ne 6 "/DDR_Ban101" Po -2558 2176 $EndPAD $PAD Sh "8" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 77 "/DDR_Ban63" +Ne 29 "/DDR_Ban79" Po -2303 2176 $EndPAD $PAD Sh "9" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -2047 2176 $EndPAD $PAD Sh "10" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 78 "/DDR_Ban64" +Ne 111 "/FPGA_Sp80" Po -1791 2176 $EndPAD $PAD Sh "11" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 88 "/DDR_Ban70" +Ne 120 "/FPGA_Sp89" Po -1535 2176 $EndPAD $PAD Sh "12" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -1279 2176 $EndPAD $PAD Sh "13" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 89 "/DDR_Ban71" +Ne 121 "/FPGA_Sp90" Po -1023 2176 $EndPAD $PAD @@ -5518,14 +5721,14 @@ $PAD Sh "15" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -511 2176 $EndPAD $PAD Sh "16" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 93 "/DDR_Ban75" +Ne 125 "/FPGA_Sp94" Po -255 2176 $EndPAD $PAD @@ -5539,7 +5742,7 @@ $PAD Sh "18" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 255 2176 $EndPAD $PAD @@ -5553,35 +5756,35 @@ $PAD Sh "20" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 92 "/DDR_Ban74" +Ne 124 "/FPGA_Sp93" Po 767 2176 $EndPAD $PAD Sh "21" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 67 "/DDR_Ban55" +Ne 109 "/FPGA_Sp70" Po 1023 2176 $EndPAD $PAD Sh "22" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 70 "/DDR_Ban58" +Ne 24 "/DDR_Ban73" Po 1279 2176 $EndPAD $PAD Sh "23" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 69 "/DDR_Ban57" +Ne 23 "/DDR_Ban72" Po 1535 2176 $EndPAD $PAD Sh "24" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 1791 2176 $EndPAD $PAD @@ -5595,119 +5798,119 @@ $PAD Sh "26" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 75 "/DDR_Ban61" +Ne 27 "/DDR_Ban77" Po 2302 2176 $EndPAD $PAD Sh "27" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 85 "/DDR_Ban69" +Ne 118 "/FPGA_Sp87" Po 2558 2176 $EndPAD $PAD Sh "28" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 59 "/DDR_Ban52" +Ne 103 "/FPGA_Sp63" Po 2814 2176 $EndPAD $PAD Sh "29" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 54 "/DDR_Banks/M1_A0" +Ne 97 "/FPGA_Sp58" Po 3070 2176 $EndPAD $PAD Sh "30" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 55 "/DDR_Banks/M1_A1" +Ne 98 "/FPGA_Sp59" Po 3326 2176 $EndPAD $PAD Sh "31" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 49 "/DDR_Banks/M1_A2" +Ne 35 "/DDR_Banks/M1_A2" Po 3582 2176 $EndPAD $PAD Sh "32" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 60 "/DDR_Banks/M1_A3" +Ne 104 "/FPGA_Sp64" Po 3838 2176 $EndPAD $PAD Sh "33" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 4094 2176 $EndPAD $PAD Sh "34" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 4094 -2176 $EndPAD $PAD Sh "35" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 53 "/DDR_Banks/M1_A4" +Ne 36 "/DDR_Banks/M1_A4" Po 3838 -2176 $EndPAD $PAD Sh "36" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 87 "/DDR_Banks/M1_A5" +Ne 119 "/FPGA_Sp88" Po 3582 -2176 $EndPAD $PAD Sh "37" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 86 "/DDR_Banks/M1_A6" +Ne 37 "/DDR_Banks/M1_A6" Po 3326 -2176 $EndPAD $PAD Sh "38" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 48 "/DDR_Banks/M1_A7" +Ne 38 "/DDR_Banks/M1_A7" Po 3070 -2176 $EndPAD $PAD Sh "39" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 31 "/DDR_Banks/M1_A8" +Ne 88 "/FPGA_Sp41" Po 2814 -2176 $EndPAD $PAD Sh "40" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 32 "/DDR_Banks/M1_A9" +Ne 89 "/FPGA_Sp42" Po 2558 -2176 $EndPAD $PAD Sh "41" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 52 "/DDR_Ban48" +Ne 96 "/FPGA_Sp57" Po 2303 -2176 $EndPAD $PAD Sh "42" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 44 "/DDR_Ban46" +Ne 19 "/DDR_Ban54" Po 2047 -2176 $EndPAD $PAD @@ -5721,42 +5924,42 @@ $PAD Sh "44" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 76 "/DDR_Ban62" +Ne 28 "/DDR_Ban78" Po 1535 -2176 $EndPAD $PAD Sh "45" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 43 "/DDR_Ban45" +Ne 18 "/DDR_Ban53" Po 1279 -2176 $EndPAD $PAD Sh "46" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 68 "/DDR_Ban56" +Ne 22 "/DDR_Ban71" Po 1023 -2176 $EndPAD $PAD Sh "47" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 98 "/DDR_Ban80" +Ne 31 "/DDR_Ban99" Po 767 -2176 $EndPAD $PAD Sh "48" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 511 -2176 $EndPAD $PAD Sh "49" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 146 "N-000053" +Ne 142 "N-000049" Po 255 -2176 $EndPAD $PAD @@ -5770,14 +5973,14 @@ $PAD Sh "51" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 119 "/DDR_Ban100" +Ne 15 "/DDR_Ban117" Po -255 -2176 $EndPAD $PAD Sh "52" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -511 -2176 $EndPAD $PAD @@ -5791,91 +5994,91 @@ $PAD Sh "54" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 110 "/DDR_Ban92" +Ne 10 "/DDR_Ban109" Po -1023 -2176 $EndPAD $PAD Sh "55" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -1279 -2176 $EndPAD $PAD Sh "56" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 111 "/DDR_Ban93" +Ne 11 "/DDR_Ban110" Po -1535 -2176 $EndPAD $PAD Sh "57" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 115 "/DDR_Ban97" +Ne 13 "/DDR_Ban114" Po -1791 -2176 $EndPAD $PAD Sh "58" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -2047 -2176 $EndPAD $PAD Sh "59" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 116 "/DDR_Ban98" +Ne 63 "/FPGA_Sp115" Po -2303 -2176 $EndPAD $PAD Sh "60" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 122 "/DDR_Ban103" +Ne 65 "/FPGA_Sp120" Po -2558 -2176 $EndPAD $PAD Sh "61" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -2814 -2176 $EndPAD $PAD Sh "62" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 123 "/DDR_Ban104" +Ne 66 "/FPGA_Sp121" Po -3070 -2176 $EndPAD $PAD Sh "63" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 126 "/DDR_Ban107" +Ne 69 "/FPGA_Sp124" Po -3326 -2176 $EndPAD $PAD Sh "64" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -3582 -2176 $EndPAD $PAD Sh "65" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 127 "/DDR_Ban108" +Ne 70 "/FPGA_Sp125" Po -3838 -2176 $EndPAD $PAD Sh "66" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -4094 -2176 $EndPAD $EndMODULE TSOP-66 @@ -5897,91 +6100,91 @@ $PAD Sh "1" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -4094 2176 $EndPAD $PAD Sh "2" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 102 "/DDR_Ban84" +Ne 8 "/DDR_Ban103" Po -3838 2176 $EndPAD $PAD Sh "3" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -3582 2176 $EndPAD $PAD Sh "4" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 101 "/DDR_Ban83" +Ne 7 "/DDR_Ban102" Po -3326 2176 $EndPAD $PAD Sh "5" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 95 "/DDR_Ban77" +Ne 127 "/FPGA_Sp96" Po -3070 2176 $EndPAD $PAD Sh "6" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -2814 2176 $EndPAD $PAD Sh "7" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 94 "/DDR_Ban76" +Ne 126 "/FPGA_Sp95" Po -2558 2176 $EndPAD $PAD Sh "8" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 72 "/DDR_Ban60" +Ne 26 "/DDR_Ban75" Po -2303 2176 $EndPAD $PAD Sh "9" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -2047 2176 $EndPAD $PAD Sh "10" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 71 "/DDR_Ban59" +Ne 25 "/DDR_Ban74" Po -1791 2176 $EndPAD $PAD Sh "11" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 80 "/DDR_Ban66" +Ne 113 "/FPGA_Sp82" Po -1535 2176 $EndPAD $PAD Sh "12" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -1279 2176 $EndPAD $PAD Sh "13" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 79 "/DDR_Ban65" +Ne 112 "/FPGA_Sp81" Po -1023 2176 $EndPAD $PAD @@ -5995,14 +6198,14 @@ $PAD Sh "15" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -511 2176 $EndPAD $PAD Sh "16" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 90 "/DDR_Ban72" +Ne 122 "/FPGA_Sp91" Po -255 2176 $EndPAD $PAD @@ -6016,7 +6219,7 @@ $PAD Sh "18" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 255 2176 $EndPAD $PAD @@ -6030,35 +6233,35 @@ $PAD Sh "20" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 91 "/DDR_Ban73" +Ne 123 "/FPGA_Sp92" Po 767 2176 $EndPAD $PAD Sh "21" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 50 "/DDR_Ban47" +Ne 20 "/DDR_Ban55" Po 1023 2176 $EndPAD $PAD Sh "22" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 82 "/DDR_Ban67" +Ne 115 "/FPGA_Sp84" Po 1279 2176 $EndPAD $PAD Sh "23" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 83 "/DDR_Ban68" +Ne 116 "/FPGA_Sp85" Po 1535 2176 $EndPAD $PAD Sh "24" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 1791 2176 $EndPAD $PAD @@ -6072,119 +6275,119 @@ $PAD Sh "26" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 57 "/DDR_Ban50" +Ne 101 "/FPGA_Sp61" Po 2302 2176 $EndPAD $PAD Sh "27" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 56 "/DDR_Ban49" +Ne 100 "/FPGA_Sp60" Po 2558 2176 $EndPAD $PAD Sh "28" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 58 "/DDR_Ban51" +Ne 102 "/FPGA_Sp62" Po 2814 2176 $EndPAD $PAD Sh "29" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 62 "/DDR_Banks/M0_A0" +Ne 106 "/FPGA_Sp66" Po 3070 2176 $EndPAD $PAD Sh "30" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 61 "/DDR_Banks/M0_A1" +Ne 105 "/FPGA_Sp65" Po 3326 2176 $EndPAD $PAD Sh "31" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 65 "/DDR_Banks/M0_A2" +Ne 32 "/DDR_Banks/M0_A2" Po 3582 2176 $EndPAD $PAD Sh "32" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 84 "/DDR_Banks/M0_A3" +Ne 117 "/FPGA_Sp86" Po 3838 2176 $EndPAD $PAD Sh "33" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po 4094 2176 $EndPAD $PAD Sh "34" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 4094 -2176 $EndPAD $PAD Sh "35" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 51 "/DDR_Banks/M0_A4" +Ne 95 "/FPGA_Sp56" Po 3838 -2176 $EndPAD $PAD Sh "36" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 81 "/DDR_Banks/M0_A5" +Ne 114 "/FPGA_Sp83" Po 3582 -2176 $EndPAD $PAD Sh "37" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 73 "/DDR_Banks/M0_A6" +Ne 110 "/FPGA_Sp76" Po 3326 -2176 $EndPAD $PAD Sh "38" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 66 "/DDR_Banks/M0_A7" +Ne 108 "/FPGA_Sp69" Po 3070 -2176 $EndPAD $PAD Sh "39" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 46 "/DDR_Banks/M0_A8" +Ne 33 "/DDR_Banks/M0_A8" Po 2814 -2176 $EndPAD $PAD Sh "40" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 45 "/DDR_Banks/M0_A9" +Ne 34 "/DDR_Banks/M0_A9" Po 2558 -2176 $EndPAD $PAD Sh "41" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 21 "/DDR_Ban27" +Ne 81 "/FPGA_Sp30" Po 2303 -2176 $EndPAD $PAD Sh "42" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 33 "/DDR_Ban36" +Ne 90 "/FPGA_Sp43" Po 2047 -2176 $EndPAD $PAD @@ -6198,42 +6401,42 @@ $PAD Sh "44" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 63 "/DDR_Ban53" +Ne 107 "/FPGA_Sp67" Po 1535 -2176 $EndPAD $PAD Sh "45" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 34 "/DDR_Ban37" +Ne 17 "/DDR_Ban44" Po 1279 -2176 $EndPAD $PAD Sh "46" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 64 "/DDR_Ban54" +Ne 21 "/DDR_Ban68" Po 1023 -2176 $EndPAD $PAD Sh "47" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 96 "/DDR_Ban78" +Ne 30 "/DDR_Ban97" Po 767 -2176 $EndPAD $PAD Sh "48" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 511 -2176 $EndPAD $PAD Sh "49" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 147 "N-000052" +Ne 143 "N-000050" Po 255 -2176 $EndPAD $PAD @@ -6247,14 +6450,14 @@ $PAD Sh "51" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 117 "/DDR_Ban99" +Ne 14 "/DDR_Ban116" Po -255 -2176 $EndPAD $PAD Sh "52" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -511 -2176 $EndPAD $PAD @@ -6268,91 +6471,91 @@ $PAD Sh "54" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 107 "/DDR_Ban89" +Ne 9 "/DDR_Ban108" Po -1023 -2176 $EndPAD $PAD Sh "55" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -1279 -2176 $EndPAD $PAD Sh "56" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 106 "/DDR_Ban88" +Ne 60 "/FPGA_Sp107" Po -1535 -2176 $EndPAD $PAD Sh "57" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 113 "/DDR_Ban95" +Ne 12 "/DDR_Ban112" Po -1791 -2176 $EndPAD $PAD Sh "58" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -2047 -2176 $EndPAD $PAD Sh "59" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 112 "/DDR_Ban94" +Ne 61 "/FPGA_Sp111" Po -2303 -2176 $EndPAD $PAD Sh "60" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 121 "/DDR_Ban102" +Ne 16 "/DDR_Ban119" Po -2558 -2176 $EndPAD $PAD Sh "61" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -2814 -2176 $EndPAD $PAD Sh "62" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 120 "/DDR_Ban101" +Ne 64 "/FPGA_Sp118" Po -3070 -2176 $EndPAD $PAD Sh "63" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 125 "/DDR_Ban106" +Ne 68 "/FPGA_Sp123" Po -3326 -2176 $EndPAD $PAD Sh "64" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -3582 -2176 $EndPAD $PAD Sh "65" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 124 "/DDR_Ban105" +Ne 67 "/FPGA_Sp122" Po -3838 -2176 $EndPAD $PAD Sh "66" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po -4094 -2176 $EndPAD $EndMODULE TSOP-66 @@ -6373,14 +6576,14 @@ $PAD Sh "1" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 148 "N-000368" +Ne 157 "N-000351" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6401,14 +6604,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 141 "N-000338" +Ne 149 "N-000331" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6429,14 +6632,14 @@ $PAD Sh "1" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 143 "N-000333" +Ne 153 "N-000338" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 135 "/Etherne13" +Ne 42 "/Etherne13" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6457,14 +6660,14 @@ $PAD Sh "1" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 142 "N-000334" +Ne 146 "N-000327" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 134 "/Etherne12" +Ne 41 "/Etherne12" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6485,14 +6688,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 137 "N-000330" +Ne 151 "N-000335" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6513,14 +6716,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 138 "N-000337" +Ne 148 "N-000330" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6541,14 +6744,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 131 "N-000331" +Ne 152 "N-000336" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6569,14 +6772,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 130 "N-000336" +Ne 147 "N-000329" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6597,14 +6800,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 133 "N-000329" +Ne 150 "N-000333" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6625,14 +6828,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 4 "/FPGA_Sp11" +Ne 40 "/Etherne11" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6653,14 +6856,14 @@ $PAD Sh "1" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 148 "N-000368" +Ne 157 "N-000351" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6681,14 +6884,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 141 "N-000338" +Ne 149 "N-000331" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6709,14 +6912,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6737,14 +6940,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6765,14 +6968,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 129 "/Etherne4" +Ne 53 "/Etherne4" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 149 "N-000340" +Ne 154 "N-000347" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6793,14 +6996,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 132 "/Etherne3" +Ne 48 "/Etherne3" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6821,14 +7024,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 136 "/Etherne2" +Ne 47 "/Etherne2" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 149 "N-000340" +Ne 154 "N-000347" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6849,14 +7052,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6877,14 +7080,14 @@ $PAD Sh "1" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 150 "N-000339" +Ne 155 "N-000349" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 149 "N-000340" +Ne 154 "N-000347" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6905,14 +7108,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6933,14 +7136,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 139 "/Etherne1" +Ne 39 "/Etherne1" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6961,14 +7164,14 @@ $PAD Sh "1" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 144 "N-000367" +Ne 161 "N-000357" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -6989,14 +7192,14 @@ $PAD Sh "1" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 145 "N-000364" +Ne 159 "N-000353" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7017,14 +7220,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 136 "/Etherne2" +Ne 47 "/Etherne2" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 129 "/Etherne4" +Ne 53 "/Etherne4" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7045,14 +7248,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 132 "/Etherne3" +Ne 48 "/Etherne3" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7073,14 +7276,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 150 "N-000339" +Ne 155 "N-000349" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 136 "/Etherne2" +Ne 47 "/Etherne2" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7101,14 +7304,14 @@ $PAD Sh "1" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 151 "N-000366" +Ne 156 "N-000350" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7129,14 +7332,14 @@ $PAD Sh "1" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 151 "N-000366" +Ne 156 "N-000350" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7157,14 +7360,14 @@ $PAD Sh "1" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 151 "N-000366" +Ne 156 "N-000350" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7185,14 +7388,14 @@ $PAD Sh "1" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 132 "/Etherne3" +Ne 48 "/Etherne3" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7213,14 +7416,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7241,14 +7444,14 @@ $PAD Sh "1" R 355 984 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 152 "N-000369" +Ne 162 "N-000358" Po -570 0 $EndPAD $PAD Sh "2" R 355 984 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "+5V" +Ne 4 "+5V" Po 570 0 $EndPAD $EndMODULE 1210 @@ -7274,56 +7477,56 @@ $PAD Sh "1" R 470 470 0 0 1800 Dr 360 0 0 At STD N 0CC0FFFF -Ne 154 "N-000365" +Ne 158 "N-000352" Po 0 -2362 $EndPAD $PAD Sh "2" C 470 470 0 0 1800 Dr 360 0 0 At STD N 0CC0FFFF -Ne 144 "N-000367" +Ne 161 "N-000357" Po 0 -1575 $EndPAD $PAD Sh "3" C 470 470 0 0 1800 Dr 360 0 0 At STD N 0CC0FFFF -Ne 145 "N-000364" +Ne 159 "N-000353" Po 0 -787 $EndPAD $PAD Sh "3" C 470 470 0 0 1800 Dr 360 0 0 At STD N 0CC0FFFF -Ne 145 "N-000364" +Ne 159 "N-000353" Po 0 0 $EndPAD $PAD Sh "S1" C 670 670 0 0 1800 Dr 532 0 0 At STD N 0CC0FFFF -Ne 148 "N-000368" +Ne 157 "N-000351" Po 1077 287 $EndPAD $PAD Sh "S2" C 670 670 0 0 1800 Dr 532 0 0 At STD N 0CC0FFFF -Ne 148 "N-000368" +Ne 157 "N-000351" Po -1077 287 $EndPAD $PAD Sh "S3" C 670 670 0 0 1800 Dr 532 0 0 At STD N 0CC0FFFF -Ne 148 "N-000368" +Ne 157 "N-000351" Po 1077 -2468 $EndPAD $PAD Sh "S4" C 670 670 0 0 1800 Dr 532 0 0 At STD N 0CC0FFFF -Ne 148 "N-000368" +Ne 157 "N-000351" Po -1077 -2468 $EndPAD $EndMODULE USB-48204 @@ -7344,14 +7547,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 147 "N-000052" +Ne 143 "N-000050" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7372,14 +7575,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 147 "N-000052" +Ne 143 "N-000050" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 155 "N-000051" +Ne 144 "N-000052" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7400,14 +7603,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 146 "N-000053" +Ne 142 "N-000049" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 156 "N-000054" +Ne 141 "N-000048" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7428,14 +7631,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 146 "N-000053" +Ne 142 "N-000049" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7456,14 +7659,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 147 "N-000052" +Ne 143 "N-000050" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7484,14 +7687,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 147 "N-000052" +Ne 143 "N-000050" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 155 "N-000051" +Ne 144 "N-000052" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7512,14 +7715,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 146 "N-000053" +Ne 142 "N-000049" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7540,14 +7743,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7568,14 +7771,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7596,14 +7799,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7624,14 +7827,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7652,14 +7855,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7680,14 +7883,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7708,14 +7911,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7736,14 +7939,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7764,14 +7967,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7792,14 +7995,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7820,14 +8023,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7848,14 +8051,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7876,14 +8079,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 146 "N-000053" +Ne 142 "N-000049" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 156 "N-000054" +Ne 141 "N-000048" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7904,14 +8107,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 157 "N-000363" +Ne 160 "N-000355" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7932,14 +8135,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 152 "N-000369" +Ne 162 "N-000358" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 154 "N-000365" +Ne 158 "N-000352" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7960,7 +8163,7 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 158 "N-000355" +Ne 164 "N-000366" Po -294 0 $EndPAD $PAD @@ -7995,7 +8198,7 @@ $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -8016,14 +8219,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 159 "N-000361" +Ne 163 "N-000359" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8044,14 +8247,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 159 "N-000361" +Ne 163 "N-000359" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8072,14 +8275,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 160 "N-000359" +Ne 165 "N-000367" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8100,14 +8303,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 161 "N-000358" +Ne 167 "N-000369" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -8128,14 +8331,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 162 "N-000360" +Ne 166 "N-000368" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -8156,14 +8359,14 @@ $PAD Sh "1" R 275 510 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 160 "N-000359" +Ne 165 "N-000367" Po -373 0 $EndPAD $PAD Sh "2" R 275 510 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -8184,14 +8387,14 @@ $PAD Sh "1" R 275 510 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 160 "N-000359" +Ne 165 "N-000367" Po -373 0 $EndPAD $PAD Sh "2" R 275 510 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -8212,14 +8415,14 @@ $PAD Sh "1" R 355 984 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 158 "N-000355" +Ne 164 "N-000366" Po -570 0 $EndPAD $PAD Sh "2" R 355 984 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "+5V" +Ne 4 "+5V" Po 570 0 $EndPAD $EndMODULE 1210 @@ -8248,7 +8451,7 @@ $PAD Sh "1" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -767 -1112 $EndPAD $PAD @@ -8290,14 +8493,14 @@ $PAD Sh "7" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 2 "GND" +Ne 140 "GND" Po 767 -1112 $EndPAD $PAD Sh "8" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 2 "GND" +Ne 140 "GND" Po 767 1112 $EndPAD $PAD @@ -8311,21 +8514,21 @@ $PAD Sh "10" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 161 "N-000358" +Ne 167 "N-000369" Po 255 1112 $EndPAD $PAD Sh "11" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 162 "N-000360" +Ne 166 "N-000368" Po 0 1112 $EndPAD $PAD Sh "12" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -255 1112 $EndPAD $PAD @@ -8339,38 +8542,10 @@ $PAD Sh "14" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 128 "N-000069" +Ne 139 "3.3V" Po -767 1112 $EndPAD $EndMODULE TSSOP-14 -$MODULE 0805 -Po 52400 40310 0 15 4C5FF890 4C61D151 ~~ -Li 0805 -Sc 4C61D151 -AR /4C421DD3/4C61D151 -Op 0 0 0 -At SMD -T0 0 -150 200 200 0 40 N V 25 N"C33" -T1 0 150 200 200 0 40 N I 25 N"1uF" -DS -561 305 -561 -305 50 21 -DS -561 -305 561 -305 50 21 -DS 561 -305 561 305 50 21 -DS 561 305 -561 305 50 21 -$PAD -Sh "1" R 275 510 0 0 0 -Dr 0 0 0 -At SMD N 00888000 -Ne 1 "+2.5V" -Po -373 0 -$EndPAD -$PAD -Sh "2" R 275 510 0 0 0 -Dr 0 0 0 -At SMD N 00888000 -Ne 2 "GND" -Po 373 0 -$EndPAD -$EndMODULE 0805 $MODULE 0402 Po 66700 44860 900 15 4C5FF890 4C656D53 ~~ Li 0402 @@ -8388,14 +8563,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8416,14 +8591,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8444,14 +8619,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8472,14 +8647,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8500,14 +8675,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8528,14 +8703,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8556,14 +8731,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8584,14 +8759,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8612,14 +8787,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8640,14 +8815,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8668,14 +8843,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8696,14 +8871,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8724,14 +8899,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8752,14 +8927,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8780,14 +8955,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8808,14 +8983,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8836,14 +9011,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8864,14 +9039,14 @@ $PAD Sh "1" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -373 0 $EndPAD $PAD Sh "2" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -8892,14 +9067,14 @@ $PAD Sh "1" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -373 0 $EndPAD $PAD Sh "2" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -8920,14 +9095,14 @@ $PAD Sh "1" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -373 0 $EndPAD $PAD Sh "2" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -8948,14 +9123,14 @@ $PAD Sh "1" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -373 0 $EndPAD $PAD Sh "2" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -8976,14 +9151,14 @@ $PAD Sh "1" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -373 0 $EndPAD $PAD Sh "2" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -9004,14 +9179,14 @@ $PAD Sh "1" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -373 0 $EndPAD $PAD Sh "2" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -9032,14 +9207,14 @@ $PAD Sh "1" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -373 0 $EndPAD $PAD Sh "2" R 275 510 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -9060,14 +9235,14 @@ $PAD Sh "1" R 355 984 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -570 0 $EndPAD $PAD Sh "2" R 355 984 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 570 0 $EndPAD $EndMODULE 1210 @@ -9088,14 +9263,14 @@ $PAD Sh "1" R 355 984 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -570 0 $EndPAD $PAD Sh "2" R 355 984 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 570 0 $EndPAD $EndMODULE 1210 @@ -9116,14 +9291,14 @@ $PAD Sh "1" R 355 984 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "+3.3V" +Ne 3 "+3.3V" Po -570 0 $EndPAD $PAD Sh "2" R 355 984 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 570 0 $EndPAD $EndMODULE 1210 @@ -9144,14 +9319,14 @@ $PAD Sh "1" R 355 984 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -570 0 $EndPAD $PAD Sh "2" R 355 984 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 570 0 $EndPAD $EndMODULE 1210 @@ -9172,14 +9347,14 @@ $PAD Sh "1" R 355 984 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 1 "+2.5V" +Ne 2 "+2.5V" Po -570 0 $EndPAD $PAD Sh "2" R 355 984 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 570 0 $EndPAD $EndMODULE 1210 @@ -9200,19 +9375,19 @@ $PAD Sh "1" R 355 984 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -570 0 $EndPAD $PAD Sh "2" R 355 984 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 570 0 $EndPAD $EndMODULE 1210 $MODULE 0402 -Po 0 0 0 15 4C5FF890 4C656AC0 ~~ +Po 45669 44882 0 15 4C5FF890 4C656AC0 ~~ Li 0402 Sc 4C656AC0 AR /4C431A63/4C656AC0 @@ -9228,17 +9403,127 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "+1.2V" +Ne 1 "+1.2V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 2 "GND" +Ne 140 "GND" Po 176 0 $EndPAD $EndMODULE 0402 +$MODULE 1206 +Po 49016 39173 1800 15 4C5FF890 4C61D151 ~~ +Li 1206 +Sc 4C61D151 +AR /4C421DD3/4C61D151 +Op 0 0 0 +At SMD +T0 0 -150 200 200 1800 40 N V 25 N"C33" +T1 0 150 200 200 1800 40 N I 25 N"10uF" +DS -798 384 -798 -384 50 21 +DS -798 -384 798 -384 50 21 +DS 798 -384 798 384 50 21 +DS 798 384 -798 384 50 21 +$PAD +Sh "1" R 355 668 0 0 1800 +Dr 0 0 0 +At SMD N 00888000 +Ne 2 "+2.5V" +Po -570 0 +$EndPAD +$PAD +Sh "2" R 355 668 0 0 1800 +Dr 0 0 0 +At SMD N 00888000 +Ne 140 "GND" +Po 570 0 +$EndPAD +$EndMODULE 1206 +$MODULE SO8E +Po 60630 39961 900 15 42806F54 4C65A876 ~~ +Li SO8E +Cd module CMS SOJ 8 pins etroit +Kw CMS SOJ +Sc 4C65A876 +AR /4C4227FE/4C65A75D +Op 0 0 0 +At SMD +T0 0 -350 450 450 900 60 N V 21 N"U8" +T1 0 400 350 350 900 60 N V 21 N"X25X64MB" +DS -1050 700 -1050 750 50 21 +DS -1050 750 1050 750 50 21 +DS 1050 -750 -1050 -750 50 21 +DS -1050 -750 -1050 700 50 21 +DS -1050 -200 -850 -200 50 21 +DS -850 -200 -850 200 50 21 +DS -850 200 -1050 200 50 21 +DS 1050 -750 1050 750 50 21 +$PAD +Sh "8" R 200 450 0 0 900 +Dr 0 0 0 +At SMD N 00888000 +Ne 0 "" +Po -750 -1050 +$EndPAD +$PAD +Sh "1" R 200 450 0 0 900 +Dr 0 0 0 +At SMD N 00888000 +Ne 0 "" +Po -750 1050 +$EndPAD +$PAD +Sh "7" R 200 450 0 0 900 +Dr 0 0 0 +At SMD N 00888000 +Ne 0 "" +Po -250 -1050 +$EndPAD +$PAD +Sh "6" R 200 450 0 0 900 +Dr 0 0 0 +At SMD N 00888000 +Ne 0 "" +Po 250 -1050 +$EndPAD +$PAD +Sh "5" R 200 450 0 0 900 +Dr 0 0 0 +At SMD N 00888000 +Ne 0 "" +Po 750 -1050 +$EndPAD +$PAD +Sh "2" R 200 450 0 0 900 +Dr 0 0 0 +At SMD N 00888000 +Ne 0 "" +Po -250 1050 +$EndPAD +$PAD +Sh "3" R 200 450 0 0 900 +Dr 0 0 0 +At SMD N 00888000 +Ne 0 "" +Po 250 1050 +$EndPAD +$PAD +Sh "4" R 200 450 0 0 900 +Dr 0 0 0 +At SMD N 00888000 +Ne 0 "" +Po 750 1050 +$EndPAD +$SHAPE3D +Na "smd/cms_so8.wrl" +Sc 0.500000 0.320000 0.500000 +Of 0.000000 0.000000 0.000000 +Ro 0.000000 0.000000 0.000000 +$EndSHAPE3D +$EndMODULE SO8E $COTATION Ge 0 24 0 Va 21654 @@ -9251,7 +9536,7 @@ S1 0 67520 41534 67077 41764 120 S2 0 67520 41534 67077 41304 120 S3 0 45866 41534 46309 41764 120 S4 0 45866 41534 46309 41304 120 -$EndCOTATION +$endCOTATION $COTATION Ge 0 24 0 Va 32087 @@ -9264,7 +9549,7 @@ S1 0 74802 45276 74572 44833 120 S2 0 74802 45276 75032 44833 120 S3 0 74802 13189 74572 13632 120 S4 0 74802 13189 75032 13632 120 -$EndCOTATION +$endCOTATION $TRACK $EndTRACK $ZONE diff --git a/kicad/xue-rnc/xue-rnc.cmp b/kicad/xue-rnc/xue-rnc.cmp index a7647fa..64de5c9 100644 --- a/kicad/xue-rnc/xue-rnc.cmp +++ b/kicad/xue-rnc/xue-rnc.cmp @@ -1,4 +1,4 @@ -Cmp-Mod V01 Created by CVpcb (20090216-final) date = Fri 13 Aug 2010 11:22:25 AM COT +Cmp-Mod V01 Created by CvPCB (2010-07-15 BZR 2414)-unstable date = Fri 13 Aug 2010 03:17:50 PM COT BeginCmp TimeStamp = /4C4320F3/4C5D7F9F; @@ -227,15 +227,15 @@ EndCmp BeginCmp TimeStamp = /4C421DD3/4C61D151; Reference = C33; -ValeurCmp = 1uF; -IdModule = 0805; +ValeurCmp = 10uF; +IdModule = 1206; EndCmp BeginCmp TimeStamp = /4C421DD3/4C61D1D4; Reference = C34; -ValeurCmp = 1uF; -IdModule = 0805; +ValeurCmp = 10uF; +IdModule = 1206; EndCmp BeginCmp @@ -721,6 +721,13 @@ ValeurCmp = MIC2550AYTS; IdModule = TSSOP-14; EndCmp +BeginCmp +TimeStamp = /4C4227FE/4C65A75D; +Reference = U8; +ValeurCmp = X25X64MB; +IdModule = SO8E; +EndCmp + BeginCmp TimeStamp = /4C5F1EDC/4C5F2CA7; Reference = V1; diff --git a/kicad/xue-rnc/xue-rnc.net b/kicad/xue-rnc/xue-rnc.net index 6055bf9..7939267 100644 --- a/kicad/xue-rnc/xue-rnc.net +++ b/kicad/xue-rnc/xue-rnc.net @@ -1,7 +1,7 @@ -# EESchema Netlist Version 1.1 created Fri 13 Aug 2010 11:22:25 AM COT +# EESchema Netlist Version 1.1 created Fri 13 Aug 2010 03:17:50 PM COT ( ( /4C4320F3/4C5D7F9F 0603 C1 1uF - ( 1 N-000069 ) + ( 1 3.3V ) ( 2 GND ) ) ( /4C4320F3/4C5D80ED 0402 C2 C @@ -9,20 +9,20 @@ ( 2 GND ) ) ( /4C4320F3/4C5D7FA1 0402 C3 100nF - ( 1 N-000069 ) + ( 1 3.3V ) ( 2 GND ) ) ( /4C4320F3/4C5D80F0 0402 C4 C - ( 1 N-000339 ) - ( 2 N-000340 ) + ( 1 N-000349 ) + ( 2 N-000347 ) ) ( /4C4320F3/4C5D7FA3 0402 C5 100nF - ( 1 N-000069 ) + ( 1 3.3V ) ( 2 GND ) ) ( /4C4320F3/4C5D8104 0402 C6 C ( 1 /Etherne2 ) - ( 2 N-000340 ) + ( 2 N-000347 ) ) ( /4C4320F3/4C5D7FA5 0603 C7 1uF ( 1 /Etherne3 ) @@ -34,51 +34,51 @@ ) ( /4C4320F3/4C5D8114 0402 C9 C ( 1 /Etherne4 ) - ( 2 N-000340 ) + ( 2 N-000347 ) ) ( /4C4320F3/4C5D7E41 0402 C10 100nF - ( 1 N-000069 ) + ( 1 3.3V ) ( 2 GND ) ) ( /4C4320F3/4C5D7E43 0402 C11 100nF - ( 1 N-000069 ) + ( 1 3.3V ) ( 2 GND ) ) ( /4C4320F3/4C5D7DCB 0402 C12 47nF - ( 1 N-000338 ) + ( 1 N-000331 ) ( 2 GND ) ) ( /4C5F1EDC/4C5F2033 0603 C13 1uF - ( 1 N-000366 ) + ( 1 N-000350 ) ( 2 GND ) ) ( /4C5F1EDC/4C5F2037 0603 C14 1uF - ( 1 N-000366 ) + ( 1 N-000350 ) ( 2 GND ) ) ( /4C5F1EDC/4C5F2039 0603 C15 470nF - ( 1 N-000366 ) + ( 1 N-000350 ) ( 2 GND ) ) ( /4C5F1EDC/4C5F2D1E 0402 C16 4.7nF - ( 1 N-000368 ) + ( 1 N-000351 ) ( 2 GND ) ) ( /4C421DD3/4C61CC73 0402 C17 100nF ( 1 +2.5V ) - ( 2 N-000052 ) + ( 2 N-000050 ) ) ( /4C421DD3/4C61CC96 0402 C18 100nF - ( 1 N-000052 ) - ( 2 N-000051 ) + ( 1 N-000050 ) + ( 2 N-000052 ) ) ( /4C421DD3/4C61CCE3 0402 C19 100nF ( 1 +2.5V ) - ( 2 N-000053 ) + ( 2 N-000049 ) ) ( /4C421DD3/4C61CCE2 0402 C20 100nF - ( 1 N-000053 ) - ( 2 N-000054 ) + ( 1 N-000049 ) + ( 2 N-000048 ) ) ( /4C421DD3/4C61CF2F 0603 C21 1uF ( 1 +2.5V ) @@ -128,28 +128,28 @@ ( 1 +2.5V ) ( 2 GND ) ) - ( /4C421DD3/4C61D151 0805 C33 1uF + ( /4C421DD3/4C61D151 1206 C33 10uF ( 1 +2.5V ) ( 2 GND ) ) - ( /4C421DD3/4C61D1D4 0805 C34 1uF + ( /4C421DD3/4C61D1D4 1206 C34 10uF ( 1 +2.5V ) ( 2 GND ) ) ( /4C5F1EDC/4C6552BE 0805 C35 1uF - ( 1 N-000359 ) + ( 1 N-000367 ) ( 2 GND ) ) ( /4C5F1EDC/4C6552BD 0805 C36 1uF - ( 1 N-000359 ) + ( 1 N-000367 ) ( 2 GND ) ) ( /4C5F1EDC/4C6552BC 0402 C37 470nF - ( 1 N-000359 ) + ( 1 N-000367 ) ( 2 GND ) ) ( /4C5F1EDC/4C6552B7 0402 C38 4.7nF - ( 1 N-000361 ) + ( 1 N-000359 ) ( 2 GND ) ) ( /4C431A63/4C656A80 1210 C39 100uF @@ -277,16 +277,16 @@ ( 2 GND ) ) ( /4C5F1EDC/4C5F2B55 1210 F1 MICROSMD075F - ( 1 N-000369 ) + ( 1 N-000358 ) ( 2 +5V ) ) ( /4C5F1EDC/4C6552BA 1210 F2 MICROSMD075F - ( 1 N-000355 ) + ( 1 N-000366 ) ( 2 +5V ) ) ( /4C4227FE/4B76F5E2 MICROSD-500901 J1 MICROSD ( 1 /Non_vol5 ) - ( 2 /Non_vol6 ) + ( 2 /FPGA_Sp6 ) ( 3 /Non_vol7 ) ( 4 ? ) ( 5 /Non_vol8 ) @@ -298,37 +298,37 @@ ( COM GND ) ) ( /4C4320F3/4C5D6F5A SD-48025 J4 RJ45-48025 - ( 1 N-000336 ) - ( 2 N-000331 ) - ( 3 N-000069 ) + ( 1 N-000329 ) + ( 2 N-000336 ) + ( 3 3.3V ) ( 4 GND ) ( 5 GND ) - ( 6 N-000069 ) - ( 7 N-000337 ) - ( 8 N-000330 ) - ( 9 N-000069 ) - ( 10 N-000334 ) - ( 11 N-000069 ) - ( 12 N-000333 ) - ( 13 N-000338 ) - ( 14 N-000338 ) + ( 6 3.3V ) + ( 7 N-000330 ) + ( 8 N-000335 ) + ( 9 3.3V ) + ( 10 N-000327 ) + ( 11 3.3V ) + ( 12 N-000338 ) + ( 13 N-000331 ) + ( 14 N-000331 ) ) ( /4C5F1EDC/4C5F23DD USB-48204 J5 USB-48204-0001 - ( 1 N-000365 ) - ( 2 N-000367 ) - ( 3 N-000364 ) - ( 4 N-000363 ) - ( S1 N-000368 ) - ( S2 N-000368 ) - ( S3 N-000368 ) - ( S4 N-000368 ) + ( 1 N-000352 ) + ( 2 N-000357 ) + ( 3 N-000353 ) + ( 4 N-000355 ) + ( S1 N-000351 ) + ( S2 N-000351 ) + ( S3 N-000351 ) + ( S4 N-000351 ) ) ( /4C4320F3/4C5D80F3 0603 L1 INDUCTOR - ( 1 N-000339 ) + ( 1 N-000349 ) ( 2 /Etherne2 ) ) ( /4C4320F3/4C5D7FB7 0603 L2 FB - ( 1 N-000069 ) + ( 1 3.3V ) ( 2 /Etherne3 ) ) ( /4C4320F3/4C5D810A 0603 L3 INDUCTOR @@ -336,15 +336,15 @@ ( 2 /Etherne4 ) ) ( /4C5F1EDC/4C63F252 0603 L4 FB - ( 1 N-000369 ) - ( 2 N-000365 ) + ( 1 N-000358 ) + ( 2 N-000352 ) ) ( /4C5F1EDC/4C63F248 0603 L5 FB - ( 1 N-000363 ) + ( 1 N-000355 ) ( 2 GND ) ) ( /4C5F1EDC/4C6552B0 0603 L6 FB - ( 1 N-000355 ) + ( 1 N-000366 ) ( 2 ? ) ) ( /4C5F1EDC/4C6552B1 0603 L7 FB @@ -352,81 +352,81 @@ ( 2 GND ) ) ( /4C4320F3/4C5D7F39 0402 R1 4.7K - ( 1 /FPGA_Sp11 ) - ( 2 N-000069 ) + ( 1 /Etherne11 ) + ( 2 3.3V ) ) ( /4C4320F3/4C5D7ECF 0402 R2 6.65K - ( 1 N-000329 ) + ( 1 N-000333 ) ( 2 GND ) ) ( /4C4320F3/4C5D7AFE 0402 R3 49.9 - ( 1 N-000069 ) - ( 2 N-000336 ) + ( 1 3.3V ) + ( 2 N-000329 ) ) ( /4C4320F3/4C5D7AFC 0402 R4 49.9 - ( 1 N-000069 ) - ( 2 N-000331 ) + ( 1 3.3V ) + ( 2 N-000336 ) ) ( /4C4320F3/4C5D7AF7 0402 R5 49.9 - ( 1 N-000069 ) - ( 2 N-000337 ) - ) - ( /4C4320F3/4C5D7AF9 0402 R6 49.9 - ( 1 N-000069 ) + ( 1 3.3V ) ( 2 N-000330 ) ) + ( /4C4320F3/4C5D7AF9 0402 R6 49.9 + ( 1 3.3V ) + ( 2 N-000335 ) + ) ( /4C4320F3/4C5D719D 0402 R7 220 - ( 1 N-000334 ) + ( 1 N-000327 ) ( 2 /Etherne12 ) ) ( /4C4320F3/4C5D71DB 0402 R8 220 - ( 1 N-000333 ) + ( 1 N-000338 ) ( 2 /Etherne13 ) ) ( /4C4320F3/4C5D7DC4 0402 R9 1M - ( 1 N-000338 ) + ( 1 N-000331 ) ( 2 GND ) ) ( /4C5F1EDC/4C5F2D27 0402 R10 1M - ( 1 N-000368 ) + ( 1 N-000351 ) ( 2 GND ) ) ( /4C421DD3/4C61CD4A 0402 R11 1K_1% ( 1 +2.5V ) - ( 2 N-000052 ) + ( 2 N-000050 ) ) ( /4C421DD3/4C61CDB5 0402 R12 1K_1% - ( 1 N-000052 ) - ( 2 N-000051 ) + ( 1 N-000050 ) + ( 2 N-000052 ) ) ( /4C421DD3/4C61CE31 0402 R13 1K_1% ( 1 +2.5V ) - ( 2 N-000053 ) + ( 2 N-000049 ) ) ( /4C421DD3/4C61CE30 0402 R14 1K_1% - ( 1 N-000053 ) - ( 2 N-000054 ) + ( 1 N-000049 ) + ( 2 N-000048 ) ) ( /4C5F1EDC/4C6552B6 0402 R15 1M - ( 1 N-000361 ) + ( 1 N-000359 ) ( 2 GND ) ) ( /4C431A63/4C431E53 FGG484bga-p10 U1 XC6SLX45FGG484 ( A1 GND ) ( A2 ? ) ( A4 /FPGA_Sp14 ) - ( A5 /FPGA_Sp11 ) - ( A6 /FPGA_Sp15 ) - ( A7 /FPGA_Sp16 ) + ( A5 /Etherne11 ) + ( A6 /Etherne15 ) + ( A7 /Etherne16 ) ( A8 /FPGA_Sp17 ) - ( A9 /FPGA_Sp18 ) - ( A10 /FPGA_Sp19 ) - ( A11 /Non_vol20 ) + ( A9 /Etherne18 ) + ( A10 /Etherne19 ) + ( A11 /FPGA_Sp20 ) ( A12 /Non_vol21 ) - ( A13 /Non_vol22 ) + ( A13 /FPGA_Sp22 ) ( A14 ? ) - ( A15 ? ) - ( A16 ? ) + ( A15 /Non_vol23 ) + ( A16 /FPGA_Sp24 ) ( A17 /Non_vol5 ) ( A18 /Non_vol9 ) ( A19 ? ) @@ -435,23 +435,23 @@ ( A22 GND ) ( AA1 ? ) ( AA2 ? ) - ( AA3 N-000101 ) + ( AA3 N-000140 ) ( AA4 ? ) ( AA5 GND ) ( AA6 ? ) - ( AA7 N-000101 ) + ( AA7 N-000140 ) ( AA8 ? ) ( AA9 GND ) ( AA10 ? ) - ( AA11 N-000101 ) + ( AA11 N-000140 ) ( AA12 ? ) ( AA13 GND ) ( AA14 ? ) - ( AA15 N-000101 ) + ( AA15 N-000140 ) ( AA16 ? ) ( AA17 GND ) ( AA18 ? ) - ( AA19 N-000101 ) + ( AA19 N-000140 ) ( AA20 ? ) ( AA21 ? ) ( AA22 ? ) @@ -482,66 +482,66 @@ ( B3 ? ) ( B4 +3.3V ) ( B5 GND ) - ( B6 /FPGA_Sp23 ) + ( B6 /FPGA_Sp25 ) ( B7 +3.3V ) - ( B8 /FPGA_Sp24 ) + ( B8 /FPGA_Sp26 ) ( B9 GND ) - ( B10 /FPGA_Sp25 ) + ( B10 /FPGA_Sp27 ) ( B11 +3.3V ) - ( B12 /Non_vol26 ) + ( B12 /FPGA_Sp28 ) ( B13 GND ) ( B14 ? ) ( B15 +3.3V ) - ( B16 ? ) + ( B16 /FPGA_Sp29 ) ( B17 GND ) ( B18 /Non_vol10 ) ( B19 +3.3V ) ( B20 ? ) ( B21 ? ) ( B22 ? ) - ( C1 /DDR_Ban27 ) + ( C1 /FPGA_Sp30 ) ( C2 +2.5V ) ( C3 ? ) ( C4 ? ) - ( C5 /FPGA_Sp28 ) - ( C6 /FPGA_Sp29 ) - ( C7 /FPGA_Sp30 ) - ( C8 /FPGA_Sp31 ) - ( C9 /FPGA_Sp32 ) - ( C10 /FPGA_Sp33 ) + ( C5 /FPGA_Sp31 ) + ( C6 /FPGA_Sp32 ) + ( C7 /Etherne33 ) + ( C8 /Etherne34 ) + ( C9 /Etherne35 ) + ( C10 /Etherne36 ) ( C11 ? ) - ( C12 /Non_vol34 ) - ( C13 /Non_vol35 ) + ( C12 /FPGA_Sp37 ) + ( C13 /FPGA_Sp38 ) ( C14 ? ) - ( C15 ? ) - ( C16 ? ) - ( C17 /Non_vol6 ) + ( C15 /FPGA_Sp39 ) + ( C16 /FPGA_Sp40 ) + ( C17 /FPGA_Sp6 ) ( C18 ? ) - ( C20 /DDR_Banks/M1_A8 ) + ( C20 /FPGA_Sp41 ) ( C21 +2.5V ) - ( C22 /DDR_Banks/M1_A9 ) - ( D1 /DDR_Ban36 ) - ( D2 /DDR_Ban37 ) + ( C22 /FPGA_Sp42 ) + ( D1 /FPGA_Sp43 ) + ( D2 /DDR_Ban44 ) ( D3 ? ) ( D4 GND ) ( D5 ? ) - ( D6 /FPGA_Sp38 ) - ( D7 /FPGA_Sp39 ) - ( D8 /FPGA_Sp40 ) - ( D9 /FPGA_Sp41 ) - ( D10 /FPGA_Sp42 ) - ( D11 /Non_vol43 ) + ( D6 /FPGA_Sp45 ) + ( D7 /Etherne46 ) + ( D8 /FPGA_Sp47 ) + ( D9 /Etherne48 ) + ( D10 /Etherne49 ) + ( D11 /FPGA_Sp50 ) ( D12 ? ) ( D13 ? ) - ( D14 /Non_vol44 ) - ( D15 ? ) + ( D14 /FPGA_Sp51 ) + ( D15 /Non_vol52 ) ( D16 +2.5V ) ( D17 /Non_vol7 ) ( D18 GND ) ( D19 ? ) ( D20 ? ) - ( D21 /DDR_Ban45 ) - ( D22 /DDR_Ban46 ) + ( D21 /DDR_Ban53 ) + ( D22 /DDR_Ban54 ) ( E1 /DDR_Banks/M0_A9 ) ( E2 GND ) ( E3 /DDR_Banks/M0_A8 ) @@ -565,8 +565,8 @@ ( E21 GND ) ( E22 /DDR_Banks/M1_A2 ) ( F1 ? ) - ( F2 /DDR_Ban47 ) - ( F3 /DDR_Banks/M0_A4 ) + ( F2 /DDR_Ban55 ) + ( F3 /FPGA_Sp56 ) ( F4 +2.5V ) ( F5 ? ) ( F6 +2.5V ) @@ -582,14 +582,14 @@ ( F16 ? ) ( F17 ? ) ( F18 ? ) - ( F19 /DDR_Ban48 ) + ( F19 /FPGA_Sp57 ) ( F20 /DDR_Banks/M1_A4 ) - ( F21 /DDR_Banks/M1_A0 ) - ( F22 /DDR_Banks/M1_A1 ) - ( G1 /DDR_Ban49 ) + ( F21 /FPGA_Sp58 ) + ( F22 /FPGA_Sp59 ) + ( G1 /FPGA_Sp60 ) ( G2 +2.5V ) - ( G3 /DDR_Ban50 ) - ( G4 /DDR_Ban51 ) + ( G3 /FPGA_Sp61 ) + ( G4 /FPGA_Sp62 ) ( G5 GND ) ( G6 ? ) ( G7 ? ) @@ -604,16 +604,16 @@ ( G16 ? ) ( G17 ? ) ( G18 GND ) - ( G19 /DDR_Ban52 ) - ( G20 /DDR_Banks/M1_A3 ) + ( G19 /FPGA_Sp63 ) + ( G20 /FPGA_Sp64 ) ( G21 +2.5V ) ( G22 ? ) - ( H1 /DDR_Banks/M0_A1 ) - ( H2 /DDR_Banks/M0_A0 ) - ( H3 /DDR_Ban53 ) - ( H4 /DDR_Ban54 ) + ( H1 /FPGA_Sp65 ) + ( H2 /FPGA_Sp66 ) + ( H3 /FPGA_Sp67 ) + ( H4 /DDR_Ban68 ) ( H5 /DDR_Banks/M0_A2 ) - ( H6 /DDR_Banks/M0_A7 ) + ( H6 /FPGA_Sp69 ) ( H7 GND ) ( H8 ? ) ( H9 +2.5V ) @@ -626,14 +626,14 @@ ( H16 ? ) ( H17 ? ) ( H18 ? ) - ( H19 /DDR_Ban55 ) - ( H20 /DDR_Ban56 ) - ( H21 /DDR_Ban57 ) - ( H22 /DDR_Ban58 ) - ( J1 /DDR_Ban59 ) + ( H19 /FPGA_Sp70 ) + ( H20 /DDR_Ban71 ) + ( H21 /DDR_Ban72 ) + ( H22 /DDR_Ban73 ) + ( J1 /DDR_Ban74 ) ( J2 GND ) - ( J3 /DDR_Ban60 ) - ( J4 /DDR_Banks/M0_A6 ) + ( J3 /DDR_Ban75 ) + ( J4 /FPGA_Sp76 ) ( J5 +2.5V ) ( J6 ? ) ( J7 ? ) @@ -646,18 +646,18 @@ ( J14 +1.2V ) ( J15 GND ) ( J16 ? ) - ( J17 /DDR_Ban61 ) + ( J17 /DDR_Ban77 ) ( J18 +2.5V ) - ( J19 /DDR_Ban62 ) - ( J20 /DDR_Ban63 ) + ( J19 /DDR_Ban78 ) + ( J20 /DDR_Ban79 ) ( J21 GND ) - ( J22 /DDR_Ban64 ) - ( K1 /DDR_Ban65 ) - ( K2 /DDR_Ban66 ) - ( K3 /DDR_Banks/M0_A5 ) - ( K4 /DDR_Ban67 ) - ( K5 /DDR_Ban68 ) - ( K6 /DDR_Banks/M0_A3 ) + ( J22 /FPGA_Sp80 ) + ( K1 /FPGA_Sp81 ) + ( K2 /FPGA_Sp82 ) + ( K3 /FPGA_Sp83 ) + ( K4 /FPGA_Sp84 ) + ( K5 /FPGA_Sp85 ) + ( K6 /FPGA_Sp86 ) ( K7 ? ) ( K8 ? ) ( K9 +1.2V ) @@ -668,16 +668,16 @@ ( K14 GND ) ( K15 +2.5V ) ( K16 ? ) - ( K17 /DDR_Ban69 ) + ( K17 /FPGA_Sp87 ) ( K18 ? ) ( K19 /DDR_Banks/M1_A6 ) - ( K20 /DDR_Banks/M1_A5 ) - ( K21 /DDR_Ban70 ) - ( K22 /DDR_Ban71 ) + ( K20 /FPGA_Sp88 ) + ( K21 /FPGA_Sp89 ) + ( K22 /FPGA_Sp90 ) ( L1 ? ) ( L2 +2.5V ) - ( L3 /DDR_Ban72 ) - ( L4 /DDR_Ban73 ) + ( L3 /FPGA_Sp91 ) + ( L4 /FPGA_Sp92 ) ( L5 GND ) ( L6 ? ) ( L7 +2.5V ) @@ -692,13 +692,13 @@ ( L16 +2.5V ) ( L17 ? ) ( L18 GND ) - ( L19 /DDR_Ban74 ) - ( L20 /DDR_Ban75 ) + ( L19 /FPGA_Sp93 ) + ( L20 /FPGA_Sp94 ) ( L21 +2.5V ) ( L22 ? ) - ( M1 /DDR_Ban76 ) - ( M2 /DDR_Ban77 ) - ( M3 /DDR_Ban78 ) + ( M1 /FPGA_Sp95 ) + ( M2 /FPGA_Sp96 ) + ( M3 /DDR_Ban97 ) ( M4 ? ) ( M5 ? ) ( M6 ? ) @@ -713,14 +713,14 @@ ( M15 +2.5V ) ( M16 ? ) ( M17 ? ) - ( M18 /FPGA_Sp79 ) + ( M18 /FPGA_Sp98 ) ( M19 ? ) - ( M20 /DDR_Ban80 ) - ( M21 /DDR_Ban81 ) - ( M22 /DDR_Ban82 ) - ( N1 /DDR_Ban83 ) + ( M20 /DDR_Ban99 ) + ( M21 /DDR_Ban100 ) + ( M22 /DDR_Ban101 ) + ( N1 /DDR_Ban102 ) ( N2 GND ) - ( N3 /DDR_Ban84 ) + ( N3 /DDR_Ban103 ) ( N4 ? ) ( N5 +2.5V ) ( N6 ? ) @@ -733,15 +733,15 @@ ( N13 GND ) ( N14 +1.2V ) ( N15 ? ) - ( N16 /FPGA_Sp85 ) + ( N16 /FPGA_Sp104 ) ( N17 GND ) ( N18 +2.5V ) ( N19 ? ) - ( N20 /DDR_Ban86 ) + ( N20 /FPGA_Sp105 ) ( N21 GND ) - ( N22 /DDR_Ban87 ) - ( P1 /DDR_Ban88 ) - ( P2 /DDR_Ban89 ) + ( N22 /FPGA_Sp106 ) + ( P1 /FPGA_Sp107 ) + ( P2 /DDR_Ban108 ) ( P3 ? ) ( P4 ? ) ( P5 ? ) @@ -756,15 +756,15 @@ ( P14 GND ) ( P15 ? ) ( P16 ? ) - ( P17 /FPGA_Sp90 ) - ( P18 /FPGA_Sp91 ) + ( P17 /USB/USBA_VP ) + ( P18 /USB/USBA_OE_N ) ( P19 ? ) ( P20 ? ) - ( P21 /DDR_Ban92 ) - ( P22 /DDR_Ban93 ) - ( R1 /DDR_Ban94 ) + ( P21 /DDR_Ban109 ) + ( P22 /DDR_Ban110 ) + ( R1 /FPGA_Sp111 ) ( R2 +2.5V ) - ( R3 /DDR_Ban95 ) + ( R3 /DDR_Ban112 ) ( R4 ? ) ( R5 GND ) ( R6 +2.5V ) @@ -780,23 +780,23 @@ ( R16 ? ) ( R17 ? ) ( R18 GND ) - ( R19 /FPGA_Sp96 ) - ( R20 /DDR_Ban97 ) + ( R19 /FPGA_Sp113 ) + ( R20 /DDR_Ban114 ) ( R21 +2.5V ) - ( R22 /DDR_Ban98 ) + ( R22 /FPGA_Sp115 ) ( T1 ? ) - ( T2 /DDR_Ban99 ) + ( T2 /DDR_Ban116 ) ( T3 ? ) ( T4 ? ) ( T5 ? ) ( T6 ? ) ( T7 ? ) ( T8 ? ) - ( T9 N-000101 ) + ( T9 N-000140 ) ( T10 ? ) ( T11 ? ) ( T12 ? ) - ( T13 N-000101 ) + ( T13 N-000140 ) ( T14 ? ) ( T15 ? ) ( T16 ? ) @@ -804,11 +804,11 @@ ( T18 ? ) ( T19 ? ) ( T20 ? ) - ( T21 /DDR_Ban100 ) + ( T21 /DDR_Ban117 ) ( T22 ? ) - ( U1 /DDR_Ban101 ) + ( U1 /FPGA_Sp118 ) ( U2 GND ) - ( U3 /DDR_Ban102 ) + ( U3 /DDR_Ban119 ) ( U4 ? ) ( U5 +2.5V ) ( U6 ? ) @@ -825,36 +825,36 @@ ( U17 ? ) ( U18 +2.5V ) ( U19 ? ) - ( U20 /DDR_Ban103 ) + ( U20 /FPGA_Sp120 ) ( U21 GND ) - ( U22 /DDR_Ban104 ) - ( V1 /DDR_Ban105 ) - ( V2 /DDR_Ban106 ) + ( U22 /FPGA_Sp121 ) + ( V1 /FPGA_Sp122 ) + ( V2 /FPGA_Sp123 ) ( V3 ? ) ( V4 GND ) ( V5 ? ) ( V6 +2.5V ) ( V7 ? ) - ( V8 N-000101 ) + ( V8 N-000140 ) ( V9 ? ) ( V10 GND ) ( V11 ? ) - ( V12 N-000101 ) + ( V12 N-000140 ) ( V13 ? ) ( V14 GND ) ( V15 ? ) - ( V16 N-000101 ) + ( V16 N-000140 ) ( V17 ? ) ( V18 ? ) ( V19 ? ) ( V20 ? ) - ( V21 /DDR_Ban107 ) - ( V22 /DDR_Ban108 ) + ( V21 /FPGA_Sp124 ) + ( V22 /FPGA_Sp125 ) ( W1 ? ) ( W2 +2.5V ) ( W3 ? ) ( W4 ? ) - ( W5 N-000101 ) + ( W5 N-000140 ) ( W6 ? ) ( W7 GND ) ( W8 ? ) @@ -894,165 +894,165 @@ ) ( /4C421DD3/4C609B99 TSOP-66 U2 MT46V32M16TG ( 1 +2.5V ) - ( 2 /DDR_Ban84 ) + ( 2 /DDR_Ban103 ) ( 3 +2.5V ) - ( 4 /DDR_Ban83 ) - ( 5 /DDR_Ban77 ) + ( 4 /DDR_Ban102 ) + ( 5 /FPGA_Sp96 ) ( 6 GND ) - ( 7 /DDR_Ban76 ) - ( 8 /DDR_Ban60 ) + ( 7 /FPGA_Sp95 ) + ( 8 /DDR_Ban75 ) ( 9 +2.5V ) - ( 10 /DDR_Ban59 ) - ( 11 /DDR_Ban66 ) + ( 10 /DDR_Ban74 ) + ( 11 /FPGA_Sp82 ) ( 12 GND ) - ( 13 /DDR_Ban65 ) + ( 13 /FPGA_Sp81 ) ( 14 ? ) ( 15 +2.5V ) - ( 16 /DDR_Ban72 ) + ( 16 /FPGA_Sp91 ) ( 17 ? ) ( 18 +2.5V ) ( 19 ? ) - ( 20 /DDR_Ban73 ) - ( 21 /DDR_Ban47 ) - ( 22 /DDR_Ban67 ) - ( 23 /DDR_Ban68 ) + ( 20 /FPGA_Sp92 ) + ( 21 /DDR_Ban55 ) + ( 22 /FPGA_Sp84 ) + ( 23 /FPGA_Sp85 ) ( 24 GND ) ( 25 ? ) - ( 26 /DDR_Ban50 ) - ( 27 /DDR_Ban49 ) - ( 28 /DDR_Ban51 ) - ( 29 /DDR_Banks/M0_A0 ) - ( 30 /DDR_Banks/M0_A1 ) + ( 26 /FPGA_Sp61 ) + ( 27 /FPGA_Sp60 ) + ( 28 /FPGA_Sp62 ) + ( 29 /FPGA_Sp66 ) + ( 30 /FPGA_Sp65 ) ( 31 /DDR_Banks/M0_A2 ) - ( 32 /DDR_Banks/M0_A3 ) + ( 32 /FPGA_Sp86 ) ( 33 +2.5V ) ( 34 GND ) - ( 35 /DDR_Banks/M0_A4 ) - ( 36 /DDR_Banks/M0_A5 ) - ( 37 /DDR_Banks/M0_A6 ) - ( 38 /DDR_Banks/M0_A7 ) + ( 35 /FPGA_Sp56 ) + ( 36 /FPGA_Sp83 ) + ( 37 /FPGA_Sp76 ) + ( 38 /FPGA_Sp69 ) ( 39 /DDR_Banks/M0_A8 ) ( 40 /DDR_Banks/M0_A9 ) - ( 41 /DDR_Ban27 ) - ( 42 /DDR_Ban36 ) + ( 41 /FPGA_Sp30 ) + ( 42 /FPGA_Sp43 ) ( 43 ? ) - ( 44 /DDR_Ban53 ) - ( 45 /DDR_Ban37 ) - ( 46 /DDR_Ban54 ) - ( 47 /DDR_Ban78 ) + ( 44 /FPGA_Sp67 ) + ( 45 /DDR_Ban44 ) + ( 46 /DDR_Ban68 ) + ( 47 /DDR_Ban97 ) ( 48 GND ) - ( 49 N-000052 ) + ( 49 N-000050 ) ( 50 ? ) - ( 51 /DDR_Ban99 ) + ( 51 /DDR_Ban116 ) ( 52 GND ) ( 53 ? ) - ( 54 /DDR_Ban89 ) + ( 54 /DDR_Ban108 ) ( 55 +2.5V ) - ( 56 /DDR_Ban88 ) - ( 57 /DDR_Ban95 ) + ( 56 /FPGA_Sp107 ) + ( 57 /DDR_Ban112 ) ( 58 GND ) - ( 59 /DDR_Ban94 ) - ( 60 /DDR_Ban102 ) + ( 59 /FPGA_Sp111 ) + ( 60 /DDR_Ban119 ) ( 61 +2.5V ) - ( 62 /DDR_Ban101 ) - ( 63 /DDR_Ban106 ) + ( 62 /FPGA_Sp118 ) + ( 63 /FPGA_Sp123 ) ( 64 GND ) - ( 65 /DDR_Ban105 ) + ( 65 /FPGA_Sp122 ) ( 66 GND ) ) ( /4C421DD3/4C609C8E TSOP-66 U3 MT46V32M16TG ( 1 +2.5V ) - ( 2 /DDR_Ban86 ) + ( 2 /FPGA_Sp105 ) ( 3 +2.5V ) - ( 4 /DDR_Ban87 ) - ( 5 /DDR_Ban81 ) + ( 4 /FPGA_Sp106 ) + ( 5 /DDR_Ban100 ) ( 6 GND ) - ( 7 /DDR_Ban82 ) - ( 8 /DDR_Ban63 ) + ( 7 /DDR_Ban101 ) + ( 8 /DDR_Ban79 ) ( 9 +2.5V ) - ( 10 /DDR_Ban64 ) - ( 11 /DDR_Ban70 ) + ( 10 /FPGA_Sp80 ) + ( 11 /FPGA_Sp89 ) ( 12 GND ) - ( 13 /DDR_Ban71 ) + ( 13 /FPGA_Sp90 ) ( 14 ? ) ( 15 +2.5V ) - ( 16 /DDR_Ban75 ) + ( 16 /FPGA_Sp94 ) ( 17 ? ) ( 18 +2.5V ) ( 19 ? ) - ( 20 /DDR_Ban74 ) - ( 21 /DDR_Ban55 ) - ( 22 /DDR_Ban58 ) - ( 23 /DDR_Ban57 ) + ( 20 /FPGA_Sp93 ) + ( 21 /FPGA_Sp70 ) + ( 22 /DDR_Ban73 ) + ( 23 /DDR_Ban72 ) ( 24 GND ) ( 25 ? ) - ( 26 /DDR_Ban61 ) - ( 27 /DDR_Ban69 ) - ( 28 /DDR_Ban52 ) - ( 29 /DDR_Banks/M1_A0 ) - ( 30 /DDR_Banks/M1_A1 ) + ( 26 /DDR_Ban77 ) + ( 27 /FPGA_Sp87 ) + ( 28 /FPGA_Sp63 ) + ( 29 /FPGA_Sp58 ) + ( 30 /FPGA_Sp59 ) ( 31 /DDR_Banks/M1_A2 ) - ( 32 /DDR_Banks/M1_A3 ) + ( 32 /FPGA_Sp64 ) ( 33 +2.5V ) ( 34 GND ) ( 35 /DDR_Banks/M1_A4 ) - ( 36 /DDR_Banks/M1_A5 ) + ( 36 /FPGA_Sp88 ) ( 37 /DDR_Banks/M1_A6 ) ( 38 /DDR_Banks/M1_A7 ) - ( 39 /DDR_Banks/M1_A8 ) - ( 40 /DDR_Banks/M1_A9 ) - ( 41 /DDR_Ban48 ) - ( 42 /DDR_Ban46 ) + ( 39 /FPGA_Sp41 ) + ( 40 /FPGA_Sp42 ) + ( 41 /FPGA_Sp57 ) + ( 42 /DDR_Ban54 ) ( 43 ? ) - ( 44 /DDR_Ban62 ) - ( 45 /DDR_Ban45 ) - ( 46 /DDR_Ban56 ) - ( 47 /DDR_Ban80 ) + ( 44 /DDR_Ban78 ) + ( 45 /DDR_Ban53 ) + ( 46 /DDR_Ban71 ) + ( 47 /DDR_Ban99 ) ( 48 GND ) - ( 49 N-000053 ) + ( 49 N-000049 ) ( 50 ? ) - ( 51 /DDR_Ban100 ) + ( 51 /DDR_Ban117 ) ( 52 GND ) ( 53 ? ) - ( 54 /DDR_Ban92 ) + ( 54 /DDR_Ban109 ) ( 55 +2.5V ) - ( 56 /DDR_Ban93 ) - ( 57 /DDR_Ban97 ) + ( 56 /DDR_Ban110 ) + ( 57 /DDR_Ban114 ) ( 58 GND ) - ( 59 /DDR_Ban98 ) - ( 60 /DDR_Ban103 ) + ( 59 /FPGA_Sp115 ) + ( 60 /FPGA_Sp120 ) ( 61 +2.5V ) - ( 62 /DDR_Ban104 ) - ( 63 /DDR_Ban107 ) + ( 62 /FPGA_Sp121 ) + ( 63 /FPGA_Sp124 ) ( 64 GND ) - ( 65 /DDR_Ban108 ) + ( 65 /FPGA_Sp125 ) ( 66 GND ) ) ( /4C4320F3/4C432132 LQFP48 U4 K8001 - ( 1 /FPGA_Sp11 ) - ( 2 /FPGA_Sp28 ) - ( 3 /FPGA_Sp29 ) - ( 4 /FPGA_Sp23 ) - ( 5 /FPGA_Sp15 ) - ( 6 /FPGA_Sp30 ) - ( 7 N-000069 ) + ( 1 /Etherne11 ) + ( 2 /FPGA_Sp31 ) + ( 3 /FPGA_Sp32 ) + ( 4 /FPGA_Sp25 ) + ( 5 /Etherne15 ) + ( 6 /Etherne33 ) + ( 7 3.3V ) ( 8 GND ) - ( 9 /FPGA_Sp16 ) - ( 10 /FPGA_Sp42 ) - ( 11 /FPGA_Sp24 ) + ( 9 /Etherne16 ) + ( 10 /Etherne49 ) + ( 11 /FPGA_Sp26 ) ( 12 GND ) ( 13 /Etherne1 ) ( 14 /FPGA_Sp17 ) - ( 15 /FPGA_Sp40 ) - ( 16 /FPGA_Sp41 ) - ( 17 /FPGA_Sp31 ) - ( 18 /FPGA_Sp32 ) - ( 19 /FPGA_Sp18 ) - ( 20 /FPGA_Sp39 ) - ( 21 /FPGA_Sp19 ) - ( 22 /FPGA_Sp25 ) + ( 15 /FPGA_Sp47 ) + ( 16 /Etherne48 ) + ( 17 /Etherne34 ) + ( 18 /Etherne35 ) + ( 19 /Etherne18 ) + ( 20 /Etherne46 ) + ( 21 /Etherne19 ) + ( 22 /FPGA_Sp27 ) ( 23 GND ) - ( 24 N-000069 ) + ( 24 3.3V ) ( 25 /FPGA_Sp14 ) ( 26 /Etherne12 ) ( 27 /Etherne13 ) @@ -1060,23 +1060,23 @@ ( 29 ? ) ( 30 ? ) ( 31 /Etherne2 ) - ( 32 N-000330 ) - ( 33 N-000337 ) + ( 32 N-000335 ) + ( 33 N-000330 ) ( 34 ? ) ( 35 GND ) ( 36 GND ) - ( 37 N-000329 ) + ( 37 N-000333 ) ( 38 /Etherne3 ) ( 39 GND ) - ( 40 N-000331 ) - ( 41 N-000336 ) + ( 40 N-000336 ) + ( 41 N-000329 ) ( 42 ? ) ( 43 ? ) ( 44 GND ) ( 45 ? ) - ( 46 /FPGA_Sp33 ) + ( 46 /Etherne36 ) ( 47 /Etherne4 ) - ( 48 /FPGA_Sp38 ) + ( 48 /FPGA_Sp45 ) ) ( /4C4227FE/4B76F108 NAND-48TSOP U5 NAND ( 1 ? ) @@ -1084,20 +1084,20 @@ ( 3 ? ) ( 4 ? ) ( 5 ? ) - ( 6 /Non_vol109 ) - ( 7 /Non_vol109 ) - ( 8 ? ) - ( 9 ? ) + ( 6 /FPGA_Sp24 ) + ( 7 /FPGA_Sp24 ) + ( 8 /FPGA_Sp29 ) + ( 9 /FPGA_Sp40 ) ( 10 ? ) ( 11 ? ) - ( 12 N-000069 ) + ( 12 3.3V ) ( 13 GND ) ( 14 ? ) ( 15 ? ) - ( 16 ? ) - ( 17 ? ) - ( 18 ? ) - ( 19 N-000069 ) + ( 16 /Non_vol52 ) + ( 17 /Non_vol23 ) + ( 18 /FPGA_Sp39 ) + ( 19 3.3V ) ( 20 ? ) ( 21 ? ) ( 22 ? ) @@ -1107,9 +1107,9 @@ ( 26 ? ) ( 27 ? ) ( 28 ? ) - ( 29 /Non_vol44 ) - ( 30 /Non_vol22 ) - ( 31 /Non_vol35 ) + ( 29 /FPGA_Sp51 ) + ( 30 /FPGA_Sp22 ) + ( 31 /FPGA_Sp38 ) ( 32 /Non_vol21 ) ( 33 ? ) ( 34 ? ) @@ -1119,10 +1119,10 @@ ( 38 ? ) ( 39 ? ) ( 40 ? ) - ( 41 /Non_vol26 ) - ( 42 /Non_vol34 ) - ( 43 /Non_vol43 ) - ( 44 /Non_vol20 ) + ( 41 /FPGA_Sp28 ) + ( 42 /FPGA_Sp37 ) + ( 43 /FPGA_Sp50 ) + ( 44 /FPGA_Sp20 ) ( 45 ? ) ( 46 ? ) ( 47 ? ) @@ -1130,17 +1130,17 @@ ) ( /4C5F1EDC/4C5F2025 TSSOP-14 U6 MIC2550AYTS ( 1 +2.5V ) - ( 2 /FPGA_Sp96 ) - ( 3 /FPGA_Sp85 ) - ( 4 /FPGA_Sp90 ) - ( 5 /FPGA_Sp79 ) + ( 2 /FPGA_Sp113 ) + ( 3 /FPGA_Sp104 ) + ( 4 /USB/USBA_VP ) + ( 5 /FPGA_Sp98 ) ( 7 GND ) ( 8 GND ) - ( 9 /FPGA_Sp91 ) - ( 10 N-000367 ) - ( 11 N-000364 ) - ( 12 N-000069 ) - ( 14 N-000069 ) + ( 9 /USB/USBA_OE_N ) + ( 10 N-000357 ) + ( 11 N-000353 ) + ( 12 3.3V ) + ( 14 3.3V ) ) ( /4C5F1EDC/4C6552BF TSSOP-14 U7 MIC2550AYTS ( 1 +2.5V ) @@ -1151,25 +1151,35 @@ ( 7 GND ) ( 8 GND ) ( 9 ? ) - ( 10 N-000358 ) - ( 11 N-000360 ) - ( 12 N-000069 ) - ( 14 N-000069 ) + ( 10 N-000369 ) + ( 11 N-000368 ) + ( 12 3.3V ) + ( 14 3.3V ) + ) + ( /4C4227FE/4C65A75D SO8E U8 X25X64MB + ( 1 ? ) + ( 2 ? ) + ( 3 ? ) + ( 4 ? ) + ( 5 ? ) + ( 6 ? ) + ( 7 ? ) + ( 8 ? ) ) ( /4C5F1EDC/4C5F2CA7 0603 V1 V0402MHS03 - ( 1 N-000364 ) + ( 1 N-000353 ) ( 2 GND ) ) ( /4C5F1EDC/4C5F2CA3 0603 V2 V0402MHS03 - ( 1 N-000367 ) + ( 1 N-000357 ) ( 2 GND ) ) ( /4C5F1EDC/4C6552B8 0603 V3 V0402MHS03 - ( 1 N-000360 ) + ( 1 N-000368 ) ( 2 GND ) ) ( /4C5F1EDC/4C6552B9 0603 V4 V0402MHS03 - ( 1 N-000358 ) + ( 1 N-000369 ) ( 2 GND ) ) ) @@ -1524,76 +1534,91 @@ $component R1 R? SM0603 SM0805 + R?-* $endlist $component R2 R? SM0603 SM0805 + R?-* $endlist $component R3 R? SM0603 SM0805 + R?-* $endlist $component R4 R? SM0603 SM0805 + R?-* $endlist $component R5 R? SM0603 SM0805 + R?-* $endlist $component R6 R? SM0603 SM0805 + R?-* $endlist $component R7 R? SM0603 SM0805 + R?-* $endlist $component R8 R? SM0603 SM0805 + R?-* $endlist $component R9 R? SM0603 SM0805 + R?-* $endlist $component R10 R? SM0603 SM0805 + R?-* $endlist $component R11 R? SM0603 SM0805 + R?-* $endlist $component R12 R? SM0603 SM0805 + R?-* $endlist $component R13 R? SM0603 SM0805 + R?-* $endlist $component R14 R? SM0603 SM0805 + R?-* $endlist $component R15 R? SM0603 SM0805 + R?-* $endlist $endfootprintlist } diff --git a/kicad/xue-rnc/xue-rnc.pro b/kicad/xue-rnc/xue-rnc.pro index e1f7432..5fd4cf6 100644 --- a/kicad/xue-rnc/xue-rnc.pro +++ b/kicad/xue-rnc/xue-rnc.pro @@ -1,6 +1,6 @@ -update=Fri 13 Aug 2010 11:23:46 AM COT +update=Fri 13 Aug 2010 03:32:34 PM COT version=1 -last_client=kicad +last_client=pcbnew [common] NetDir= [cvpcb] @@ -8,6 +8,87 @@ version=1 NetIExt=net [cvpcb/libraries] EquName1=devcms +[general] +version=1 +RootSch= +BoardNm= +[eeschema] +version=1 +LibDir= +NetFmt=1 +HPGLSpd=20 +HPGLDm=15 +HPGLNum=1 +offX_A4=0 +offY_A4=0 +offX_A3=0 +offY_A3=0 +offX_A2=0 +offY_A2=0 +offX_A1=0 +offY_A1=0 +offX_A0=0 +offY_A0=0 +offX_A=0 +offY_A=0 +offX_B=0 +offY_B=0 +offX_C=0 +offY_C=0 +offX_D=0 +offY_D=0 +offX_E=0 +offY_E=0 +RptD_X=0 +RptD_Y=100 +RptLab=1 +LabSize=30 +PrintMonochrome=1 +ShowSheetReferenceAndTitleBlock=1 +[eeschema/libraries] +LibName1=power +LibName2=../library/v0402mhs03 +LibName3=../library/usb-48204-0001 +LibName4=../library/microsmd075f +LibName5=../library/mic2550ayts +LibName6=../library/rj45-48025 +LibName7=../library/xue-nv +LibName8=../library/xc6slx75fgg484 +LibName9=../library/xc6slx45fgg484 +LibName10=../library/micron_mobile_ddr +LibName11=../library/micron_ddr_512Mb +LibName12=../library/k8001 +LibName13=device +LibName14=transistors +LibName15=conn +LibName16=linear +LibName17=regul +LibName18=74xx +LibName19=cmos4000 +LibName20=adc-dac +LibName21=memory +LibName22=xilinx +LibName23=special +LibName24=microcontrollers +LibName25=dsp +LibName26=microchip +LibName27=analog_switches +LibName28=motorola +LibName29=texas +LibName30=intel +LibName31=audio +LibName32=interface +LibName33=digital-audio +LibName34=philips +LibName35=display +LibName36=cypress +LibName37=siliconi +LibName38=opto +LibName39=atmel +LibName40=contrib +LibName41=valves +LibName42=../library/pasives-connectors +LibName43=/home/afc/devel/Qi/xue/kicad/library/x25x64mb [pcbnew] version=1 PadDrlX=320 @@ -53,83 +134,3 @@ LibName22=../modules/micro-sd LibName23=../modules/60fbga_ddr LibName24=../modules/66-tsop LibName25=../modules/stdpass -[eeschema] -version=1 -LibDir= -NetFmt=1 -HPGLSpd=20 -HPGLDm=15 -HPGLNum=1 -offX_A4=0 -offY_A4=0 -offX_A3=0 -offY_A3=0 -offX_A2=0 -offY_A2=0 -offX_A1=0 -offY_A1=0 -offX_A0=0 -offY_A0=0 -offX_A=0 -offY_A=0 -offX_B=0 -offY_B=0 -offX_C=0 -offY_C=0 -offX_D=0 -offY_D=0 -offX_E=0 -offY_E=0 -RptD_X=0 -RptD_Y=100 -RptLab=1 -SimCmd= -UseNetN=0 -LabSize=30 -[eeschema/libraries] -LibName1=power -LibName2=../library/v0402mhs03 -LibName3=../library/usb-48204-0001 -LibName4=../library/microsmd075f -LibName5=../library/mic2550ayts -LibName6=../library/rj45-48025 -LibName7=../library/xue-nv -LibName8=../library/xc6slx75fgg484 -LibName9=../library/xc6slx45fgg484 -LibName10=../library/micron_mobile_ddr -LibName11=../library/micron_ddr_512Mb -LibName12=../library/k8001 -LibName13=device -LibName14=transistors -LibName15=conn -LibName16=linear -LibName17=regul -LibName18=74xx -LibName19=cmos4000 -LibName20=adc-dac -LibName21=memory -LibName22=xilinx -LibName23=special -LibName24=microcontrollers -LibName25=dsp -LibName26=microchip -LibName27=analog_switches -LibName28=motorola -LibName29=texas -LibName30=intel -LibName31=audio -LibName32=interface -LibName33=digital-audio -LibName34=philips -LibName35=display -LibName36=cypress -LibName37=siliconi -LibName38=opto -LibName39=atmel -LibName40=contrib -LibName41=valves -LibName42=../library/pasives-connectors -[general] -version=1 -RootSch= -BoardNm= diff --git a/kicad/xue-rnc/xue-rnc.sch b/kicad/xue-rnc/xue-rnc.sch index d66ae6f..3e88727 100644 --- a/kicad/xue-rnc/xue-rnc.sch +++ b/kicad/xue-rnc/xue-rnc.sch @@ -1,5 +1,48 @@ -EESchema Schematic File Version 2 date Fri 13 Aug 2010 11:23:32 AM COT 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