From f1c6506b1e4e420d88fc0aac33fe68636349360a Mon Sep 17 00:00:00 2001 From: Andres Calderon Date: Mon, 16 Aug 2010 19:36:21 -0500 Subject: [PATCH] terminal resistors placement --- kicad/xue-rnc/DRAM.sch | 2 +- kicad/xue-rnc/FPGA.sch | 2431 ++++++++++++++++--------------- kicad/xue-rnc/NV_MEMORIES.sch | 2 +- kicad/xue-rnc/USB.sch | 2 +- kicad/xue-rnc/eth_phy.sch | 2 +- kicad/xue-rnc/xue-rnc-cache.lib | 2 +- kicad/xue-rnc/xue-rnc.brd | 1826 +++++++++++++---------- kicad/xue-rnc/xue-rnc.net | 1534 +++++++++---------- kicad/xue-rnc/xue-rnc.pro | 2 +- kicad/xue-rnc/xue-rnc.sch | 2 +- 10 files changed, 3121 insertions(+), 2684 deletions(-) diff --git a/kicad/xue-rnc/DRAM.sch b/kicad/xue-rnc/DRAM.sch index 38d625c..9ee382a 100644 --- a/kicad/xue-rnc/DRAM.sch +++ b/kicad/xue-rnc/DRAM.sch @@ -1,4 +1,4 @@ -EESchema Schematic File Version 2 date Mon 16 Aug 2010 07:03:17 PM COT +EESchema Schematic File Version 2 date Mon 16 Aug 2010 07:34:39 PM COT LIBS:power LIBS:r_pack2 LIBS:v0402mhs03 diff --git a/kicad/xue-rnc/FPGA.sch b/kicad/xue-rnc/FPGA.sch index 4c2abf4..8bd0868 100644 --- a/kicad/xue-rnc/FPGA.sch +++ b/kicad/xue-rnc/FPGA.sch @@ -1,4 +1,4 @@ -EESchema Schematic File Version 2 date Mon 16 Aug 2010 07:03:17 PM COT +EESchema Schematic File Version 2 date Mon 16 Aug 2010 07:34:39 PM COT LIBS:power LIBS:r_pack2 LIBS:v0402mhs03 @@ -58,1147 +58,1278 @@ Comment3 "" Comment4 "" $EndDescr Wire Wire Line - 13450 3950 13900 3950 + 22200 4650 21750 4650 +Text Label 21750 4650 0 60 ~ 0 +R_M1_LDQS +Text Label 21750 5150 0 60 ~ 0 +R_M1_LDM Wire Wire Line - 12000 4250 12500 4250 + 22200 5150 21750 5150 Wire Wire Line - 13900 5050 13350 5050 + 14750 2500 14300 2500 +Text Label 14300 2500 0 60 ~ 0 +R_M1_LDQS +Text Label 14300 2400 0 60 ~ 0 +R_M1_LDM Wire Wire Line - 12500 4350 12000 4350 + 14750 2400 14300 2400 Wire Wire Line - 12450 4050 12000 4050 + 13800 2500 13900 2500 Wire Wire Line - 11300 3500 11600 3500 + 16900 3550 17350 3550 Wire Wire Line - 11300 3400 11600 3400 + 14750 2300 14300 2300 Wire Wire Line - 12000 3600 12450 3600 + 16250 2350 15800 2350 Wire Wire Line - 12000 3400 12450 3400 + 17350 2950 16900 2950 Wire Wire Line - 5300 6250 5300 6400 + 16900 4050 17350 4050 Wire Wire Line - 15900 12400 15900 12500 + 17350 4950 16800 4950 Wire Wire Line - 1650 7500 2250 7500 + 14750 1800 14300 1800 Wire Wire Line - 1650 7600 2250 7600 + 13550 1900 13900 1900 Wire Wire Line - 2700 7300 3300 7300 + 13900 2000 13550 2000 Wire Wire Line - 2700 9100 3300 9100 + 13900 1700 13500 1700 Wire Wire Line - 7300 6900 7900 6900 + 13500 1800 13900 1800 Wire Wire Line - 18000 7750 17650 7750 + 13600 1400 13900 1400 Wire Wire Line - 17650 7550 18000 7550 + 13600 1100 13900 1100 Wire Wire Line - 17650 7350 18000 7350 -Wire Notes Line - 1350 12200 6750 12200 -Wire Notes Line - 1350 12200 1350 15000 -Wire Notes Line - 1350 15000 6750 15000 -Wire Notes Line - 6750 15000 6750 12200 -Connection ~ 6000 13400 + 14300 1300 14750 1300 Wire Wire Line - 6350 13450 6350 13400 + 14300 1100 14750 1100 Wire Wire Line - 6350 13400 4600 13400 -Connection ~ 5650 14350 -Wire Wire Line - 4600 14350 6000 14350 -Wire Wire Line - 6000 14350 6000 14400 -Connection ~ 3050 13950 -Wire Wire Line - 3050 13950 3050 13900 -Connection ~ 2350 13950 -Wire Wire Line - 2350 13950 2350 13900 -Wire Wire Line - 3700 13900 3700 13950 -Connection ~ 3050 13450 -Wire Wire Line - 3050 13450 3050 13500 -Connection ~ 2350 13450 -Wire Wire Line - 3700 13500 3700 13450 -Wire Wire Line - 3700 13450 1650 13450 -Connection ~ 1650 13450 -Connection ~ 2000 12900 -Wire Wire Line - 2000 12900 2000 12850 -Wire Wire Line - 2700 12850 2700 12900 -Wire Wire Line - 2700 12900 1650 12900 -Connection ~ 2000 12400 -Wire Wire Line - 2000 12400 2000 12450 -Wire Wire Line - 2700 12450 2700 12400 -Wire Wire Line - 2700 12400 1650 12400 -Wire Bus Line - 18350 8750 18350 8050 -Wire Wire Line - 14250 8550 14200 8550 -Wire Wire Line - 15000 10000 15000 9850 -Wire Bus Line - 18350 7050 18350 6750 -Wire Wire Line - 17650 7150 18250 7150 -Wire Wire Line - 17650 6950 18250 6950 -Wire Wire Line - 17650 6650 17800 6650 -Wire Bus Line - 7900 4300 7900 4200 -Wire Bus Line - 7900 4200 8050 4200 -Wire Wire Line - 1600 5950 1600 5700 -Wire Wire Line - 14200 8450 14250 8450 -Wire Wire Line - 14200 8250 14250 8250 -Wire Wire Line - 14250 8050 12950 8050 -Wire Wire Line - 14250 7850 12950 7850 -Wire Wire Line - 14200 7650 14250 7650 -Wire Wire Line - 14200 7450 14250 7450 -Wire Wire Line - 14250 7250 12950 7250 -Wire Wire Line - 14250 7050 12950 7050 -Wire Wire Line - 14200 6850 14250 6850 -Wire Wire Line - 14200 8750 14250 8750 -Wire Wire Line - 18300 1650 18400 1650 -Wire Wire Line - 18300 1450 18400 1450 -Wire Bus Line - 12850 7300 12850 6900 -Wire Wire Line - 18300 3950 18750 3950 -Wire Wire Line - 18750 4450 18300 4450 -Wire Wire Line - 18750 4250 18300 4250 -Wire Wire Line - 18750 4150 18300 4150 -Wire Wire Line - 18750 4050 18300 4050 -Wire Wire Line - 18750 4950 18300 4950 -Wire Wire Line - 18750 4750 18300 4750 -Wire Wire Line - 18750 5050 18300 5050 -Wire Wire Line - 18750 4850 18300 4850 -Wire Wire Line - 18750 3450 18300 3450 -Wire Wire Line - 18750 3250 18300 3250 -Wire Wire Line - 18750 3150 18300 3150 -Wire Wire Line - 18750 3350 18300 3350 -Wire Wire Line - 18750 3750 18300 3750 -Wire Wire Line - 18750 3850 18300 3850 -Wire Bus Line - 12000 2400 12000 750 -Wire Wire Line - 18300 4650 18750 4650 -Wire Wire Line - 13550 3550 13900 3550 -Wire Wire Line - 7750 4700 7400 4700 -Wire Wire Line - 7750 3400 7400 3400 -Wire Wire Line - 7700 5600 7400 5600 -Wire Wire Line - 7700 5400 7400 5400 -Wire Wire Line - 2800 5000 3200 5000 -Wire Wire Line - 1900 4700 1450 4700 -Wire Wire Line - 1900 4900 1450 4900 -Wire Wire Line - 1900 5000 1450 5000 -Wire Wire Line - 1900 4800 1450 4800 -Wire Wire Line - 1900 4400 1450 4400 -Wire Wire Line - 1900 4600 1450 4600 -Wire Wire Line - 1900 4500 1450 4500 -Wire Wire Line - 1900 4300 1450 4300 -Wire Wire Line - 1900 3700 1450 3700 -Wire Wire Line - 1900 3500 1450 3500 -Wire Wire Line - 1900 3600 1450 3600 -Wire Wire Line - 1900 3800 1450 3800 -Wire Wire Line - 1900 4000 1450 4000 -Wire Wire Line - 1900 4200 1450 4200 -Wire Wire Line - 1900 3900 1450 3900 -Wire Wire Line - 1900 4100 1450 4100 -Wire Wire Line - 3200 5200 2750 5200 -Wire Wire Line - 3200 5400 2750 5400 -Wire Wire Line - 3200 5300 2750 5300 -Wire Wire Line - 3200 5500 2750 5500 -Wire Wire Line - 3200 4900 2750 4900 -Wire Wire Line - 3200 4700 2750 4700 -Wire Wire Line - 3200 4600 2750 4600 -Wire Wire Line - 3200 4800 2750 4800 -Wire Wire Line - 3200 4400 2750 4400 -Wire Wire Line - 3200 4200 2750 4200 -Wire Wire Line - 3200 4300 2750 4300 -Wire Wire Line - 3200 4500 2750 4500 -Wire Wire Line - 3200 3900 2750 3900 -Wire Wire Line - 3200 3700 2750 3700 -Wire Wire Line - 7800 4600 7400 4600 -Wire Wire Line - 7800 5100 7400 5100 -Wire Wire Line - 7800 5200 7400 5200 -Wire Wire Line - 7800 4100 7400 4100 -Wire Wire Line - 7800 4300 7400 4300 -Wire Wire Line - 7800 4200 7400 4200 -Wire Wire Line - 7800 4400 7400 4400 -Wire Wire Line - 7800 4500 7400 4500 -Wire Wire Line - 7800 3300 7400 3300 -Wire Wire Line - 7800 3100 7400 3100 -Wire Wire Line - 7800 3500 7400 3500 -Wire Wire Line - 7800 3600 7400 3600 -Wire Wire Line - 7800 3800 7400 3800 -Wire Wire Line - 7800 5000 7400 5000 -Wire Wire Line - 7800 3700 7400 3700 -Wire Wire Line - 1950 2050 1550 2050 -Wire Wire Line - 1950 2150 1550 2150 -Wire Wire Line - 1950 2350 1550 2350 -Wire Wire Line - 1950 2550 1550 2550 -Wire Wire Line - 1950 1450 1550 1450 -Wire Wire Line - 1950 1550 1550 1550 -Wire Wire Line - 1950 1850 1550 1850 -Wire Wire Line - 1950 1750 1550 1750 -Wire Wire Line - 1950 2250 1550 2250 -Wire Wire Line - 1950 1650 1550 1650 -Wire Wire Line - 1950 1950 1550 1950 -Wire Wire Line - 1950 2450 1550 2450 -Wire Wire Line - 1950 2650 1550 2650 -Wire Bus Line - 1450 2550 1450 1300 -Wire Bus Line - 1450 1300 1050 1300 -Wire Bus Line - 10250 900 10650 900 -Wire Bus Line - 10650 900 10650 2150 -Wire Wire Line - 13900 4350 13550 4350 -Wire Wire Line - 13900 4850 13500 4850 -Wire Wire Line - 13900 4750 13500 4750 -Wire Wire Line - 13900 4550 13500 4550 -Wire Wire Line - 13900 3050 13500 3050 -Wire Wire Line - 13900 2850 13500 2850 -Wire Wire Line - 13900 3150 13500 3150 -Wire Wire Line - 13900 3250 13500 3250 -Wire Wire Line - 13900 3450 13500 3450 -Wire Wire Line - 13900 3350 13500 3350 -Wire Wire Line - 13900 3750 13500 3750 -Wire Wire Line - 13900 3850 13500 3850 -Wire Wire Line - 13900 4250 13500 4250 -Wire Wire Line - 13900 4150 13500 4150 -Connection ~ 5600 6350 -Wire Wire Line - 5600 6350 5600 6400 -Connection ~ 5400 6350 -Wire Wire Line - 5400 6350 5400 6400 -Connection ~ 5200 6350 -Wire Wire Line - 5200 6350 5200 6400 -Connection ~ 5000 6350 -Wire Wire Line - 5000 6350 5000 6400 -Wire Wire Line - 4800 6400 4800 6350 -Connection ~ 15950 6200 -Wire Wire Line - 15950 6200 15950 6250 -Connection ~ 15750 6200 -Wire Wire Line - 15750 6200 15750 6250 -Connection ~ 15550 6200 -Wire Wire Line - 15550 6200 15550 6250 -Connection ~ 16150 6200 -Wire Wire Line - 16150 6200 16150 6250 -Wire Wire Line - 16350 6250 16350 6200 -Wire Wire Line - 16350 6200 15450 6200 -Wire Wire Line - 15450 6200 15450 6250 -Connection ~ 16400 700 -Wire Wire Line - 16400 750 16400 700 -Connection ~ 16200 700 -Wire Wire Line - 16200 700 16200 750 -Connection ~ 16000 700 -Connection ~ 15800 700 -Wire Wire Line - 15800 700 15800 750 -Wire Wire Line - 16500 750 16500 700 -Wire Wire Line - 16500 700 15600 700 -Wire Wire Line - 15600 700 15600 750 -Connection ~ 5100 750 -Wire Wire Line - 5100 750 5100 800 -Connection ~ 4900 750 -Wire Wire Line - 4900 750 4900 800 -Connection ~ 5600 750 -Wire Wire Line - 5600 750 5600 800 -Connection ~ 5400 750 -Wire Wire Line - 5400 750 5400 800 -Wire Wire Line - 5800 800 5800 750 -Wire Wire Line - 5800 750 4800 750 -Wire Wire Line - 4800 750 4800 800 -Connection ~ 18700 12500 -Wire Wire Line - 18700 12500 18700 12400 -Connection ~ 18500 12500 -Wire Wire Line - 18500 12500 18500 12400 -Connection ~ 18300 12500 -Wire Wire Line - 18300 12500 18300 12400 -Connection ~ 18100 12500 -Wire Wire Line - 18100 12500 18100 12400 -Wire Wire Line - 18000 12500 18000 12400 -Connection ~ 17900 12500 -Connection ~ 17300 12500 -Wire Wire Line - 17300 12500 17300 12400 -Connection ~ 17100 12500 -Wire Wire Line - 17100 12500 17100 12400 -Connection ~ 16900 12500 -Wire Wire Line - 16900 12500 16900 12400 -Connection ~ 16700 12500 -Wire Wire Line - 16700 12500 16700 12400 -Connection ~ 16500 12500 -Wire Wire Line - 16500 12500 16500 12400 -Connection ~ 16300 12500 -Wire Wire Line - 16300 12500 16300 12400 -Connection ~ 16100 12500 -Wire Wire Line - 16100 12500 16100 12400 -Connection ~ 17400 12500 -Wire Wire Line - 17400 12500 17400 12400 -Connection ~ 17600 12500 -Wire Wire Line - 17600 12500 17600 12400 -Connection ~ 15800 12500 -Wire Wire Line - 15800 12500 15800 12400 -Connection ~ 15600 12500 -Wire Wire Line - 15600 12500 15600 12400 -Connection ~ 15400 12500 -Wire Wire Line - 15400 12500 15400 12400 -Connection ~ 15200 12500 -Wire Wire Line - 15200 12500 15200 12400 -Connection ~ 15900 12500 -Connection ~ 14900 12500 -Wire Wire Line - 14900 12500 14900 12400 -Connection ~ 14700 12500 -Wire Wire Line - 14700 12500 14700 12400 -Connection ~ 14500 12500 -Wire Wire Line - 14500 12500 14500 12400 -Connection ~ 14300 12500 -Wire Wire Line - 14300 12500 14300 12400 -Connection ~ 14100 12500 -Wire Wire Line - 14100 12500 14100 12400 -Connection ~ 13900 12500 -Wire Wire Line - 13900 12500 13900 12400 -Connection ~ 13700 12500 -Wire Wire Line - 13700 12500 13700 12400 -Connection ~ 13500 12500 -Wire Wire Line - 13500 12500 13500 12400 -Connection ~ 13300 12500 -Wire Wire Line - 13300 12500 13300 12400 -Wire Wire Line - 18900 12400 18900 12500 -Wire Wire Line - 18900 12500 13100 12500 -Wire Wire Line - 13100 12500 13100 12400 -Connection ~ 15300 9950 -Wire Wire Line - 15300 9950 15300 10000 -Connection ~ 15500 9950 -Wire Wire Line - 15500 10000 15500 9950 -Connection ~ 15000 9950 -Connection ~ 14800 9950 -Wire Wire Line - 14800 9950 14800 10000 -Connection ~ 14600 9950 -Wire Wire Line - 14600 9950 14600 10000 -Connection ~ 14400 9950 -Wire Wire Line - 14400 9950 14400 10000 -Connection ~ 17300 9950 -Wire Wire Line - 17300 9950 17300 10000 -Connection ~ 17100 9950 -Wire Wire Line - 17100 9950 17100 10000 -Connection ~ 16900 9950 -Wire Wire Line - 16900 9950 16900 10000 -Connection ~ 16700 9950 -Wire Wire Line - 16700 9950 16700 10000 -Connection ~ 16500 9950 -Connection ~ 16300 9950 -Wire Wire Line - 16300 9950 16300 10000 -Connection ~ 16100 9950 -Wire Wire Line - 16100 9950 16100 10000 -Connection ~ 15900 9950 -Wire Wire Line - 15900 9950 15900 10000 -Connection ~ 17500 9950 -Wire Wire Line - 17500 9950 17500 10000 -Wire Wire Line - 15600 10000 15600 9950 -Wire Wire Line - 15600 9950 14300 9950 -Wire Wire Line - 14300 9950 14300 10000 -Wire Wire Line - 15700 10000 15700 9950 -Wire Wire Line - 15700 9950 17600 9950 -Wire Wire Line - 17600 9950 17600 10000 -Wire Wire Line - 15800 9950 15800 10000 -Connection ~ 15800 9950 -Wire Wire Line - 16000 9950 16000 10000 -Connection ~ 16000 9950 -Wire Wire Line - 16200 9950 16200 10000 -Connection ~ 16200 9950 -Wire Wire Line - 16400 9950 16400 10000 -Connection ~ 16400 9950 -Wire Wire Line - 16600 9950 16600 10000 -Connection ~ 16600 9950 -Wire Wire Line - 16800 9950 16800 10000 -Connection ~ 16800 9950 -Wire Wire Line - 17000 9950 17000 10000 -Connection ~ 17000 9950 -Wire Wire Line - 17200 9950 17200 10000 -Connection ~ 17200 9950 -Wire Wire Line - 17400 9950 17400 10000 -Connection ~ 17400 9950 -Wire Wire Line - 14500 9950 14500 10000 -Connection ~ 14500 9950 -Wire Wire Line - 14700 9950 14700 10000 -Connection ~ 14700 9950 -Wire Wire Line - 14900 9950 14900 10000 -Connection ~ 14900 9950 -Wire Wire Line - 15100 9950 15100 10000 -Connection ~ 15100 9950 -Wire Wire Line - 15400 9950 15400 10000 -Connection ~ 15400 9950 -Wire Wire Line - 15200 9950 15200 10000 -Connection ~ 15200 9950 -Wire Wire Line - 13200 12400 13200 12500 -Connection ~ 13200 12500 -Wire Wire Line - 13400 12500 13400 12400 -Connection ~ 13400 12500 -Wire Wire Line - 13600 12500 13600 12400 -Connection ~ 13600 12500 -Wire Wire Line - 13800 12500 13800 12400 -Connection ~ 13800 12500 -Wire Wire Line - 14000 12500 14000 12400 -Connection ~ 14000 12500 -Wire Wire Line - 14200 12500 14200 12400 -Connection ~ 14200 12500 -Wire Wire Line - 14400 12500 14400 12400 -Connection ~ 14400 12500 -Wire Wire Line - 14600 12500 14600 12400 -Connection ~ 14600 12500 -Wire Wire Line - 14800 12500 14800 12400 -Connection ~ 14800 12500 -Wire Wire Line - 15000 12500 15000 12400 -Connection ~ 15000 12500 -Wire Wire Line - 15100 12500 15100 12400 -Connection ~ 15100 12500 -Wire Wire Line - 15300 12500 15300 12400 -Connection ~ 15300 12500 -Wire Wire Line - 15500 12500 15500 12400 -Connection ~ 15500 12500 -Wire Wire Line - 15700 12500 15700 12400 -Connection ~ 15700 12500 -Wire Wire Line - 17700 12500 17700 12400 -Connection ~ 17700 12500 -Wire Wire Line - 17500 12500 17500 12400 -Connection ~ 17500 12500 -Wire Wire Line - 16000 12500 16000 12400 -Connection ~ 16000 12500 -Wire Wire Line - 16200 12500 16200 12400 -Connection ~ 16200 12500 -Connection ~ 16400 12500 -Wire Wire Line - 16600 12500 16600 12400 -Connection ~ 16600 12500 -Wire Wire Line - 16800 12500 16800 12400 -Connection ~ 16800 12500 -Wire Wire Line - 17000 12500 17000 12400 -Connection ~ 17000 12500 -Wire Wire Line - 17200 12500 17200 12400 -Connection ~ 17200 12500 -Wire Wire Line - 17800 12500 17800 12400 -Connection ~ 17800 12500 -Connection ~ 18000 12500 -Wire Wire Line - 17900 12500 17900 12400 -Wire Wire Line - 18200 12500 18200 12400 -Connection ~ 18200 12500 -Wire Wire Line - 18400 12500 18400 12400 -Connection ~ 18400 12500 -Wire Wire Line - 18600 12500 18600 12400 -Connection ~ 18600 12500 -Wire Wire Line - 18800 12500 18800 12400 -Connection ~ 18800 12500 -Connection ~ 5300 750 -Wire Wire Line - 5300 650 5300 800 -Wire Wire Line - 5500 750 5500 800 -Connection ~ 5500 750 -Wire Wire Line - 5700 750 5700 800 -Connection ~ 5700 750 -Wire Wire Line - 5000 750 5000 800 -Connection ~ 5000 750 -Wire Wire Line - 5200 750 5200 800 -Connection ~ 5200 750 -Wire Wire Line - 15700 750 15700 700 -Connection ~ 15700 700 -Wire Wire Line - 15900 700 15900 750 -Connection ~ 15900 700 -Wire Wire Line - 16100 700 16100 750 -Connection ~ 16100 700 -Wire Wire Line - 16300 700 16300 750 -Connection ~ 16300 700 -Wire Wire Line - 16000 600 16000 750 -Wire Wire Line - 16250 6200 16250 6250 -Connection ~ 16250 6200 -Wire Wire Line - 16050 6200 16050 6250 -Connection ~ 16050 6200 -Wire Wire Line - 15650 6200 15650 6250 -Connection ~ 15650 6200 -Wire Wire Line - 15850 6200 15850 6250 -Connection ~ 15850 6200 -Wire Wire Line - 4800 6350 5800 6350 -Wire Wire Line - 5800 6350 5800 6400 -Wire Wire Line - 4900 6350 4900 6400 -Connection ~ 4900 6350 -Wire Wire Line - 5100 6350 5100 6400 -Connection ~ 5100 6350 -Connection ~ 5300 6350 -Wire Wire Line - 5500 6350 5500 6400 -Connection ~ 5500 6350 -Wire Wire Line - 5700 6400 5700 6350 -Connection ~ 5700 6350 -Wire Wire Line - 13900 4450 13550 4450 -Wire Wire Line - 11150 2250 10750 2250 -Wire Wire Line - 11150 2050 10750 2050 -Wire Wire Line - 11150 1550 10750 1550 -Wire Wire Line - 11150 1250 10750 1250 -Wire Wire Line - 11150 1850 10750 1850 -Wire Wire Line - 11150 1350 10750 1350 -Wire Wire Line - 11150 1450 10750 1450 -Wire Wire Line - 11150 1150 10750 1150 -Wire Wire Line - 11150 1050 10750 1050 -Wire Wire Line - 11150 2150 10750 2150 -Wire Wire Line - 11150 1950 10750 1950 -Wire Wire Line - 11150 1750 10750 1750 -Wire Wire Line - 11150 1650 10750 1650 -Wire Wire Line - 3200 3600 2750 3600 -Wire Wire Line - 3200 3800 2750 3800 -Wire Bus Line - 1250 3300 1350 3300 -Wire Bus Line - 1350 3300 1350 4900 -Wire Wire Line - 2800 4000 3200 4000 -Wire Wire Line - 7400 5300 7700 5300 -Wire Wire Line - 7400 5500 7700 5500 -Wire Wire Line - 7750 4000 7400 4000 -Wire Wire Line - 7750 4800 7400 4800 -Wire Wire Line - 13550 5150 13900 5150 -Wire Wire Line - 18750 5150 18300 5150 -Wire Wire Line - 18300 3650 18750 3650 -Wire Wire Line - 13500 2950 13900 2950 -Wire Bus Line - 12000 750 11900 750 -Wire Wire Line - 11900 1600 11450 1600 -Wire Wire Line - 11900 1400 11450 1400 -Wire Wire Line - 11900 1700 11450 1700 -Wire Wire Line - 11900 1500 11450 1500 -Wire Wire Line - 11900 1300 11450 1300 -Wire Wire Line - 11900 1100 11450 1100 -Wire Wire Line - 11900 1000 11450 1000 -Wire Wire Line - 11900 1200 11450 1200 -Wire Wire Line - 11900 1800 11450 1800 -Wire Wire Line - 11900 2000 11450 2000 -Wire Wire Line - 11900 2100 11450 2100 -Wire Wire Line - 11900 1900 11450 1900 -Wire Wire Line - 11900 2300 11450 2300 -Wire Wire Line - 11900 2500 11450 2500 -Wire Wire Line - 11900 2400 11450 2400 -Wire Wire Line - 11900 2200 11450 2200 -Wire Wire Line - 18300 4350 18750 4350 -Wire Bus Line - 12850 6900 12750 6900 -Wire Bus Line - 12750 7700 12850 7700 -Wire Bus Line - 12850 7700 12850 8100 -Wire Wire Line - 18400 1350 18300 1350 -Wire Wire Line - 18300 1550 18400 1550 -Wire Wire Line - 18300 1750 18400 1750 -Wire Wire Line - 14200 6750 14250 6750 -Wire Wire Line - 14200 6950 14250 6950 -Wire Wire Line - 14250 7150 12950 7150 -Wire Wire Line - 14250 7350 12950 7350 -Wire Wire Line - 14200 7550 14250 7550 -Wire Wire Line - 14200 7750 14250 7750 -Wire Wire Line - 14250 7950 12950 7950 -Wire Wire Line - 14250 8150 12950 8150 -Wire Wire Line - 14200 8350 14250 8350 -Wire Wire Line - 1600 5700 1450 5700 -Wire Wire Line - 12400 4850 12550 4850 -Wire Wire Line - 12550 4850 12550 5100 -Wire Bus Line - 11100 4050 11100 3950 -Wire Bus Line - 11100 3950 11000 3950 -Wire Wire Line - 17650 6750 17800 6750 -Wire Wire Line - 18250 6850 17650 6850 -Wire Wire Line - 17650 7050 18250 7050 -Wire Bus Line - 18350 6750 18450 6750 -Wire Wire Line - 16500 10000 16500 9850 -Wire Wire Line - 15900 6100 15900 6200 -Connection ~ 15900 6200 -Wire Wire Line - 14250 8650 14200 8650 -Wire Wire Line - 17650 8350 18250 8350 -Wire Wire Line - 18250 8150 17650 8150 -Wire Wire Line - 17650 8250 18250 8250 -Wire Wire Line - 17650 8450 18250 8450 -Wire Wire Line - 17650 8850 18250 8850 -Wire Wire Line - 17650 8650 18250 8650 -Wire Wire Line - 18250 8550 17650 8550 -Wire Wire Line - 17650 8750 18250 8750 -Wire Bus Line - 18350 8050 18650 8050 -Wire Wire Line - 2350 12450 2350 12400 -Connection ~ 2350 12400 -Wire Wire Line - 1650 12450 1650 12350 -Connection ~ 1650 12400 -Wire Wire Line - 2350 12850 2350 12900 -Connection ~ 2350 12900 -Wire Wire Line - 1650 12850 1650 12950 -Connection ~ 1650 12900 -Wire Wire Line - 2000 13950 2000 13900 -Wire Wire Line - 2000 13450 2000 13500 -Wire Wire Line - 1650 13500 1650 13400 -Wire Wire Line - 1650 13900 1650 14000 -Wire Wire Line - 2350 13450 2350 13500 -Connection ~ 2000 13450 -Wire Wire Line - 3350 13500 3350 13450 -Connection ~ 3350 13450 -Wire Wire Line - 2700 13500 2700 13450 -Connection ~ 2700 13450 -Wire Wire Line - 3700 13950 1650 13950 -Connection ~ 2000 13950 -Connection ~ 1650 13950 -Wire Wire Line - 2700 13900 2700 13950 -Connection ~ 2700 13950 -Wire Wire Line - 3350 13900 3350 13950 -Connection ~ 3350 13950 -Connection ~ 2000 14850 -Wire Wire Line - 2000 14850 2000 14800 -Wire Wire Line - 2700 14800 2700 14850 -Wire Wire Line - 2700 14850 1650 14850 -Connection ~ 2000 14350 -Wire Wire Line - 2000 14350 2000 14400 -Wire Wire Line - 2700 14400 2700 14350 -Wire Wire Line - 2700 14350 1650 14350 -Wire Wire Line - 2350 14400 2350 14350 -Connection ~ 2350 14350 -Wire Wire Line - 1650 14400 1650 14300 -Connection ~ 1650 14350 -Wire Wire Line - 2350 14800 2350 14850 -Connection ~ 2350 14850 -Wire Wire Line - 1650 14800 1650 14900 -Connection ~ 1650 14850 -Connection ~ 4950 14850 -Wire Wire Line - 4950 14800 4950 14850 -Wire Wire Line - 5650 14850 5650 14800 -Connection ~ 4950 14350 -Wire Wire Line - 4950 14400 4950 14350 -Wire Wire Line - 5650 14350 5650 14400 -Wire Wire Line - 5300 14400 5300 14350 -Connection ~ 5300 14350 -Wire Wire Line - 4600 14400 4600 14300 -Connection ~ 4600 14350 -Wire Wire Line - 5300 14850 5300 14800 -Connection ~ 5300 14850 -Wire Wire Line - 4600 14800 4600 14900 -Connection ~ 4600 14850 -Wire Wire Line - 4600 14850 6000 14850 -Wire Wire Line - 6000 14850 6000 14800 -Connection ~ 5650 14850 -Connection ~ 5650 13400 -Wire Wire Line - 6000 13400 6000 13450 -Connection ~ 4950 13900 -Wire Wire Line - 4950 13850 4950 13900 -Wire Wire Line - 5650 13900 5650 13850 -Connection ~ 4950 13400 -Wire Wire Line - 4950 13450 4950 13400 -Wire Wire Line - 5650 13400 5650 13450 -Wire Wire Line - 5300 13450 5300 13400 -Connection ~ 5300 13400 -Wire Wire Line - 4600 13450 4600 13350 -Connection ~ 4600 13400 -Wire Wire Line - 5300 13900 5300 13850 -Connection ~ 5300 13900 -Wire Wire Line - 4600 13850 4600 13950 -Connection ~ 4600 13900 -Wire Wire Line - 6000 13900 6000 13850 -Connection ~ 5650 13900 -Wire Wire Line - 4600 13900 6350 13900 -Wire Wire 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+Text Label 13450 3500 0 60 ~ 0 +M1_DQ3 +Text Label 13450 3700 0 60 ~ 0 +M1_DQ1 +Text Label 13450 3800 0 60 ~ 0 +M1_DQ0 +$Comp +L R_PACK4 RP5 +U 1 1 4C69D3A9 +P 14100 3450 +F 0 "RP5" H 14100 3900 40 0000 C CNN +F 1 "R_PACK4" H 14100 3400 40 0000 C CNN + 1 14100 3450 + -1 0 0 1 +$EndComp +$Comp +L R_PACK4 RP3 +U 1 1 4C69D3A4 +P 14100 2250 +F 0 "RP3" H 14100 2700 40 0000 C CNN +F 1 "R_PACK4" H 14100 2200 40 0000 C CNN + 1 14100 2250 + -1 0 0 1 +$EndComp +$Comp +L R_PACK4 RP4 +U 1 1 4C69D3A3 +P 14100 2850 +F 0 "RP4" H 14100 3300 40 0000 C CNN +F 1 "R_PACK4" H 14100 2800 40 0000 C CNN + 1 14100 2850 + -1 0 0 1 +$EndComp +Text Label 17350 4050 2 60 ~ 0 R_M1_BA1 -Text Label 13900 3950 2 60 ~ 0 +Text Label 17350 3950 2 60 ~ 0 R_M1_BA0 -Text Label 13350 4950 0 60 ~ 0 +Text Label 16800 4950 0 60 ~ 0 R_M1_RAS# -Text Label 13350 5050 0 60 ~ 0 +Text Label 16800 5050 0 60 ~ 0 R_M1_CAS# -Text Label 12000 4350 0 60 ~ 0 +Text Label 14300 2000 0 60 ~ 0 R_M1_CAS# -Text Label 12000 4250 0 60 ~ 0 +Text Label 14300 1900 0 60 ~ 0 R_M1_RAS# -Text HLabel 11250 4250 0 60 Output ~ 0 +Text HLabel 13550 1900 0 60 Output ~ 0 M1_RAS# -Text HLabel 11250 4350 0 60 Output ~ 0 +Text HLabel 13550 2000 0 60 Output ~ 0 M1_CAS# $Comp L R_PACK4 RP2 U 1 1 4C69CEE8 -P 11800 4000 -F 0 "RP2" H 11800 4450 40 0000 C CNN -F 1 "R_PACK4" H 11800 3950 40 0000 C CNN - 1 11800 4000 +P 14100 1650 +F 0 "RP2" H 14100 2100 40 0000 C CNN +F 1 "R_PACK4" H 14100 1600 40 0000 C CNN + 1 14100 1650 -1 0 0 1 $EndComp -Text Label 11550 4050 2 60 ~ 0 +Text Label 13850 1700 2 60 ~ 0 M1_BA1 -Text Label 11550 4150 2 60 ~ 0 +Text Label 13850 1800 2 60 ~ 0 M1_BA0 -Text Label 12050 3600 0 60 ~ 0 +Text Label 14350 1400 0 60 ~ 0 R_M1_A0 -Text Label 12050 3500 0 60 ~ 0 +Text Label 14350 1300 0 60 ~ 0 R_M1_A1 -Text Label 12050 3300 0 60 ~ 0 +Text Label 14350 1100 0 60 ~ 0 R_M1_A3 -Text Label 12050 3400 0 60 ~ 0 +Text Label 14350 1200 0 60 ~ 0 R_M1_A2 -Text Label 11300 3400 0 60 ~ 0 +Text Label 13600 1200 0 60 ~ 0 M1_A2 -Text Label 11300 3300 0 60 ~ 0 +Text Label 13600 1100 0 60 ~ 0 M1_A3 -Text Label 11300 3500 0 60 ~ 0 +Text Label 13600 1300 0 60 ~ 0 M1_A1 -Text Label 11300 3600 0 60 ~ 0 +Text Label 13600 1400 0 60 ~ 0 M1_A0 $Comp L R_PACK4 RP1 U 1 1 4C69C6B2 -P 11800 3250 -F 0 "RP1" H 11800 3700 40 0000 C CNN -F 1 "R_PACK4" H 11800 3200 40 0000 C CNN - 1 11800 3250 +P 14100 1050 +F 0 "RP1" H 14100 1500 40 0000 C CNN +F 1 "R_PACK4" H 14100 1000 40 0000 C CNN + 1 14100 1050 -1 0 0 1 $EndComp Text Label 5750 6350 0 40 ~ 0 @@ -1707,10 +1838,10 @@ $EndComp $Comp L +2.5V #PWR043 U 1 1 4C61E523 -P 16000 600 -F 0 "#PWR043" H 16000 550 20 0001 C CNN -F 1 "+2.5V" H 16000 700 30 0000 C CNN - 1 16000 600 +P 19450 600 +F 0 "#PWR043" H 19450 550 20 0001 C CNN +F 1 "+2.5V" H 19450 700 30 0000 C CNN + 1 19450 600 1 0 0 -1 $EndComp $Comp @@ -1745,14 +1876,14 @@ SD_CMD Text HLabel 18450 6750 2 60 BiDi ~ 0 SD_DAT[0..3] Entry Wire Line - 11100 4050 11200 4150 + 13400 1700 13500 1800 Entry Wire Line - 11100 3950 11200 4050 -Text Label 12450 4150 2 60 ~ 0 + 13400 1600 13500 1700 +Text Label 14750 1800 2 60 ~ 0 R_M1_BA0 -Text Label 12450 4050 2 60 ~ 0 +Text Label 14750 1700 2 60 ~ 0 R_M1_BA1 -Text HLabel 11000 3950 0 60 Output ~ 0 +Text HLabel 13300 1600 0 60 Output ~ 0 M1_BA[0..1] Entry Wire Line 7800 4400 7900 4300 @@ -1760,15 +1891,15 @@ Entry Wire Line 7800 4300 7900 4200 Text HLabel 8050 4200 2 60 Output ~ 0 M0_BA[0..1] -Text HLabel 12400 4850 0 60 Output ~ 0 +Text HLabel 11050 2650 0 60 Output ~ 0 M1_CS# $Comp L GND #PWR045 U 1 1 4C60C24F -P 12550 5100 -F 0 "#PWR045" H 12550 5100 30 0001 C CNN -F 1 "GND" H 12550 5030 30 0001 C CNN - 1 12550 5100 +P 11200 2900 +F 0 "#PWR045" H 11200 2900 30 0001 C CNN +F 1 "GND" H 11200 2830 30 0001 C CNN + 1 11200 2900 -1 0 0 -1 $EndComp $Comp @@ -1780,15 +1911,15 @@ F 1 "GND" H 1600 5880 30 0001 C CNN 1 1600 5950 -1 0 0 -1 $EndComp -Text HLabel 18400 1750 2 60 BiDi ~ 0 +Text HLabel 21850 1750 2 60 BiDi ~ 0 USBA_VM -Text HLabel 18400 1650 2 60 BiDi ~ 0 +Text HLabel 21850 1650 2 60 BiDi ~ 0 USBA_VP -Text HLabel 18400 1550 2 60 BiDi ~ 0 +Text HLabel 21850 1550 2 60 BiDi ~ 0 USBA_RCV -Text HLabel 18400 1450 2 60 BiDi ~ 0 +Text HLabel 21850 1450 2 60 BiDi ~ 0 USBA_OE_N -Text HLabel 18400 1350 2 60 BiDi ~ 0 +Text HLabel 21850 1350 2 60 BiDi ~ 0 USBA_SPD Text HLabel 14200 6750 0 60 BiDi ~ 0 ETH_CLK @@ -1846,37 +1977,37 @@ Text HLabel 14200 6850 0 60 BiDi ~ 0 ETH_MDIO Text HLabel 14200 8450 0 60 BiDi ~ 0 ETH_MDC -Text Label 18400 4250 0 60 ~ 0 -M1_DQ0 -Text Label 18400 4150 0 60 ~ 0 -M1_DQ1 -Text Label 18400 4350 0 60 ~ 0 -M1_DQ3 -Text Label 18400 4450 0 60 ~ 0 -M1_DQ2 -Text Label 18400 4050 0 60 ~ 0 +Text Label 21750 4250 0 60 ~ 0 +R_M1_DQ0 +Text Label 21750 4150 0 60 ~ 0 +R_M1_DQ1 +Text Label 21750 4350 0 60 ~ 0 +R_M1_DQ3 +Text Label 21750 4450 0 60 ~ 0 +R_M1_DQ2 +Text Label 21850 4050 0 60 ~ 0 M1_DQ8 -Text Label 18400 5050 0 60 ~ 0 -M1_DQ4 -Text Label 18400 4950 0 60 ~ 0 -M1_DQ5 -Text Label 18400 4750 0 60 ~ 0 -M1_DQ7 -Text Label 18400 4850 0 60 ~ 0 -M1_DQ6 -Text Label 18350 3250 0 60 ~ 0 +Text Label 21750 5050 0 60 ~ 0 +R_M1_DQ4 +Text Label 21750 4950 0 60 ~ 0 +R_M1_DQ5 +Text Label 21750 4750 0 60 ~ 0 +R_M1_DQ7 +Text Label 21750 4850 0 60 ~ 0 +R_M1_DQ6 +Text Label 21800 3250 0 60 ~ 0 M1_DQ14 -Text Label 18350 3150 0 60 ~ 0 +Text Label 21800 3150 0 60 ~ 0 M1_DQ15 -Text Label 18350 3350 0 60 ~ 0 +Text Label 21800 3350 0 60 ~ 0 M1_DQ13 -Text Label 18350 3450 0 60 ~ 0 +Text Label 21800 3450 0 60 ~ 0 M1_DQ12 -Text Label 18400 3950 0 60 ~ 0 +Text Label 21850 3950 0 60 ~ 0 M1_DQ9 -Text Label 18350 3750 0 60 ~ 0 +Text Label 21800 3750 0 60 ~ 0 M1_DQ11 -Text Label 18350 3850 0 60 ~ 0 +Text Label 21800 3850 0 60 ~ 0 M1_DQ10 Entry Wire Line 11900 2500 12000 2400 @@ -2170,17 +2301,9 @@ Entry Wire Line 10650 2050 10750 2150 Entry Wire Line 10650 2150 10750 2250 -Text HLabel 13500 2950 0 60 Output ~ 0 -M1_CKE -Text HLabel 13550 3550 0 60 Output ~ 0 -M1_WE# -Text HLabel 13550 5150 0 60 Output ~ 0 +Text HLabel 17000 5150 0 60 Output ~ 0 M1_UDM -Text HLabel 18750 4650 2 60 Output ~ 0 -M1_LDQS -Text HLabel 18750 5150 2 60 Output ~ 0 -M1_LDM -Text HLabel 18750 3650 2 60 Output ~ 0 +Text HLabel 22200 3650 2 60 Output ~ 0 M1_UDQS Text Label 10850 1750 0 60 ~ 0 M1_A5 @@ -2208,39 +2331,39 @@ Text Label 10850 1150 0 60 ~ 0 M1_A11 Text Label 10850 1050 0 60 ~ 0 M1_A12 -Text Label 13500 4850 0 60 ~ 0 +Text Label 16950 4850 0 60 ~ 0 M1_A6 -Text Label 13500 4750 0 60 ~ 0 +Text Label 16950 4750 0 60 ~ 0 M1_A5 -Text Label 13500 4550 0 60 ~ 0 +Text Label 16950 4550 0 60 ~ 0 R_M1_A3 -Text Label 13500 3050 0 60 ~ 0 +Text Label 16950 3050 0 60 ~ 0 M1_A12 -Text Label 13500 2850 0 60 ~ 0 +Text Label 16950 2850 0 60 ~ 0 M1_A11 -Text Label 13500 3150 0 60 ~ 0 +Text Label 16950 3150 0 60 ~ 0 M1_A8 -Text Label 13500 3250 0 60 ~ 0 +Text Label 16950 3250 0 60 ~ 0 M1_A9 -Text Label 13500 3450 0 60 ~ 0 +Text Label 16950 3450 0 60 ~ 0 M1_A4 -Text Label 13500 3350 0 60 ~ 0 +Text Label 16950 3350 0 60 ~ 0 M1_A10 -Text Label 13500 3750 0 60 ~ 0 +Text Label 16950 3750 0 60 ~ 0 M1_A7 -Text Label 13500 3850 0 60 ~ 0 +Text Label 16950 3850 0 60 ~ 0 R_M1_A2 -Text Label 13500 4250 0 60 ~ 0 +Text Label 16950 4250 0 60 ~ 0 R_M1_A1 -Text Label 13500 4150 0 60 ~ 0 +Text Label 16950 4150 0 60 ~ 0 R_M1_A0 Text HLabel 10250 900 0 60 Output ~ 0 M1_A[0..12] Text HLabel 14200 8750 0 60 BiDi ~ 0 ETH_INT -Text HLabel 13550 4350 0 60 Output ~ 0 +Text HLabel 17000 4350 0 60 Output ~ 0 M1_CLK -Text HLabel 13550 4450 0 60 Output ~ 0 +Text HLabel 17000 4450 0 60 Output ~ 0 M1_CLK# Text HLabel 7750 4800 2 60 Output ~ 0 M0_CLK @@ -2285,10 +2408,10 @@ $EndComp $Comp L XC6SLX45FGG484 U1 U 1 1 4C431E37 -P 16100 3150 -F 0 "U1" H 16100 3250 70 0000 C CNN -F 1 "XC6SLX45FGG484" H 16100 3050 70 0000 C CNN - 1 16100 3150 +P 19550 3150 +F 0 "U1" H 19550 3250 70 0000 C CNN +F 1 "XC6SLX45FGG484" H 19550 3050 70 0000 C CNN + 1 19550 3150 1 0 0 -1 $EndComp $Comp diff --git a/kicad/xue-rnc/NV_MEMORIES.sch b/kicad/xue-rnc/NV_MEMORIES.sch index aeb204b..a3a7042 100644 --- a/kicad/xue-rnc/NV_MEMORIES.sch +++ b/kicad/xue-rnc/NV_MEMORIES.sch @@ -1,4 +1,4 @@ -EESchema Schematic File Version 2 date Mon 16 Aug 2010 07:03:17 PM COT +EESchema Schematic File Version 2 date Mon 16 Aug 2010 07:34:39 PM COT LIBS:power LIBS:r_pack2 LIBS:v0402mhs03 diff --git a/kicad/xue-rnc/USB.sch b/kicad/xue-rnc/USB.sch index d41509c..d558ea2 100644 --- a/kicad/xue-rnc/USB.sch +++ b/kicad/xue-rnc/USB.sch @@ -1,4 +1,4 @@ -EESchema Schematic File Version 2 date Mon 16 Aug 2010 07:03:17 PM COT +EESchema Schematic File Version 2 date Mon 16 Aug 2010 07:34:39 PM COT LIBS:power LIBS:r_pack2 LIBS:v0402mhs03 diff --git a/kicad/xue-rnc/eth_phy.sch b/kicad/xue-rnc/eth_phy.sch index 1d48e08..3709937 100644 --- a/kicad/xue-rnc/eth_phy.sch +++ b/kicad/xue-rnc/eth_phy.sch @@ -1,4 +1,4 @@ -EESchema Schematic File Version 2 date Mon 16 Aug 2010 07:03:17 PM COT +EESchema Schematic File Version 2 date Mon 16 Aug 2010 07:34:39 PM COT LIBS:power LIBS:r_pack2 LIBS:v0402mhs03 diff --git a/kicad/xue-rnc/xue-rnc-cache.lib b/kicad/xue-rnc/xue-rnc-cache.lib index 84597d1..6bdf26b 100644 --- a/kicad/xue-rnc/xue-rnc-cache.lib +++ b/kicad/xue-rnc/xue-rnc-cache.lib @@ -1,4 +1,4 @@ -EESchema-LIBRARY Version 2.3 Date: Mon 16 Aug 2010 07:03:18 PM COT +EESchema-LIBRARY Version 2.3 Date: Mon 16 Aug 2010 07:34:39 PM COT # # +1.2V # diff --git a/kicad/xue-rnc/xue-rnc.brd b/kicad/xue-rnc/xue-rnc.brd index ea3650a..230fbd7 100644 --- a/kicad/xue-rnc/xue-rnc.brd +++ b/kicad/xue-rnc/xue-rnc.brd @@ -1,4 +1,4 @@ -PCBNEW-BOARD Version 1 date Mon 16 Aug 2010 07:03:11 PM COT +PCBNEW-BOARD Version 1 date Mon 16 Aug 2010 07:35:46 PM COT # Created by Pcbnew(2010-07-15 BZR 2414)-unstable @@ -6,15 +6,15 @@ $GENERAL LayerCount 6 Ly 1FFF801F EnabledLayers 1FFF801F -Links 557 -NoConn 557 +Links 567 +NoConn 567 Di 45200 13449 70210 50668 Ndraw 7 Ntrack 0 Nzone 0 BoardThickness 630 -Nmodule 116 -Nnets 175 +Nmodule 119 +Nnets 185 $EndGENERAL $SHEETDESCR @@ -90,159 +90,159 @@ Na 5 "+5V" St ~ $EndEQUIPOT $EQUIPOT -Na 6 "/DDR_Banks/M0_A0" +Na 6 "/DDR_Banks/M0_A11" St ~ $EndEQUIPOT $EQUIPOT -Na 7 "/DDR_Banks/M0_A10" +Na 7 "/DDR_Banks/M0_A5" St ~ $EndEQUIPOT $EQUIPOT -Na 8 "/DDR_Banks/M0_A5" +Na 8 "/DDR_Banks/M0_A9" St ~ $EndEQUIPOT $EQUIPOT -Na 9 "/DDR_Banks/M0_A8" +Na 9 "/DDR_Banks/M0_BA0" St ~ $EndEQUIPOT $EQUIPOT -Na 10 "/DDR_Banks/M0_BA0" +Na 10 "/DDR_Banks/M0_CKE" St ~ $EndEQUIPOT $EQUIPOT -Na 11 "/DDR_Banks/M0_DQ10" +Na 11 "/DDR_Banks/M0_DQ0" St ~ $EndEQUIPOT $EQUIPOT -Na 12 "/DDR_Banks/M0_DQ6" +Na 12 "/DDR_Banks/M0_DQ11" St ~ $EndEQUIPOT $EQUIPOT -Na 13 "/DDR_Banks/M0_DQ9" +Na 13 "/DDR_Banks/M0_DQ14" St ~ $EndEQUIPOT $EQUIPOT -Na 14 "/DDR_Banks/M0_LDQS" +Na 14 "/DDR_Banks/M0_DQ7" St ~ $EndEQUIPOT $EQUIPOT -Na 15 "/DDR_Banks/M0_UDM" +Na 15 "/DDR_Banks/M0_DQ8" St ~ $EndEQUIPOT $EQUIPOT -Na 16 "/DDR_Banks/M0_WE#" +Na 16 "/DDR_Banks/M0_DQ9" St ~ $EndEQUIPOT $EQUIPOT -Na 17 "/DDR_Banks/M1_A1" +Na 17 "/DDR_Banks/M0_LDM" St ~ $EndEQUIPOT $EQUIPOT -Na 18 "/DDR_Banks/M1_A11" +Na 18 "/DDR_Banks/M0_RAS#" St ~ $EndEQUIPOT $EQUIPOT -Na 19 "/DDR_Banks/M1_A2" +Na 19 "/DDR_Banks/M0_UDM" St ~ $EndEQUIPOT $EQUIPOT -Na 20 "/DDR_Banks/M1_A5" +Na 20 "/DDR_Banks/M0_UDQS" St ~ $EndEQUIPOT $EQUIPOT -Na 21 "/DDR_Banks/M1_A6" +Na 21 "/DDR_Banks/M0_WE#" St ~ $EndEQUIPOT $EQUIPOT -Na 22 "/DDR_Banks/M1_BA0" +Na 22 "/DDR_Banks/M1_A0" St ~ $EndEQUIPOT $EQUIPOT -Na 23 "/DDR_Banks/M1_BA1" +Na 23 "/DDR_Banks/M1_A12" St ~ $EndEQUIPOT $EQUIPOT -Na 24 "/DDR_Banks/M1_CAS#" +Na 24 "/DDR_Banks/M1_A7" St ~ $EndEQUIPOT $EQUIPOT -Na 25 "/DDR_Banks/M1_CKE" +Na 25 "/DDR_Banks/M1_A9" St ~ $EndEQUIPOT $EQUIPOT -Na 26 "/DDR_Banks/M1_CLK#" +Na 26 "/DDR_Banks/M1_CAS#" St ~ $EndEQUIPOT $EQUIPOT -Na 27 "/DDR_Banks/M1_DQ0" +Na 27 "/DDR_Banks/M1_CLK" St ~ $EndEQUIPOT $EQUIPOT -Na 28 "/DDR_Banks/M1_DQ10" +Na 28 "/DDR_Banks/M1_CLK#" St ~ $EndEQUIPOT $EQUIPOT -Na 29 "/DDR_Banks/M1_DQ11" +Na 29 "/DDR_Banks/M1_DQ0" St ~ $EndEQUIPOT $EQUIPOT -Na 30 "/DDR_Banks/M1_DQ13" +Na 30 "/DDR_Banks/M1_DQ1" St ~ $EndEQUIPOT $EQUIPOT -Na 31 "/DDR_Banks/M1_DQ15" +Na 31 "/DDR_Banks/M1_DQ12" St ~ $EndEQUIPOT $EQUIPOT -Na 32 "/DDR_Banks/M1_DQ3" +Na 32 "/DDR_Banks/M1_DQ14" St ~ $EndEQUIPOT $EQUIPOT -Na 33 "/DDR_Banks/M1_LDQS" +Na 33 "/DDR_Banks/M1_DQ15" St ~ $EndEQUIPOT $EQUIPOT -Na 34 "/DDR_Banks/M1_UDM" +Na 34 "/DDR_Banks/M1_DQ2" St ~ $EndEQUIPOT $EQUIPOT -Na 35 "/DDR_Banks/M1_WE#" +Na 35 "/DDR_Banks/M1_DQ7" St ~ $EndEQUIPOT $EQUIPOT -Na 36 "/Ethernet_Phy/ETH_A1.8V" +Na 36 "/DDR_Banks/M1_RAS#" St ~ $EndEQUIPOT $EQUIPOT -Na 37 "/Ethernet_Phy/ETH_A3.3V" +Na 37 "/DDR_Banks/M1_UDM" St ~ $EndEQUIPOT $EQUIPOT -Na 38 "/Ethernet_Phy/ETH_CLK" +Na 38 "/DDR_Banks/M1_UDQS" St ~ $EndEQUIPOT $EQUIPOT -Na 39 "/Ethernet_Phy/ETH_COL" +Na 39 "/DDR_Banks/M1_WE#" St ~ $EndEQUIPOT $EQUIPOT -Na 40 "/Ethernet_Phy/ETH_CRS" +Na 40 "/Ethernet_Phy/ETH_A1.8V" St ~ $EndEQUIPOT $EQUIPOT -Na 41 "/Ethernet_Phy/ETH_INT" +Na 41 "/Ethernet_Phy/ETH_A3.3V" St ~ $EndEQUIPOT $EQUIPOT -Na 42 "/Ethernet_Phy/ETH_LED0" +Na 42 "/Ethernet_Phy/ETH_COL" St ~ $EndEQUIPOT $EQUIPOT -Na 43 "/Ethernet_Phy/ETH_LED1" +Na 43 "/Ethernet_Phy/ETH_LED0" St ~ $EndEQUIPOT $EQUIPOT -Na 44 "/Ethernet_Phy/ETH_MDC" +Na 44 "/Ethernet_Phy/ETH_LED1" St ~ $EndEQUIPOT $EQUIPOT @@ -250,7 +250,7 @@ Na 45 "/Ethernet_Phy/ETH_PLL1.8V" St ~ $EndEQUIPOT $EQUIPOT -Na 46 "/Ethernet_Phy/ETH_RXD0" +Na 46 "/Ethernet_Phy/ETH_RXC" St ~ $EndEQUIPOT $EQUIPOT @@ -258,11 +258,11 @@ Na 47 "/Ethernet_Phy/ETH_RXD1" St ~ $EndEQUIPOT $EQUIPOT -Na 48 "/Ethernet_Phy/ETH_RXDV" +Na 48 "/Ethernet_Phy/ETH_RXD3" St ~ $EndEQUIPOT $EQUIPOT -Na 49 "/Ethernet_Phy/ETH_RXER" +Na 49 "/Ethernet_Phy/ETH_TXC" St ~ $EndEQUIPOT $EQUIPOT @@ -278,171 +278,171 @@ Na 52 "/Ethernet_Phy/ETH_TXD2" St ~ $EndEQUIPOT $EQUIPOT -Na 53 "/Ethernet_Phy/ETH_TXEN" +Na 53 "/Ethernet_Phy/ETH_TXD3" St ~ $EndEQUIPOT $EQUIPOT -Na 54 "/Ethernet_Phy/ETH_TXER" +Na 54 "/Ethernet_Phy/ETH_TXEN" St ~ $EndEQUIPOT $EQUIPOT -Na 55 "/FPGA_Spartan6/ETH_MDIO" +Na 55 "/Ethernet_Phy/ETH_TXER" St ~ $EndEQUIPOT $EQUIPOT -Na 56 "/FPGA_Spartan6/ETH_RESET_N" +Na 56 "/FPGA_Spartan6/ETH_CLK" St ~ $EndEQUIPOT $EQUIPOT -Na 57 "/FPGA_Spartan6/ETH_RXC" +Na 57 "/FPGA_Spartan6/ETH_CRS" St ~ $EndEQUIPOT $EQUIPOT -Na 58 "/FPGA_Spartan6/ETH_RXD2" +Na 58 "/FPGA_Spartan6/ETH_INT" St ~ $EndEQUIPOT $EQUIPOT -Na 59 "/FPGA_Spartan6/ETH_RXD3" +Na 59 "/FPGA_Spartan6/ETH_MDC" St ~ $EndEQUIPOT $EQUIPOT -Na 60 "/FPGA_Spartan6/ETH_TXC" +Na 60 "/FPGA_Spartan6/ETH_MDIO" St ~ $EndEQUIPOT $EQUIPOT -Na 61 "/FPGA_Spartan6/ETH_TXD3" +Na 61 "/FPGA_Spartan6/ETH_RESET_N" St ~ $EndEQUIPOT $EQUIPOT -Na 62 "/FPGA_Spartan6/M0_A1" +Na 62 "/FPGA_Spartan6/ETH_RXD0" St ~ $EndEQUIPOT $EQUIPOT -Na 63 "/FPGA_Spartan6/M0_A11" +Na 63 "/FPGA_Spartan6/ETH_RXD2" St ~ $EndEQUIPOT $EQUIPOT -Na 64 "/FPGA_Spartan6/M0_A12" +Na 64 "/FPGA_Spartan6/ETH_RXDV" St ~ $EndEQUIPOT $EQUIPOT -Na 65 "/FPGA_Spartan6/M0_A2" +Na 65 "/FPGA_Spartan6/ETH_RXER" St ~ $EndEQUIPOT $EQUIPOT -Na 66 "/FPGA_Spartan6/M0_A3" +Na 66 "/FPGA_Spartan6/M0_A0" St ~ $EndEQUIPOT $EQUIPOT -Na 67 "/FPGA_Spartan6/M0_A4" +Na 67 "/FPGA_Spartan6/M0_A1" St ~ $EndEQUIPOT $EQUIPOT -Na 68 "/FPGA_Spartan6/M0_A6" +Na 68 "/FPGA_Spartan6/M0_A10" St ~ $EndEQUIPOT $EQUIPOT -Na 69 "/FPGA_Spartan6/M0_A7" +Na 69 "/FPGA_Spartan6/M0_A12" St ~ $EndEQUIPOT $EQUIPOT -Na 70 "/FPGA_Spartan6/M0_A9" +Na 70 "/FPGA_Spartan6/M0_A2" St ~ $EndEQUIPOT $EQUIPOT -Na 71 "/FPGA_Spartan6/M0_BA1" +Na 71 "/FPGA_Spartan6/M0_A3" St ~ $EndEQUIPOT $EQUIPOT -Na 72 "/FPGA_Spartan6/M0_CAS#" +Na 72 "/FPGA_Spartan6/M0_A4" St ~ $EndEQUIPOT $EQUIPOT -Na 73 "/FPGA_Spartan6/M0_CKE" +Na 73 "/FPGA_Spartan6/M0_A6" St ~ $EndEQUIPOT $EQUIPOT -Na 74 "/FPGA_Spartan6/M0_CLK" +Na 74 "/FPGA_Spartan6/M0_A7" St ~ $EndEQUIPOT $EQUIPOT -Na 75 "/FPGA_Spartan6/M0_CLK#" +Na 75 "/FPGA_Spartan6/M0_A8" St ~ $EndEQUIPOT $EQUIPOT -Na 76 "/FPGA_Spartan6/M0_DQ0" +Na 76 "/FPGA_Spartan6/M0_BA1" St ~ $EndEQUIPOT $EQUIPOT -Na 77 "/FPGA_Spartan6/M0_DQ1" +Na 77 "/FPGA_Spartan6/M0_CAS#" St ~ $EndEQUIPOT $EQUIPOT -Na 78 "/FPGA_Spartan6/M0_DQ11" +Na 78 "/FPGA_Spartan6/M0_CLK" St ~ $EndEQUIPOT $EQUIPOT -Na 79 "/FPGA_Spartan6/M0_DQ12" +Na 79 "/FPGA_Spartan6/M0_CLK#" St ~ $EndEQUIPOT $EQUIPOT -Na 80 "/FPGA_Spartan6/M0_DQ13" +Na 80 "/FPGA_Spartan6/M0_DQ1" St ~ $EndEQUIPOT $EQUIPOT -Na 81 "/FPGA_Spartan6/M0_DQ14" +Na 81 "/FPGA_Spartan6/M0_DQ10" St ~ $EndEQUIPOT $EQUIPOT -Na 82 "/FPGA_Spartan6/M0_DQ15" +Na 82 "/FPGA_Spartan6/M0_DQ12" St ~ $EndEQUIPOT $EQUIPOT -Na 83 "/FPGA_Spartan6/M0_DQ2" +Na 83 "/FPGA_Spartan6/M0_DQ13" St ~ $EndEQUIPOT $EQUIPOT -Na 84 "/FPGA_Spartan6/M0_DQ3" +Na 84 "/FPGA_Spartan6/M0_DQ15" St ~ $EndEQUIPOT $EQUIPOT -Na 85 "/FPGA_Spartan6/M0_DQ4" +Na 85 "/FPGA_Spartan6/M0_DQ2" St ~ $EndEQUIPOT $EQUIPOT -Na 86 "/FPGA_Spartan6/M0_DQ5" +Na 86 "/FPGA_Spartan6/M0_DQ3" St ~ $EndEQUIPOT $EQUIPOT -Na 87 "/FPGA_Spartan6/M0_DQ7" +Na 87 "/FPGA_Spartan6/M0_DQ4" St ~ $EndEQUIPOT $EQUIPOT -Na 88 "/FPGA_Spartan6/M0_DQ8" +Na 88 "/FPGA_Spartan6/M0_DQ5" St ~ $EndEQUIPOT $EQUIPOT -Na 89 "/FPGA_Spartan6/M0_LDM" +Na 89 "/FPGA_Spartan6/M0_DQ6" St ~ $EndEQUIPOT $EQUIPOT -Na 90 "/FPGA_Spartan6/M0_RAS#" +Na 90 "/FPGA_Spartan6/M0_LDQS" St ~ $EndEQUIPOT $EQUIPOT -Na 91 "/FPGA_Spartan6/M0_UDQS" +Na 91 "/FPGA_Spartan6/M1_A1" St ~ $EndEQUIPOT $EQUIPOT -Na 92 "/FPGA_Spartan6/M1_A0" +Na 92 "/FPGA_Spartan6/M1_A10" St ~ $EndEQUIPOT $EQUIPOT -Na 93 "/FPGA_Spartan6/M1_A10" +Na 93 "/FPGA_Spartan6/M1_A11" St ~ $EndEQUIPOT $EQUIPOT -Na 94 "/FPGA_Spartan6/M1_A12" +Na 94 "/FPGA_Spartan6/M1_A2" St ~ $EndEQUIPOT $EQUIPOT @@ -454,51 +454,51 @@ Na 96 "/FPGA_Spartan6/M1_A4" St ~ $EndEQUIPOT $EQUIPOT -Na 97 "/FPGA_Spartan6/M1_A7" +Na 97 "/FPGA_Spartan6/M1_A5" St ~ $EndEQUIPOT $EQUIPOT -Na 98 "/FPGA_Spartan6/M1_A8" +Na 98 "/FPGA_Spartan6/M1_A6" St ~ $EndEQUIPOT $EQUIPOT -Na 99 "/FPGA_Spartan6/M1_A9" +Na 99 "/FPGA_Spartan6/M1_A8" St ~ $EndEQUIPOT $EQUIPOT -Na 100 "/FPGA_Spartan6/M1_CLK" +Na 100 "/FPGA_Spartan6/M1_BA0" St ~ $EndEQUIPOT $EQUIPOT -Na 101 "/FPGA_Spartan6/M1_DQ1" +Na 101 "/FPGA_Spartan6/M1_BA1" St ~ $EndEQUIPOT $EQUIPOT -Na 102 "/FPGA_Spartan6/M1_DQ12" +Na 102 "/FPGA_Spartan6/M1_DQ10" St ~ $EndEQUIPOT $EQUIPOT -Na 103 "/FPGA_Spartan6/M1_DQ14" +Na 103 "/FPGA_Spartan6/M1_DQ11" St ~ $EndEQUIPOT $EQUIPOT -Na 104 "/FPGA_Spartan6/M1_DQ2" +Na 104 "/FPGA_Spartan6/M1_DQ13" St ~ $EndEQUIPOT $EQUIPOT -Na 105 "/FPGA_Spartan6/M1_DQ4" +Na 105 "/FPGA_Spartan6/M1_DQ3" St ~ $EndEQUIPOT $EQUIPOT -Na 106 "/FPGA_Spartan6/M1_DQ5" +Na 106 "/FPGA_Spartan6/M1_DQ4" St ~ $EndEQUIPOT $EQUIPOT -Na 107 "/FPGA_Spartan6/M1_DQ6" +Na 107 "/FPGA_Spartan6/M1_DQ5" St ~ $EndEQUIPOT $EQUIPOT -Na 108 "/FPGA_Spartan6/M1_DQ7" +Na 108 "/FPGA_Spartan6/M1_DQ6" St ~ $EndEQUIPOT $EQUIPOT @@ -514,255 +514,295 @@ Na 111 "/FPGA_Spartan6/M1_LDM" St ~ $EndEQUIPOT $EQUIPOT -Na 112 "/FPGA_Spartan6/M1_RAS#" +Na 112 "/FPGA_Spartan6/M1_LDQS" St ~ $EndEQUIPOT $EQUIPOT -Na 113 "/FPGA_Spartan6/M1_UDQS" +Na 113 "/FPGA_Spartan6/NF_CLE" St ~ $EndEQUIPOT $EQUIPOT -Na 114 "/FPGA_Spartan6/NF_ALE" +Na 114 "/FPGA_Spartan6/NF_D1" St ~ $EndEQUIPOT $EQUIPOT -Na 115 "/FPGA_Spartan6/NF_CLE" +Na 115 "/FPGA_Spartan6/NF_D2" St ~ $EndEQUIPOT $EQUIPOT -Na 116 "/FPGA_Spartan6/NF_D1" +Na 116 "/FPGA_Spartan6/NF_D5" St ~ $EndEQUIPOT $EQUIPOT -Na 117 "/FPGA_Spartan6/NF_D5" +Na 117 "/FPGA_Spartan6/NF_D6" St ~ $EndEQUIPOT $EQUIPOT -Na 118 "/FPGA_Spartan6/NF_D7" +Na 118 "/FPGA_Spartan6/NF_RE_N" St ~ $EndEQUIPOT $EQUIPOT -Na 119 "/FPGA_Spartan6/NF_RNB" +Na 119 "/FPGA_Spartan6/NF_WE_N" St ~ $EndEQUIPOT $EQUIPOT -Na 120 "/FPGA_Spartan6/NF_WE_N" +Na 120 "/FPGA_Spartan6/PROG_CCLK" St ~ $EndEQUIPOT $EQUIPOT -Na 121 "/FPGA_Spartan6/PROG_CCLK" +Na 121 "/FPGA_Spartan6/PROG_CSO" St ~ $EndEQUIPOT $EQUIPOT -Na 122 "/FPGA_Spartan6/PROG_CSO" +Na 122 "/FPGA_Spartan6/PROG_MISO0" St ~ $EndEQUIPOT $EQUIPOT -Na 123 "/FPGA_Spartan6/PROG_MISO0" +Na 123 "/FPGA_Spartan6/PROG_MISO1" St ~ $EndEQUIPOT $EQUIPOT -Na 124 "/FPGA_Spartan6/PROG_MISO1" +Na 124 "/FPGA_Spartan6/PROG_MISO2" St ~ $EndEQUIPOT $EQUIPOT -Na 125 "/FPGA_Spartan6/PROG_MISO2" +Na 125 "/FPGA_Spartan6/PROG_MISO3" St ~ $EndEQUIPOT $EQUIPOT -Na 126 "/FPGA_Spartan6/PROG_MISO3" +Na 126 "/FPGA_Spartan6/R_M1_A0" St ~ $EndEQUIPOT $EQUIPOT -Na 127 "/FPGA_Spartan6/R_M1_A0" +Na 127 "/FPGA_Spartan6/R_M1_A1" St ~ $EndEQUIPOT $EQUIPOT -Na 128 "/FPGA_Spartan6/R_M1_A1" +Na 128 "/FPGA_Spartan6/R_M1_A2" St ~ $EndEQUIPOT $EQUIPOT -Na 129 "/FPGA_Spartan6/R_M1_A2" +Na 129 "/FPGA_Spartan6/R_M1_A3" St ~ $EndEQUIPOT $EQUIPOT -Na 130 "/FPGA_Spartan6/R_M1_A3" +Na 130 "/FPGA_Spartan6/R_M1_BA0" St ~ $EndEQUIPOT $EQUIPOT -Na 131 "/FPGA_Spartan6/R_M1_BA0" +Na 131 "/FPGA_Spartan6/R_M1_BA1" St ~ $EndEQUIPOT $EQUIPOT -Na 132 "/FPGA_Spartan6/R_M1_BA1" +Na 132 "/FPGA_Spartan6/R_M1_CAS#" St ~ $EndEQUIPOT $EQUIPOT -Na 133 "/FPGA_Spartan6/R_M1_CAS#" +Na 133 "/FPGA_Spartan6/R_M1_DQ0" St ~ $EndEQUIPOT $EQUIPOT -Na 134 "/FPGA_Spartan6/R_M1_RAS#" +Na 134 "/FPGA_Spartan6/R_M1_DQ1" St ~ $EndEQUIPOT $EQUIPOT -Na 135 "/FPGA_Spartan6/SD_CMD" +Na 135 "/FPGA_Spartan6/R_M1_DQ2" St ~ $EndEQUIPOT $EQUIPOT -Na 136 "/FPGA_Spartan6/SD_DAT1" +Na 136 "/FPGA_Spartan6/R_M1_DQ3" St ~ $EndEQUIPOT $EQUIPOT -Na 137 "/FPGA_Spartan6/SD_DAT3" +Na 137 "/FPGA_Spartan6/R_M1_DQ4" St ~ $EndEQUIPOT $EQUIPOT -Na 138 "/FPGA_Spartan6/USBA_OE_N" +Na 138 "/FPGA_Spartan6/R_M1_DQ5" St ~ $EndEQUIPOT $EQUIPOT -Na 139 "/FPGA_Spartan6/USBA_VP" +Na 139 "/FPGA_Spartan6/R_M1_DQ6" St ~ $EndEQUIPOT $EQUIPOT -Na 140 "/Non_volatile_memories/NF_CS1_N" +Na 140 "/FPGA_Spartan6/R_M1_DQ7" St ~ $EndEQUIPOT $EQUIPOT -Na 141 "/Non_volatile_memories/NF_D0" +Na 141 "/FPGA_Spartan6/R_M1_LDM" St ~ $EndEQUIPOT $EQUIPOT -Na 142 "/Non_volatile_memories/NF_D2" +Na 142 "/FPGA_Spartan6/R_M1_LDQS" St ~ $EndEQUIPOT $EQUIPOT -Na 143 "/Non_volatile_memories/NF_D3" +Na 143 "/FPGA_Spartan6/R_M1_RAS#" St ~ $EndEQUIPOT $EQUIPOT -Na 144 "/Non_volatile_memories/NF_D4" +Na 144 "/FPGA_Spartan6/R_M1_WE#" St ~ $EndEQUIPOT $EQUIPOT -Na 145 "/Non_volatile_memories/NF_D6" +Na 145 "/FPGA_Spartan6/SD_CMD" St ~ $EndEQUIPOT $EQUIPOT -Na 146 "/Non_volatile_memories/NF_RE_N" +Na 146 "/FPGA_Spartan6/SD_DAT0" St ~ $EndEQUIPOT $EQUIPOT -Na 147 "/Non_volatile_memories/SD_CLK" +Na 147 "/FPGA_Spartan6/SD_DAT1" St ~ $EndEQUIPOT $EQUIPOT -Na 148 "/Non_volatile_memories/SD_DAT0" +Na 148 "/FPGA_Spartan6/SD_DAT3" St ~ $EndEQUIPOT $EQUIPOT -Na 149 "/Non_volatile_memories/SD_DAT2" +Na 149 "/FPGA_Spartan6/USBA_SPD" St ~ $EndEQUIPOT $EQUIPOT -Na 150 "/USB/USBA_RCV" +Na 150 "/Non_volatile_memories/NF_ALE" St ~ $EndEQUIPOT $EQUIPOT -Na 151 "/USB/USBA_SPD" +Na 151 "/Non_volatile_memories/NF_CS1_N" St ~ $EndEQUIPOT $EQUIPOT -Na 152 "/USB/USBA_VM" +Na 152 "/Non_volatile_memories/NF_D0" St ~ $EndEQUIPOT $EQUIPOT -Na 153 "GND" +Na 153 "/Non_volatile_memories/NF_D3" St ~ $EndEQUIPOT $EQUIPOT -Na 154 "N-000057" +Na 154 "/Non_volatile_memories/NF_D4" St ~ $EndEQUIPOT $EQUIPOT -Na 155 "N-000058" +Na 155 "/Non_volatile_memories/NF_D7" St ~ $EndEQUIPOT $EQUIPOT -Na 156 "N-000323" +Na 156 "/Non_volatile_memories/NF_RNB" St ~ $EndEQUIPOT $EQUIPOT -Na 157 "N-000325" +Na 157 "/Non_volatile_memories/SD_CLK" St ~ $EndEQUIPOT $EQUIPOT -Na 158 "N-000331" +Na 158 "/Non_volatile_memories/SD_DAT2" St ~ $EndEQUIPOT $EQUIPOT -Na 159 "N-000332" +Na 159 "/USB/USBA_OE_N" St ~ $EndEQUIPOT $EQUIPOT -Na 160 "N-000334" +Na 160 "/USB/USBA_RCV" St ~ $EndEQUIPOT $EQUIPOT -Na 161 "N-000335" +Na 161 "/USB/USBA_VM" St ~ $EndEQUIPOT $EQUIPOT -Na 162 "N-000337" +Na 162 "/USB/USBA_VP" St ~ $EndEQUIPOT $EQUIPOT -Na 163 "N-000338" +Na 163 "GND" St ~ $EndEQUIPOT $EQUIPOT -Na 164 "N-000344" +Na 164 "N-000057" St ~ $EndEQUIPOT $EQUIPOT -Na 165 "N-000346" +Na 165 "N-000058" St ~ $EndEQUIPOT $EQUIPOT -Na 166 "N-000347" +Na 166 "N-000337" St ~ $EndEQUIPOT $EQUIPOT -Na 167 "N-000348" +Na 167 "N-000342" St ~ $EndEQUIPOT $EQUIPOT -Na 168 "N-000349" +Na 168 "N-000343" St ~ $EndEQUIPOT $EQUIPOT -Na 169 "N-000351" +Na 169 "N-000347" St ~ $EndEQUIPOT $EQUIPOT -Na 170 "N-000356" +Na 170 "N-000348" St ~ $EndEQUIPOT $EQUIPOT -Na 171 "N-000357" +Na 171 "N-000349" St ~ $EndEQUIPOT $EQUIPOT -Na 172 "N-000359" +Na 172 "N-000350" St ~ $EndEQUIPOT $EQUIPOT -Na 173 "N-000361" +Na 173 "N-000351" St ~ $EndEQUIPOT $EQUIPOT -Na 174 "VCCO2" +Na 174 "N-000358" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 175 "N-000359" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 176 "N-000360" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 177 "N-000362" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 178 "N-000363" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 179 "N-000368" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 180 "N-000372" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 181 "N-000373" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 182 "N-000374" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 183 "N-000375" +St ~ +$EndEQUIPOT +$EQUIPOT +Na 184 "VCCO2" St ~ $EndEQUIPOT $NCLASS @@ -780,120 +820,119 @@ AddNet "+1.8V" AddNet "+2.5V" AddNet "+3.3V" AddNet "+5V" -AddNet "/DDR_Banks/M0_A0" -AddNet "/DDR_Banks/M0_A10" +AddNet "/DDR_Banks/M0_A11" AddNet "/DDR_Banks/M0_A5" -AddNet "/DDR_Banks/M0_A8" +AddNet "/DDR_Banks/M0_A9" AddNet "/DDR_Banks/M0_BA0" -AddNet "/DDR_Banks/M0_DQ10" -AddNet "/DDR_Banks/M0_DQ6" +AddNet "/DDR_Banks/M0_CKE" +AddNet "/DDR_Banks/M0_DQ0" +AddNet "/DDR_Banks/M0_DQ11" +AddNet "/DDR_Banks/M0_DQ14" +AddNet "/DDR_Banks/M0_DQ7" +AddNet "/DDR_Banks/M0_DQ8" AddNet "/DDR_Banks/M0_DQ9" -AddNet "/DDR_Banks/M0_LDQS" +AddNet "/DDR_Banks/M0_LDM" +AddNet "/DDR_Banks/M0_RAS#" AddNet "/DDR_Banks/M0_UDM" +AddNet "/DDR_Banks/M0_UDQS" AddNet "/DDR_Banks/M0_WE#" -AddNet "/DDR_Banks/M1_A1" -AddNet "/DDR_Banks/M1_A11" -AddNet "/DDR_Banks/M1_A2" -AddNet "/DDR_Banks/M1_A5" -AddNet "/DDR_Banks/M1_A6" -AddNet "/DDR_Banks/M1_BA0" -AddNet "/DDR_Banks/M1_BA1" +AddNet "/DDR_Banks/M1_A0" +AddNet "/DDR_Banks/M1_A12" +AddNet "/DDR_Banks/M1_A7" +AddNet "/DDR_Banks/M1_A9" AddNet "/DDR_Banks/M1_CAS#" -AddNet "/DDR_Banks/M1_CKE" +AddNet "/DDR_Banks/M1_CLK" AddNet "/DDR_Banks/M1_CLK#" AddNet "/DDR_Banks/M1_DQ0" -AddNet "/DDR_Banks/M1_DQ10" -AddNet "/DDR_Banks/M1_DQ11" -AddNet "/DDR_Banks/M1_DQ13" +AddNet "/DDR_Banks/M1_DQ1" +AddNet "/DDR_Banks/M1_DQ12" +AddNet "/DDR_Banks/M1_DQ14" AddNet "/DDR_Banks/M1_DQ15" -AddNet "/DDR_Banks/M1_DQ3" -AddNet "/DDR_Banks/M1_LDQS" +AddNet "/DDR_Banks/M1_DQ2" +AddNet "/DDR_Banks/M1_DQ7" +AddNet "/DDR_Banks/M1_RAS#" AddNet "/DDR_Banks/M1_UDM" +AddNet "/DDR_Banks/M1_UDQS" AddNet "/DDR_Banks/M1_WE#" AddNet "/Ethernet_Phy/ETH_A1.8V" AddNet "/Ethernet_Phy/ETH_A3.3V" -AddNet "/Ethernet_Phy/ETH_CLK" AddNet "/Ethernet_Phy/ETH_COL" -AddNet "/Ethernet_Phy/ETH_CRS" -AddNet "/Ethernet_Phy/ETH_INT" AddNet "/Ethernet_Phy/ETH_LED0" AddNet "/Ethernet_Phy/ETH_LED1" -AddNet "/Ethernet_Phy/ETH_MDC" AddNet "/Ethernet_Phy/ETH_PLL1.8V" -AddNet "/Ethernet_Phy/ETH_RXD0" +AddNet "/Ethernet_Phy/ETH_RXC" AddNet "/Ethernet_Phy/ETH_RXD1" -AddNet "/Ethernet_Phy/ETH_RXDV" -AddNet "/Ethernet_Phy/ETH_RXER" +AddNet "/Ethernet_Phy/ETH_RXD3" +AddNet "/Ethernet_Phy/ETH_TXC" AddNet "/Ethernet_Phy/ETH_TXD0" AddNet "/Ethernet_Phy/ETH_TXD1" AddNet "/Ethernet_Phy/ETH_TXD2" +AddNet "/Ethernet_Phy/ETH_TXD3" AddNet "/Ethernet_Phy/ETH_TXEN" AddNet "/Ethernet_Phy/ETH_TXER" +AddNet "/FPGA_Spartan6/ETH_CLK" +AddNet "/FPGA_Spartan6/ETH_CRS" +AddNet "/FPGA_Spartan6/ETH_INT" +AddNet "/FPGA_Spartan6/ETH_MDC" AddNet "/FPGA_Spartan6/ETH_MDIO" AddNet "/FPGA_Spartan6/ETH_RESET_N" -AddNet "/FPGA_Spartan6/ETH_RXC" +AddNet "/FPGA_Spartan6/ETH_RXD0" AddNet "/FPGA_Spartan6/ETH_RXD2" -AddNet "/FPGA_Spartan6/ETH_RXD3" -AddNet "/FPGA_Spartan6/ETH_TXC" -AddNet "/FPGA_Spartan6/ETH_TXD3" +AddNet "/FPGA_Spartan6/ETH_RXDV" +AddNet "/FPGA_Spartan6/ETH_RXER" +AddNet "/FPGA_Spartan6/M0_A0" AddNet "/FPGA_Spartan6/M0_A1" -AddNet "/FPGA_Spartan6/M0_A11" +AddNet "/FPGA_Spartan6/M0_A10" AddNet "/FPGA_Spartan6/M0_A12" AddNet "/FPGA_Spartan6/M0_A2" AddNet "/FPGA_Spartan6/M0_A3" AddNet "/FPGA_Spartan6/M0_A4" AddNet "/FPGA_Spartan6/M0_A6" AddNet "/FPGA_Spartan6/M0_A7" -AddNet "/FPGA_Spartan6/M0_A9" +AddNet "/FPGA_Spartan6/M0_A8" AddNet "/FPGA_Spartan6/M0_BA1" AddNet "/FPGA_Spartan6/M0_CAS#" -AddNet "/FPGA_Spartan6/M0_CKE" AddNet "/FPGA_Spartan6/M0_CLK" AddNet "/FPGA_Spartan6/M0_CLK#" -AddNet "/FPGA_Spartan6/M0_DQ0" AddNet "/FPGA_Spartan6/M0_DQ1" -AddNet "/FPGA_Spartan6/M0_DQ11" +AddNet "/FPGA_Spartan6/M0_DQ10" AddNet "/FPGA_Spartan6/M0_DQ12" AddNet "/FPGA_Spartan6/M0_DQ13" -AddNet "/FPGA_Spartan6/M0_DQ14" AddNet "/FPGA_Spartan6/M0_DQ15" AddNet "/FPGA_Spartan6/M0_DQ2" AddNet "/FPGA_Spartan6/M0_DQ3" AddNet "/FPGA_Spartan6/M0_DQ4" AddNet "/FPGA_Spartan6/M0_DQ5" -AddNet "/FPGA_Spartan6/M0_DQ7" -AddNet "/FPGA_Spartan6/M0_DQ8" -AddNet "/FPGA_Spartan6/M0_LDM" -AddNet "/FPGA_Spartan6/M0_RAS#" -AddNet "/FPGA_Spartan6/M0_UDQS" -AddNet "/FPGA_Spartan6/M1_A0" +AddNet "/FPGA_Spartan6/M0_DQ6" +AddNet "/FPGA_Spartan6/M0_LDQS" +AddNet "/FPGA_Spartan6/M1_A1" AddNet "/FPGA_Spartan6/M1_A10" -AddNet "/FPGA_Spartan6/M1_A12" +AddNet "/FPGA_Spartan6/M1_A11" +AddNet "/FPGA_Spartan6/M1_A2" AddNet "/FPGA_Spartan6/M1_A3" AddNet "/FPGA_Spartan6/M1_A4" -AddNet "/FPGA_Spartan6/M1_A7" +AddNet "/FPGA_Spartan6/M1_A5" +AddNet "/FPGA_Spartan6/M1_A6" AddNet "/FPGA_Spartan6/M1_A8" -AddNet "/FPGA_Spartan6/M1_A9" -AddNet "/FPGA_Spartan6/M1_CLK" -AddNet "/FPGA_Spartan6/M1_DQ1" -AddNet "/FPGA_Spartan6/M1_DQ12" -AddNet "/FPGA_Spartan6/M1_DQ14" -AddNet "/FPGA_Spartan6/M1_DQ2" +AddNet "/FPGA_Spartan6/M1_BA0" +AddNet "/FPGA_Spartan6/M1_BA1" +AddNet "/FPGA_Spartan6/M1_DQ10" +AddNet "/FPGA_Spartan6/M1_DQ11" +AddNet "/FPGA_Spartan6/M1_DQ13" +AddNet "/FPGA_Spartan6/M1_DQ3" AddNet "/FPGA_Spartan6/M1_DQ4" AddNet "/FPGA_Spartan6/M1_DQ5" AddNet "/FPGA_Spartan6/M1_DQ6" -AddNet "/FPGA_Spartan6/M1_DQ7" AddNet "/FPGA_Spartan6/M1_DQ8" AddNet "/FPGA_Spartan6/M1_DQ9" AddNet "/FPGA_Spartan6/M1_LDM" -AddNet "/FPGA_Spartan6/M1_RAS#" -AddNet "/FPGA_Spartan6/M1_UDQS" -AddNet "/FPGA_Spartan6/NF_ALE" +AddNet "/FPGA_Spartan6/M1_LDQS" AddNet "/FPGA_Spartan6/NF_CLE" AddNet "/FPGA_Spartan6/NF_D1" +AddNet "/FPGA_Spartan6/NF_D2" AddNet "/FPGA_Spartan6/NF_D5" -AddNet "/FPGA_Spartan6/NF_D7" -AddNet "/FPGA_Spartan6/NF_RNB" +AddNet "/FPGA_Spartan6/NF_D6" +AddNet "/FPGA_Spartan6/NF_RE_N" AddNet "/FPGA_Spartan6/NF_WE_N" AddNet "/FPGA_Spartan6/PROG_CCLK" AddNet "/FPGA_Spartan6/PROG_CSO" @@ -908,46 +947,57 @@ AddNet "/FPGA_Spartan6/R_M1_A3" AddNet "/FPGA_Spartan6/R_M1_BA0" AddNet "/FPGA_Spartan6/R_M1_BA1" AddNet "/FPGA_Spartan6/R_M1_CAS#" +AddNet "/FPGA_Spartan6/R_M1_DQ0" +AddNet "/FPGA_Spartan6/R_M1_DQ1" +AddNet "/FPGA_Spartan6/R_M1_DQ2" +AddNet "/FPGA_Spartan6/R_M1_DQ3" +AddNet "/FPGA_Spartan6/R_M1_DQ4" +AddNet "/FPGA_Spartan6/R_M1_DQ5" +AddNet "/FPGA_Spartan6/R_M1_DQ6" +AddNet "/FPGA_Spartan6/R_M1_DQ7" +AddNet "/FPGA_Spartan6/R_M1_LDM" +AddNet "/FPGA_Spartan6/R_M1_LDQS" AddNet "/FPGA_Spartan6/R_M1_RAS#" +AddNet "/FPGA_Spartan6/R_M1_WE#" AddNet "/FPGA_Spartan6/SD_CMD" +AddNet "/FPGA_Spartan6/SD_DAT0" AddNet "/FPGA_Spartan6/SD_DAT1" AddNet "/FPGA_Spartan6/SD_DAT3" -AddNet "/FPGA_Spartan6/USBA_OE_N" -AddNet "/FPGA_Spartan6/USBA_VP" +AddNet "/FPGA_Spartan6/USBA_SPD" +AddNet "/Non_volatile_memories/NF_ALE" AddNet "/Non_volatile_memories/NF_CS1_N" AddNet "/Non_volatile_memories/NF_D0" -AddNet "/Non_volatile_memories/NF_D2" AddNet "/Non_volatile_memories/NF_D3" AddNet "/Non_volatile_memories/NF_D4" -AddNet "/Non_volatile_memories/NF_D6" -AddNet "/Non_volatile_memories/NF_RE_N" +AddNet "/Non_volatile_memories/NF_D7" +AddNet "/Non_volatile_memories/NF_RNB" AddNet "/Non_volatile_memories/SD_CLK" -AddNet "/Non_volatile_memories/SD_DAT0" AddNet "/Non_volatile_memories/SD_DAT2" +AddNet "/USB/USBA_OE_N" AddNet "/USB/USBA_RCV" -AddNet "/USB/USBA_SPD" AddNet "/USB/USBA_VM" +AddNet "/USB/USBA_VP" AddNet "GND" AddNet "N-000057" AddNet "N-000058" -AddNet "N-000323" -AddNet "N-000325" -AddNet "N-000331" -AddNet "N-000332" -AddNet "N-000334" -AddNet "N-000335" AddNet "N-000337" -AddNet "N-000338" -AddNet "N-000344" -AddNet "N-000346" +AddNet "N-000342" +AddNet "N-000343" AddNet "N-000347" AddNet "N-000348" AddNet "N-000349" +AddNet "N-000350" AddNet "N-000351" -AddNet "N-000356" -AddNet "N-000357" +AddNet "N-000358" AddNet "N-000359" -AddNet "N-000361" +AddNet "N-000360" +AddNet "N-000362" +AddNet "N-000363" +AddNet "N-000368" +AddNet "N-000372" +AddNet "N-000373" +AddNet "N-000374" +AddNet "N-000375" AddNet "VCCO2" $EndNCLASS $MODULE 1206 @@ -974,7 +1024,7 @@ $PAD Sh "2" R 355 668 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 570 0 $EndPAD $EndMODULE 1206 @@ -999,7 +1049,7 @@ $PAD Sh "A1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -4133 -4133 $EndPAD $PAD @@ -1020,70 +1070,70 @@ $PAD Sh "A4" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 38 "/Ethernet_Phy/ETH_CLK" +Ne 56 "/FPGA_Spartan6/ETH_CLK" Po -2952 -4133 $EndPAD $PAD Sh "A5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 56 "/FPGA_Spartan6/ETH_RESET_N" +Ne 61 "/FPGA_Spartan6/ETH_RESET_N" Po -2558 -4133 $EndPAD $PAD Sh "A6" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 46 "/Ethernet_Phy/ETH_RXD0" +Ne 62 "/FPGA_Spartan6/ETH_RXD0" Po -2165 -4133 $EndPAD $PAD Sh "A7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 49 "/Ethernet_Phy/ETH_RXER" +Ne 65 "/FPGA_Spartan6/ETH_RXER" Po -1771 -4133 $EndPAD $PAD Sh "A8" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 53 "/Ethernet_Phy/ETH_TXEN" +Ne 54 "/Ethernet_Phy/ETH_TXEN" Po -1377 -4133 $EndPAD $PAD Sh "A9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 61 "/FPGA_Spartan6/ETH_TXD3" +Ne 53 "/Ethernet_Phy/ETH_TXD3" Po -983 -4133 $EndPAD $PAD Sh "A10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 41 "/Ethernet_Phy/ETH_INT" +Ne 58 "/FPGA_Spartan6/ETH_INT" Po -590 -4133 $EndPAD $PAD Sh "A11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 118 "/FPGA_Spartan6/NF_D7" +Ne 155 "/Non_volatile_memories/NF_D7" Po -196 -4133 $EndPAD $PAD Sh "A12" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 143 "/Non_volatile_memories/NF_D3" +Ne 153 "/Non_volatile_memories/NF_D3" Po 196 -4133 $EndPAD $PAD Sh "A13" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 116 "/FPGA_Spartan6/NF_D1" +Ne 114 "/FPGA_Spartan6/NF_D1" Po 590 -4133 $EndPAD $PAD @@ -1097,28 +1147,28 @@ $PAD Sh "A15" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 114 "/FPGA_Spartan6/NF_ALE" +Ne 150 "/Non_volatile_memories/NF_ALE" Po 1377 -4133 $EndPAD $PAD Sh "A16" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 119 "/FPGA_Spartan6/NF_RNB" +Ne 156 "/Non_volatile_memories/NF_RNB" Po 1771 -4133 $EndPAD $PAD Sh "A17" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 149 "/Non_volatile_memories/SD_DAT2" +Ne 158 "/Non_volatile_memories/SD_DAT2" Po 2165 -4133 $EndPAD $PAD Sh "A18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 148 "/Non_volatile_memories/SD_DAT0" +Ne 146 "/FPGA_Spartan6/SD_DAT0" Po 2558 -4133 $EndPAD $PAD @@ -1146,7 +1196,7 @@ $PAD Sh "A22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 4133 -4133 $EndPAD $PAD @@ -1181,7 +1231,7 @@ $PAD Sh "B5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -2558 -3739 $EndPAD $PAD @@ -1202,21 +1252,21 @@ $PAD Sh "B8" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 54 "/Ethernet_Phy/ETH_TXER" +Ne 55 "/Ethernet_Phy/ETH_TXER" Po -1377 -3739 $EndPAD $PAD Sh "B9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -983 -3739 $EndPAD $PAD Sh "B10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 39 "/Ethernet_Phy/ETH_COL" +Ne 42 "/Ethernet_Phy/ETH_COL" Po -590 -3739 $EndPAD $PAD @@ -1230,14 +1280,14 @@ $PAD Sh "B12" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 144 "/Non_volatile_memories/NF_D4" +Ne 154 "/Non_volatile_memories/NF_D4" Po 196 -3739 $EndPAD $PAD Sh "B13" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 590 -3739 $EndPAD $PAD @@ -1258,21 +1308,21 @@ $PAD Sh "B16" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 146 "/Non_volatile_memories/NF_RE_N" +Ne 118 "/FPGA_Spartan6/NF_RE_N" Po 1771 -3739 $EndPAD $PAD Sh "B17" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 2165 -3739 $EndPAD $PAD Sh "B18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 136 "/FPGA_Spartan6/SD_DAT1" +Ne 147 "/FPGA_Spartan6/SD_DAT1" Po 2558 -3739 $EndPAD $PAD @@ -1307,7 +1357,7 @@ $PAD Sh "C1" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 63 "/FPGA_Spartan6/M0_A11" +Ne 6 "/DDR_Banks/M0_A11" Po -4133 -3346 $EndPAD $PAD @@ -1335,21 +1385,21 @@ $PAD Sh "C5" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 55 "/FPGA_Spartan6/ETH_MDIO" +Ne 60 "/FPGA_Spartan6/ETH_MDIO" Po -2558 -3346 $EndPAD $PAD Sh "C6" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 58 "/FPGA_Spartan6/ETH_RXD2" +Ne 63 "/FPGA_Spartan6/ETH_RXD2" Po -2165 -3346 $EndPAD $PAD Sh "C7" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 48 "/Ethernet_Phy/ETH_RXDV" +Ne 64 "/FPGA_Spartan6/ETH_RXDV" Po -1771 -3346 $EndPAD $PAD @@ -1370,7 +1420,7 @@ $PAD Sh "C10" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 40 "/Ethernet_Phy/ETH_CRS" +Ne 57 "/FPGA_Spartan6/ETH_CRS" Po -590 -3346 $EndPAD $PAD @@ -1384,14 +1434,14 @@ $PAD Sh "C12" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 117 "/FPGA_Spartan6/NF_D5" +Ne 116 "/FPGA_Spartan6/NF_D5" Po 196 -3346 $EndPAD $PAD Sh "C13" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 142 "/Non_volatile_memories/NF_D2" +Ne 115 "/FPGA_Spartan6/NF_D2" Po 590 -3346 $EndPAD $PAD @@ -1405,21 +1455,21 @@ $PAD Sh "C15" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 120 "/FPGA_Spartan6/NF_WE_N" +Ne 119 "/FPGA_Spartan6/NF_WE_N" Po 1377 -3346 $EndPAD $PAD Sh "C16" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 140 "/Non_volatile_memories/NF_CS1_N" +Ne 151 "/Non_volatile_memories/NF_CS1_N" Po 1771 -3346 $EndPAD $PAD Sh "C17" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 137 "/FPGA_Spartan6/SD_DAT3" +Ne 148 "/FPGA_Spartan6/SD_DAT3" Po 2165 -3346 $EndPAD $PAD @@ -1440,7 +1490,7 @@ $PAD Sh "C20" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 98 "/FPGA_Spartan6/M1_A8" +Ne 99 "/FPGA_Spartan6/M1_A8" Po 3346 -3346 $EndPAD $PAD @@ -1454,21 +1504,21 @@ $PAD Sh "C22" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 99 "/FPGA_Spartan6/M1_A9" +Ne 25 "/DDR_Banks/M1_A9" Po 4133 -3346 $EndPAD $PAD Sh "D1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 64 "/FPGA_Spartan6/M0_A12" +Ne 69 "/FPGA_Spartan6/M0_A12" Po -4133 -2952 $EndPAD $PAD Sh "D2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 73 "/FPGA_Spartan6/M0_CKE" +Ne 10 "/DDR_Banks/M0_CKE" Po -3739 -2952 $EndPAD $PAD @@ -1482,7 +1532,7 @@ $PAD Sh "D4" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -2952 -2952 $EndPAD $PAD @@ -1496,21 +1546,21 @@ $PAD Sh "D6" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 59 "/FPGA_Spartan6/ETH_RXD3" +Ne 48 "/Ethernet_Phy/ETH_RXD3" Po -2165 -2952 $EndPAD $PAD Sh "D7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 60 "/FPGA_Spartan6/ETH_TXC" +Ne 49 "/Ethernet_Phy/ETH_TXC" Po -1771 -2952 $EndPAD $PAD Sh "D8" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 57 "/FPGA_Spartan6/ETH_RXC" +Ne 46 "/Ethernet_Phy/ETH_RXC" Po -1377 -2952 $EndPAD $PAD @@ -1524,14 +1574,14 @@ $PAD Sh "D10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 44 "/Ethernet_Phy/ETH_MDC" +Ne 59 "/FPGA_Spartan6/ETH_MDC" Po -590 -2952 $EndPAD $PAD Sh "D11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 145 "/Non_volatile_memories/NF_D6" +Ne 117 "/FPGA_Spartan6/NF_D6" Po -196 -2952 $EndPAD $PAD @@ -1552,14 +1602,14 @@ $PAD Sh "D14" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 141 "/Non_volatile_memories/NF_D0" +Ne 152 "/Non_volatile_memories/NF_D0" Po 983 -2952 $EndPAD $PAD Sh "D15" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 115 "/FPGA_Spartan6/NF_CLE" +Ne 113 "/FPGA_Spartan6/NF_CLE" Po 1377 -2952 $EndPAD $PAD @@ -1573,14 +1623,14 @@ $PAD Sh "D17" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 135 "/FPGA_Spartan6/SD_CMD" +Ne 145 "/FPGA_Spartan6/SD_CMD" Po 2165 -2952 $EndPAD $PAD Sh "D18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 2558 -2952 $EndPAD $PAD @@ -1601,35 +1651,35 @@ $PAD Sh "D21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 25 "/DDR_Banks/M1_CKE" +Ne 0 "" Po 3739 -2952 $EndPAD $PAD Sh "D22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 94 "/FPGA_Spartan6/M1_A12" +Ne 23 "/DDR_Banks/M1_A12" Po 4133 -2952 $EndPAD $PAD Sh "E1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 70 "/FPGA_Spartan6/M0_A9" +Ne 8 "/DDR_Banks/M0_A9" Po -4133 -2558 $EndPAD $PAD Sh "E2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -3739 -2558 $EndPAD $PAD Sh "E3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 9 "/DDR_Banks/M0_A8" +Ne 75 "/FPGA_Spartan6/M0_A8" Po -3346 -2558 $EndPAD $PAD @@ -1657,7 +1707,7 @@ $PAD Sh "E7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -1771 -2558 $EndPAD $PAD @@ -1685,7 +1735,7 @@ $PAD Sh "E11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -196 -2558 $EndPAD $PAD @@ -1713,14 +1763,14 @@ $PAD Sh "E15" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 1377 -2558 $EndPAD $PAD Sh "E16" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 147 "/Non_volatile_memories/SD_CLK" +Ne 157 "/Non_volatile_memories/SD_CLK" Po 1771 -2558 $EndPAD $PAD @@ -1748,21 +1798,21 @@ $PAD Sh "E20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 97 "/FPGA_Spartan6/M1_A7" +Ne 24 "/DDR_Banks/M1_A7" Po 3346 -2558 $EndPAD $PAD Sh "E21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 3739 -2558 $EndPAD $PAD Sh "E22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 129 "/FPGA_Spartan6/R_M1_A2" +Ne 128 "/FPGA_Spartan6/R_M1_A2" Po 4133 -2558 $EndPAD $PAD @@ -1776,14 +1826,14 @@ $PAD Sh "F2" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 16 "/DDR_Banks/M0_WE#" +Ne 21 "/DDR_Banks/M0_WE#" Po -3739 -2165 $EndPAD $PAD Sh "F3" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 67 "/FPGA_Spartan6/M0_A4" +Ne 72 "/FPGA_Spartan6/M0_A4" Po -3346 -2165 $EndPAD $PAD @@ -1895,7 +1945,7 @@ $PAD Sh "F19" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 18 "/DDR_Banks/M1_A11" +Ne 93 "/FPGA_Spartan6/M1_A11" Po 2952 -2165 $EndPAD $PAD @@ -1909,21 +1959,21 @@ $PAD Sh "F21" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 127 "/FPGA_Spartan6/R_M1_A0" +Ne 126 "/FPGA_Spartan6/R_M1_A0" Po 3739 -2165 $EndPAD $PAD Sh "F22" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 128 "/FPGA_Spartan6/R_M1_A1" +Ne 127 "/FPGA_Spartan6/R_M1_A1" Po 4133 -2165 $EndPAD $PAD Sh "G1" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 71 "/FPGA_Spartan6/M0_BA1" +Ne 76 "/FPGA_Spartan6/M0_BA1" Po -4133 -1771 $EndPAD $PAD @@ -1937,21 +1987,21 @@ $PAD Sh "G3" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 10 "/DDR_Banks/M0_BA0" +Ne 9 "/DDR_Banks/M0_BA0" Po -3346 -1771 $EndPAD $PAD Sh "G4" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 7 "/DDR_Banks/M0_A10" +Ne 68 "/FPGA_Spartan6/M0_A10" Po -2952 -1771 $EndPAD $PAD Sh "G5" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -2558 -1771 $EndPAD $PAD @@ -2042,21 +2092,21 @@ $PAD Sh "G18" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 2558 -1771 $EndPAD $PAD Sh "G19" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 93 "/FPGA_Spartan6/M1_A10" +Ne 92 "/FPGA_Spartan6/M1_A10" Po 2952 -1771 $EndPAD $PAD Sh "G20" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 130 "/FPGA_Spartan6/R_M1_A3" +Ne 129 "/FPGA_Spartan6/R_M1_A3" Po 3346 -1771 $EndPAD $PAD @@ -2077,49 +2127,49 @@ $PAD Sh "H1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 62 "/FPGA_Spartan6/M0_A1" +Ne 67 "/FPGA_Spartan6/M0_A1" Po -4133 -1377 $EndPAD $PAD Sh "H2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 6 "/DDR_Banks/M0_A0" +Ne 66 "/FPGA_Spartan6/M0_A0" Po -3739 -1377 $EndPAD $PAD Sh "H3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 75 "/FPGA_Spartan6/M0_CLK#" +Ne 79 "/FPGA_Spartan6/M0_CLK#" Po -3346 -1377 $EndPAD $PAD Sh "H4" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 74 "/FPGA_Spartan6/M0_CLK" +Ne 78 "/FPGA_Spartan6/M0_CLK" Po -2952 -1377 $EndPAD $PAD Sh "H5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 65 "/FPGA_Spartan6/M0_A2" +Ne 70 "/FPGA_Spartan6/M0_A2" Po -2558 -1377 $EndPAD $PAD Sh "H6" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 69 "/FPGA_Spartan6/M0_A7" +Ne 74 "/FPGA_Spartan6/M0_A7" Po -2165 -1377 $EndPAD $PAD Sh "H7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -1771 -1377 $EndPAD $PAD @@ -2203,56 +2253,56 @@ $PAD Sh "H19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 35 "/DDR_Banks/M1_WE#" +Ne 144 "/FPGA_Spartan6/R_M1_WE#" Po 2952 -1377 $EndPAD $PAD Sh "H20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 100 "/FPGA_Spartan6/M1_CLK" +Ne 27 "/DDR_Banks/M1_CLK" Po 3346 -1377 $EndPAD $PAD Sh "H21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 134 "/FPGA_Spartan6/R_M1_RAS#" +Ne 143 "/FPGA_Spartan6/R_M1_RAS#" Po 3739 -1377 $EndPAD $PAD Sh "H22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 133 "/FPGA_Spartan6/R_M1_CAS#" +Ne 132 "/FPGA_Spartan6/R_M1_CAS#" Po 4133 -1377 $EndPAD $PAD Sh "J1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 86 "/FPGA_Spartan6/M0_DQ5" +Ne 88 "/FPGA_Spartan6/M0_DQ5" Po -4133 -983 $EndPAD $PAD Sh "J2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -3739 -983 $EndPAD $PAD Sh "J3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 85 "/FPGA_Spartan6/M0_DQ4" +Ne 87 "/FPGA_Spartan6/M0_DQ4" Po -3346 -983 $EndPAD $PAD Sh "J4" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 68 "/FPGA_Spartan6/M0_A6" +Ne 73 "/FPGA_Spartan6/M0_A6" Po -2952 -983 $EndPAD $PAD @@ -2287,7 +2337,7 @@ $PAD Sh "J9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -983 -983 $EndPAD $PAD @@ -2301,7 +2351,7 @@ $PAD Sh "J11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -196 -983 $EndPAD $PAD @@ -2315,7 +2365,7 @@ $PAD Sh "J13" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 590 -983 $EndPAD $PAD @@ -2329,7 +2379,7 @@ $PAD Sh "J15" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 1377 -983 $EndPAD $PAD @@ -2343,7 +2393,7 @@ $PAD Sh "J17" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 131 "/FPGA_Spartan6/R_M1_BA0" +Ne 130 "/FPGA_Spartan6/R_M1_BA0" Po 2165 -983 $EndPAD $PAD @@ -2357,70 +2407,70 @@ $PAD Sh "J19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 26 "/DDR_Banks/M1_CLK#" +Ne 28 "/DDR_Banks/M1_CLK#" Po 2952 -983 $EndPAD $PAD Sh "J20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 105 "/FPGA_Spartan6/M1_DQ4" +Ne 137 "/FPGA_Spartan6/R_M1_DQ4" Po 3346 -983 $EndPAD $PAD Sh "J21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 3739 -983 $EndPAD $PAD Sh "J22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 106 "/FPGA_Spartan6/M1_DQ5" +Ne 138 "/FPGA_Spartan6/R_M1_DQ5" Po 4133 -983 $EndPAD $PAD Sh "K1" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 87 "/FPGA_Spartan6/M0_DQ7" +Ne 14 "/DDR_Banks/M0_DQ7" Po -4133 -590 $EndPAD $PAD Sh "K2" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 12 "/DDR_Banks/M0_DQ6" +Ne 89 "/FPGA_Spartan6/M0_DQ6" Po -3739 -590 $EndPAD $PAD Sh "K3" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 8 "/DDR_Banks/M0_A5" +Ne 7 "/DDR_Banks/M0_A5" Po -3346 -590 $EndPAD $PAD Sh "K4" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 72 "/FPGA_Spartan6/M0_CAS#" +Ne 77 "/FPGA_Spartan6/M0_CAS#" Po -2952 -590 $EndPAD $PAD Sh "K5" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 90 "/FPGA_Spartan6/M0_RAS#" +Ne 18 "/DDR_Banks/M0_RAS#" Po -2558 -590 $EndPAD $PAD Sh "K6" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 66 "/FPGA_Spartan6/M0_A3" +Ne 71 "/FPGA_Spartan6/M0_A3" Po -2165 -590 $EndPAD $PAD @@ -2448,7 +2498,7 @@ $PAD Sh "K10" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -590 -590 $EndPAD $PAD @@ -2462,7 +2512,7 @@ $PAD Sh "K12" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 196 -590 $EndPAD $PAD @@ -2476,7 +2526,7 @@ $PAD Sh "K14" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 983 -590 $EndPAD $PAD @@ -2497,7 +2547,7 @@ $PAD Sh "K17" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 132 "/FPGA_Spartan6/R_M1_BA1" +Ne 131 "/FPGA_Spartan6/R_M1_BA1" Po 2165 -590 $EndPAD $PAD @@ -2511,28 +2561,28 @@ $PAD Sh "K19" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 21 "/DDR_Banks/M1_A6" +Ne 98 "/FPGA_Spartan6/M1_A6" Po 2952 -590 $EndPAD $PAD Sh "K20" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 20 "/DDR_Banks/M1_A5" +Ne 97 "/FPGA_Spartan6/M1_A5" Po 3346 -590 $EndPAD $PAD Sh "K21" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 107 "/FPGA_Spartan6/M1_DQ6" +Ne 139 "/FPGA_Spartan6/R_M1_DQ6" Po 3739 -590 $EndPAD $PAD Sh "K22" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 108 "/FPGA_Spartan6/M1_DQ7" +Ne 140 "/FPGA_Spartan6/R_M1_DQ7" Po 4133 -590 $EndPAD $PAD @@ -2553,21 +2603,21 @@ $PAD Sh "L3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 14 "/DDR_Banks/M0_LDQS" +Ne 90 "/FPGA_Spartan6/M0_LDQS" Po -3346 -196 $EndPAD $PAD Sh "L4" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 89 "/FPGA_Spartan6/M0_LDM" +Ne 17 "/DDR_Banks/M0_LDM" Po -2952 -196 $EndPAD $PAD Sh "L5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -2558 -196 $EndPAD $PAD @@ -2595,7 +2645,7 @@ $PAD Sh "L9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -983 -196 $EndPAD $PAD @@ -2609,7 +2659,7 @@ $PAD Sh "L11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -196 -196 $EndPAD $PAD @@ -2623,7 +2673,7 @@ $PAD Sh "L13" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 590 -196 $EndPAD $PAD @@ -2658,21 +2708,21 @@ $PAD Sh "L18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 2558 -196 $EndPAD $PAD Sh "L19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 111 "/FPGA_Spartan6/M1_LDM" +Ne 141 "/FPGA_Spartan6/R_M1_LDM" Po 2952 -196 $EndPAD $PAD Sh "L20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 33 "/DDR_Banks/M1_LDQS" +Ne 142 "/FPGA_Spartan6/R_M1_LDQS" Po 3346 -196 $EndPAD $PAD @@ -2693,21 +2743,21 @@ $PAD Sh "M1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 84 "/FPGA_Spartan6/M0_DQ3" +Ne 86 "/FPGA_Spartan6/M0_DQ3" Po -4133 196 $EndPAD $PAD Sh "M2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 83 "/FPGA_Spartan6/M0_DQ2" +Ne 85 "/FPGA_Spartan6/M0_DQ2" Po -3739 196 $EndPAD $PAD Sh "M3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 15 "/DDR_Banks/M0_UDM" +Ne 19 "/DDR_Banks/M0_UDM" Po -3346 196 $EndPAD $PAD @@ -2756,7 +2806,7 @@ $PAD Sh "M10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -590 196 $EndPAD $PAD @@ -2770,7 +2820,7 @@ $PAD Sh "M12" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 196 196 $EndPAD $PAD @@ -2784,7 +2834,7 @@ $PAD Sh "M14" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 983 196 $EndPAD $PAD @@ -2812,7 +2862,7 @@ $PAD Sh "M18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 152 "/USB/USBA_VM" +Ne 161 "/USB/USBA_VM" Po 2558 196 $EndPAD $PAD @@ -2826,42 +2876,42 @@ $PAD Sh "M20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 34 "/DDR_Banks/M1_UDM" +Ne 37 "/DDR_Banks/M1_UDM" Po 3346 196 $EndPAD $PAD Sh "M21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 104 "/FPGA_Spartan6/M1_DQ2" +Ne 135 "/FPGA_Spartan6/R_M1_DQ2" Po 3739 196 $EndPAD $PAD Sh "M22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 32 "/DDR_Banks/M1_DQ3" +Ne 136 "/FPGA_Spartan6/R_M1_DQ3" Po 4133 196 $EndPAD $PAD Sh "N1" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 77 "/FPGA_Spartan6/M0_DQ1" +Ne 80 "/FPGA_Spartan6/M0_DQ1" Po -4133 590 $EndPAD $PAD Sh "N2" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -3739 590 $EndPAD $PAD Sh "N3" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 76 "/FPGA_Spartan6/M0_DQ0" +Ne 11 "/DDR_Banks/M0_DQ0" Po -3346 590 $EndPAD $PAD @@ -2903,7 +2953,7 @@ $PAD Sh "N9" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -983 590 $EndPAD $PAD @@ -2917,7 +2967,7 @@ $PAD Sh "N11" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -196 590 $EndPAD $PAD @@ -2931,7 +2981,7 @@ $PAD Sh "N13" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 590 590 $EndPAD $PAD @@ -2952,14 +3002,14 @@ $PAD Sh "N16" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 150 "/USB/USBA_RCV" +Ne 160 "/USB/USBA_RCV" Po 1771 590 $EndPAD $PAD Sh "N17" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 2165 590 $EndPAD $PAD @@ -2980,35 +3030,35 @@ $PAD Sh "N20" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 27 "/DDR_Banks/M1_DQ0" +Ne 133 "/FPGA_Spartan6/R_M1_DQ0" Po 3346 590 $EndPAD $PAD Sh "N21" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 3739 590 $EndPAD $PAD Sh "N22" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 101 "/FPGA_Spartan6/M1_DQ1" +Ne 134 "/FPGA_Spartan6/R_M1_DQ1" Po 4133 590 $EndPAD $PAD Sh "P1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 13 "/DDR_Banks/M0_DQ9" +Ne 16 "/DDR_Banks/M0_DQ9" Po -4133 983 $EndPAD $PAD Sh "P2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 88 "/FPGA_Spartan6/M0_DQ8" +Ne 15 "/DDR_Banks/M0_DQ8" Po -3739 983 $EndPAD $PAD @@ -3064,7 +3114,7 @@ $PAD Sh "P10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -590 983 $EndPAD $PAD @@ -3078,7 +3128,7 @@ $PAD Sh "P12" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 196 983 $EndPAD $PAD @@ -3092,7 +3142,7 @@ $PAD Sh "P14" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 983 983 $EndPAD $PAD @@ -3113,14 +3163,14 @@ $PAD Sh "P17" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 139 "/FPGA_Spartan6/USBA_VP" +Ne 162 "/USB/USBA_VP" Po 2165 983 $EndPAD $PAD Sh "P18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 138 "/FPGA_Spartan6/USBA_OE_N" +Ne 159 "/USB/USBA_OE_N" Po 2558 983 $EndPAD $PAD @@ -3155,7 +3205,7 @@ $PAD Sh "R1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 78 "/FPGA_Spartan6/M0_DQ11" +Ne 12 "/DDR_Banks/M0_DQ11" Po -4133 1377 $EndPAD $PAD @@ -3169,7 +3219,7 @@ $PAD Sh "R3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 11 "/DDR_Banks/M0_DQ10" +Ne 81 "/FPGA_Spartan6/M0_DQ10" Po -3346 1377 $EndPAD $PAD @@ -3183,7 +3233,7 @@ $PAD Sh "R5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -2558 1377 $EndPAD $PAD @@ -3274,21 +3324,21 @@ $PAD Sh "R18" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 2558 1377 $EndPAD $PAD Sh "R19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 151 "/USB/USBA_SPD" +Ne 149 "/FPGA_Spartan6/USBA_SPD" Po 2952 1377 $EndPAD $PAD Sh "R20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 28 "/DDR_Banks/M1_DQ10" +Ne 102 "/FPGA_Spartan6/M1_DQ10" Po 3346 1377 $EndPAD $PAD @@ -3302,7 +3352,7 @@ $PAD Sh "R22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 29 "/DDR_Banks/M1_DQ11" +Ne 103 "/FPGA_Spartan6/M1_DQ11" Po 4133 1377 $EndPAD $PAD @@ -3316,7 +3366,7 @@ $PAD Sh "T2" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 91 "/FPGA_Spartan6/M0_UDQS" +Ne 20 "/DDR_Banks/M0_UDQS" Po -3739 1771 $EndPAD $PAD @@ -3337,7 +3387,7 @@ $PAD Sh "T5" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 122 "/FPGA_Spartan6/PROG_CSO" +Ne 121 "/FPGA_Spartan6/PROG_CSO" Po -2558 1771 $EndPAD $PAD @@ -3365,7 +3415,7 @@ $PAD Sh "T9" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po -983 1771 $EndPAD $PAD @@ -3393,7 +3443,7 @@ $PAD Sh "T13" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po 590 1771 $EndPAD $PAD @@ -3449,7 +3499,7 @@ $PAD Sh "T21" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 113 "/FPGA_Spartan6/M1_UDQS" +Ne 38 "/DDR_Banks/M1_UDQS" Po 3739 1771 $EndPAD $PAD @@ -3463,21 +3513,21 @@ $PAD Sh "U1" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 80 "/FPGA_Spartan6/M0_DQ13" +Ne 83 "/FPGA_Spartan6/M0_DQ13" Po -4133 2165 $EndPAD $PAD Sh "U2" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -3739 2165 $EndPAD $PAD Sh "U3" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 79 "/FPGA_Spartan6/M0_DQ12" +Ne 82 "/FPGA_Spartan6/M0_DQ12" Po -3346 2165 $EndPAD $PAD @@ -3505,7 +3555,7 @@ $PAD Sh "U7" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -1771 2165 $EndPAD $PAD @@ -3547,14 +3597,14 @@ $PAD Sh "U13" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 126 "/FPGA_Spartan6/PROG_MISO3" +Ne 125 "/FPGA_Spartan6/PROG_MISO3" Po 590 2165 $EndPAD $PAD Sh "U14" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 125 "/FPGA_Spartan6/PROG_MISO2" +Ne 124 "/FPGA_Spartan6/PROG_MISO2" Po 983 2165 $EndPAD $PAD @@ -3596,35 +3646,35 @@ $PAD Sh "U20" O 158 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 102 "/FPGA_Spartan6/M1_DQ12" +Ne 31 "/DDR_Banks/M1_DQ12" Po 3346 2165 $EndPAD $PAD Sh "U21" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 3739 2165 $EndPAD $PAD Sh "U22" O 157 158 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 30 "/DDR_Banks/M1_DQ13" +Ne 104 "/FPGA_Spartan6/M1_DQ13" Po 4133 2165 $EndPAD $PAD Sh "V1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 82 "/FPGA_Spartan6/M0_DQ15" +Ne 84 "/FPGA_Spartan6/M0_DQ15" Po -4133 2558 $EndPAD $PAD Sh "V2" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 81 "/FPGA_Spartan6/M0_DQ14" +Ne 13 "/DDR_Banks/M0_DQ14" Po -3739 2558 $EndPAD $PAD @@ -3638,7 +3688,7 @@ $PAD Sh "V4" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -2952 2558 $EndPAD $PAD @@ -3666,7 +3716,7 @@ $PAD Sh "V8" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po -1377 2558 $EndPAD $PAD @@ -3680,7 +3730,7 @@ $PAD Sh "V10" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -590 2558 $EndPAD $PAD @@ -3694,7 +3744,7 @@ $PAD Sh "V12" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po 196 2558 $EndPAD $PAD @@ -3708,7 +3758,7 @@ $PAD Sh "V14" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 983 2558 $EndPAD $PAD @@ -3722,7 +3772,7 @@ $PAD Sh "V16" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po 1771 2558 $EndPAD $PAD @@ -3757,14 +3807,14 @@ $PAD Sh "V21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 103 "/FPGA_Spartan6/M1_DQ14" +Ne 32 "/DDR_Banks/M1_DQ14" Po 3739 2558 $EndPAD $PAD Sh "V22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 31 "/DDR_Banks/M1_DQ15" +Ne 33 "/DDR_Banks/M1_DQ15" Po 4133 2558 $EndPAD $PAD @@ -3799,7 +3849,7 @@ $PAD Sh "W5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po -2558 2952 $EndPAD $PAD @@ -3813,7 +3863,7 @@ $PAD Sh "W7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -1771 2952 $EndPAD $PAD @@ -3876,7 +3926,7 @@ $PAD Sh "W16" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 1771 2952 $EndPAD $PAD @@ -3897,7 +3947,7 @@ $PAD Sh "W19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 2952 2952 $EndPAD $PAD @@ -4093,7 +4143,7 @@ $PAD Sh "AA3" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po -3346 3739 $EndPAD $PAD @@ -4107,7 +4157,7 @@ $PAD Sh "AA5" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -2558 3739 $EndPAD $PAD @@ -4121,7 +4171,7 @@ $PAD Sh "AA7" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po -1771 3739 $EndPAD $PAD @@ -4135,7 +4185,7 @@ $PAD Sh "AA9" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -983 3739 $EndPAD $PAD @@ -4149,7 +4199,7 @@ $PAD Sh "AA11" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po -196 3739 $EndPAD $PAD @@ -4163,7 +4213,7 @@ $PAD Sh "AA13" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 590 3739 $EndPAD $PAD @@ -4177,7 +4227,7 @@ $PAD Sh "AA15" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po 1377 3739 $EndPAD $PAD @@ -4191,7 +4241,7 @@ $PAD Sh "AA17" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 2165 3739 $EndPAD $PAD @@ -4205,21 +4255,21 @@ $PAD Sh "AA19" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po 2952 3739 $EndPAD $PAD Sh "AA20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 124 "/FPGA_Spartan6/PROG_MISO1" +Ne 123 "/FPGA_Spartan6/PROG_MISO1" Po 3346 3739 $EndPAD $PAD Sh "AA21" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 121 "/FPGA_Spartan6/PROG_CCLK" +Ne 120 "/FPGA_Spartan6/PROG_CCLK" Po 3739 3739 $EndPAD $PAD @@ -4233,7 +4283,7 @@ $PAD Sh "AB1" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -4133 4133 $EndPAD $PAD @@ -4366,7 +4416,7 @@ $PAD Sh "AB20" O 158 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 123 "/FPGA_Spartan6/PROG_MISO0" +Ne 122 "/FPGA_Spartan6/PROG_MISO0" Po 3346 4133 $EndPAD $PAD @@ -4380,7 +4430,7 @@ $PAD Sh "AB22" O 157 157 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 4133 4133 $EndPAD $EndMODULE FGG484bga-p10 @@ -4402,35 +4452,35 @@ $PAD Sh "12" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -1613 1082 $EndPAD $PAD Sh "11" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 49 "/Ethernet_Phy/ETH_RXER" +Ne 65 "/FPGA_Spartan6/ETH_RXER" Po -1613 885 $EndPAD $PAD Sh "10" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 57 "/FPGA_Spartan6/ETH_RXC" +Ne 46 "/Ethernet_Phy/ETH_RXC" Po -1613 688 $EndPAD $PAD Sh "9" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 48 "/Ethernet_Phy/ETH_RXDV" +Ne 64 "/FPGA_Spartan6/ETH_RXDV" Po -1613 491 $EndPAD $PAD Sh "8" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -1613 295 $EndPAD $PAD @@ -4444,7 +4494,7 @@ $PAD Sh "6" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 46 "/Ethernet_Phy/ETH_RXD0" +Ne 62 "/FPGA_Spartan6/ETH_RXD0" Po -1613 -98 $EndPAD $PAD @@ -4458,35 +4508,35 @@ $PAD Sh "4" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 58 "/FPGA_Spartan6/ETH_RXD2" +Ne 63 "/FPGA_Spartan6/ETH_RXD2" Po -1613 -491 $EndPAD $PAD Sh "3" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 59 "/FPGA_Spartan6/ETH_RXD3" +Ne 48 "/Ethernet_Phy/ETH_RXD3" Po -1613 -688 $EndPAD $PAD Sh "2" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 44 "/Ethernet_Phy/ETH_MDC" +Ne 59 "/FPGA_Spartan6/ETH_MDC" Po -1613 -885 $EndPAD $PAD Sh "1" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 55 "/FPGA_Spartan6/ETH_MDIO" +Ne 60 "/FPGA_Spartan6/ETH_MDIO" Po -1613 -1082 $EndPAD $PAD Sh "48" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 56 "/FPGA_Spartan6/ETH_RESET_N" +Ne 61 "/FPGA_Spartan6/ETH_RESET_N" Po -1082 -1613 $EndPAD $PAD @@ -4500,7 +4550,7 @@ $PAD Sh "46" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 38 "/Ethernet_Phy/ETH_CLK" +Ne 56 "/FPGA_Spartan6/ETH_CLK" Po -688 -1613 $EndPAD $PAD @@ -4514,7 +4564,7 @@ $PAD Sh "44" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -295 -1613 $EndPAD $PAD @@ -4535,56 +4585,56 @@ $PAD Sh "41" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 161 "N-000335" +Ne 173 "N-000351" Po 295 -1613 $EndPAD $PAD Sh "40" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 156 "N-000323" +Ne 167 "N-000342" Po 491 -1613 $EndPAD $PAD Sh "39" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 688 -1613 $EndPAD $PAD Sh "38" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 37 "/Ethernet_Phy/ETH_A3.3V" +Ne 41 "/Ethernet_Phy/ETH_A3.3V" Po 885 -1613 $EndPAD $PAD Sh "37" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 158 "N-000331" +Ne 168 "N-000343" Po 1082 -1613 $EndPAD $PAD Sh "25" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 41 "/Ethernet_Phy/ETH_INT" +Ne 58 "/FPGA_Spartan6/ETH_INT" Po 1613 1082 $EndPAD $PAD Sh "26" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 42 "/Ethernet_Phy/ETH_LED0" +Ne 43 "/Ethernet_Phy/ETH_LED0" Po 1613 885 $EndPAD $PAD Sh "27" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 43 "/Ethernet_Phy/ETH_LED1" +Ne 44 "/Ethernet_Phy/ETH_LED1" Po 1613 688 $EndPAD $PAD @@ -4612,21 +4662,21 @@ $PAD Sh "31" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 36 "/Ethernet_Phy/ETH_A1.8V" +Ne 40 "/Ethernet_Phy/ETH_A1.8V" Po 1613 -98 $EndPAD $PAD Sh "32" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 163 "N-000338" +Ne 170 "N-000348" Po 1613 -295 $EndPAD $PAD Sh "33" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 160 "N-000334" +Ne 172 "N-000350" Po 1613 -491 $EndPAD $PAD @@ -4640,14 +4690,14 @@ $PAD Sh "35" R 315 99 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 1613 -885 $EndPAD $PAD Sh "36" R 315 98 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 1613 -1082 $EndPAD $PAD @@ -4661,21 +4711,21 @@ $PAD Sh "14" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 54 "/Ethernet_Phy/ETH_TXER" +Ne 55 "/Ethernet_Phy/ETH_TXER" Po -885 1613 $EndPAD $PAD Sh "15" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 60 "/FPGA_Spartan6/ETH_TXC" +Ne 49 "/Ethernet_Phy/ETH_TXC" Po -688 1613 $EndPAD $PAD Sh "16" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 53 "/Ethernet_Phy/ETH_TXEN" +Ne 54 "/Ethernet_Phy/ETH_TXEN" Po -491 1613 $EndPAD $PAD @@ -4703,28 +4753,28 @@ $PAD Sh "20" R 98 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 61 "/FPGA_Spartan6/ETH_TXD3" +Ne 53 "/Ethernet_Phy/ETH_TXD3" Po 295 1613 $EndPAD $PAD Sh "21" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 39 "/Ethernet_Phy/ETH_COL" +Ne 42 "/Ethernet_Phy/ETH_COL" Po 491 1613 $EndPAD $PAD Sh "22" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 40 "/Ethernet_Phy/ETH_CRS" +Ne 57 "/FPGA_Spartan6/ETH_CRS" Po 688 1613 $EndPAD $PAD Sh "23" R 99 315 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 885 1613 $EndPAD $PAD @@ -4995,28 +5045,28 @@ $PAD Sh "6" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 119 "/FPGA_Spartan6/NF_RNB" +Ne 156 "/Non_volatile_memories/NF_RNB" Po -1280 3850 $EndPAD $PAD Sh "7" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 119 "/FPGA_Spartan6/NF_RNB" +Ne 156 "/Non_volatile_memories/NF_RNB" Po -1090 3850 $EndPAD $PAD Sh "8" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 146 "/Non_volatile_memories/NF_RE_N" +Ne 118 "/FPGA_Spartan6/NF_RE_N" Po -890 3850 $EndPAD $PAD Sh "9" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 140 "/Non_volatile_memories/NF_CS1_N" +Ne 151 "/Non_volatile_memories/NF_CS1_N" Po -690 3850 $EndPAD $PAD @@ -5044,7 +5094,7 @@ $PAD Sh "13" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 100 3850 $EndPAD $PAD @@ -5065,21 +5115,21 @@ $PAD Sh "16" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 115 "/FPGA_Spartan6/NF_CLE" +Ne 113 "/FPGA_Spartan6/NF_CLE" Po 690 3850 $EndPAD $PAD Sh "17" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 114 "/FPGA_Spartan6/NF_ALE" +Ne 150 "/Non_volatile_memories/NF_ALE" Po 880 3850 $EndPAD $PAD Sh "18" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 120 "/FPGA_Spartan6/NF_WE_N" +Ne 119 "/FPGA_Spartan6/NF_WE_N" Po 1080 3850 $EndPAD $PAD @@ -5156,28 +5206,28 @@ $PAD Sh "29" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 141 "/Non_volatile_memories/NF_D0" +Ne 152 "/Non_volatile_memories/NF_D0" Po 1470 -3850 $EndPAD $PAD Sh "30" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 116 "/FPGA_Spartan6/NF_D1" +Ne 114 "/FPGA_Spartan6/NF_D1" Po 1280 -3850 $EndPAD $PAD Sh "31" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 142 "/Non_volatile_memories/NF_D2" +Ne 115 "/FPGA_Spartan6/NF_D2" Po 1080 -3850 $EndPAD $PAD Sh "32" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 143 "/Non_volatile_memories/NF_D3" +Ne 153 "/Non_volatile_memories/NF_D3" Po 880 -3850 $EndPAD $PAD @@ -5205,7 +5255,7 @@ $PAD Sh "36" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 100 -3850 $EndPAD $PAD @@ -5240,28 +5290,28 @@ $PAD Sh "41" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 144 "/Non_volatile_memories/NF_D4" +Ne 154 "/Non_volatile_memories/NF_D4" Po -890 -3850 $EndPAD $PAD Sh "42" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 117 "/FPGA_Spartan6/NF_D5" +Ne 116 "/FPGA_Spartan6/NF_D5" Po -1090 -3850 $EndPAD $PAD Sh "43" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 145 "/Non_volatile_memories/NF_D6" +Ne 117 "/FPGA_Spartan6/NF_D6" Po -1280 -3850 $EndPAD $PAD Sh "44" R 100 600 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 118 "/FPGA_Spartan6/NF_D7" +Ne 155 "/Non_volatile_memories/NF_D7" Po -1480 -3850 $EndPAD $PAD @@ -5314,21 +5364,21 @@ $PAD Sh "1" R 315 590 0 0 0 Dr 0 0 0 At STD N 00440001 -Ne 149 "/Non_volatile_memories/SD_DAT2" +Ne 158 "/Non_volatile_memories/SD_DAT2" Po -1299 0 $EndPAD $PAD Sh "2" R 315 590 0 0 0 Dr 0 0 0 At STD N 00440001 -Ne 137 "/FPGA_Spartan6/SD_DAT3" +Ne 148 "/FPGA_Spartan6/SD_DAT3" Po -866 0 $EndPAD $PAD Sh "3" R 315 590 0 0 0 Dr 0 0 0 At STD N 00440001 -Ne 135 "/FPGA_Spartan6/SD_CMD" +Ne 145 "/FPGA_Spartan6/SD_CMD" Po -433 0 $EndPAD $PAD @@ -5342,56 +5392,56 @@ $PAD Sh "5" R 315 590 0 0 0 Dr 0 0 0 At STD N 00440001 -Ne 147 "/Non_volatile_memories/SD_CLK" +Ne 157 "/Non_volatile_memories/SD_CLK" Po 433 0 $EndPAD $PAD Sh "6" R 315 590 0 0 0 Dr 0 0 0 At STD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 866 0 $EndPAD $PAD Sh "7" R 315 590 0 0 0 Dr 0 0 0 At STD N 00440001 -Ne 148 "/Non_volatile_memories/SD_DAT0" +Ne 146 "/FPGA_Spartan6/SD_DAT0" Po 1299 0 $EndPAD $PAD Sh "8" R 315 590 0 0 0 Dr 0 0 0 At STD N 00440001 -Ne 136 "/FPGA_Spartan6/SD_DAT1" +Ne 147 "/FPGA_Spartan6/SD_DAT1" Po 1732 0 $EndPAD $PAD Sh "CASE" R 571 787 0 0 0 Dr 0 0 0 At STD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 2707 1024 $EndPAD $PAD Sh "CASE" R 571 787 0 0 0 Dr 0 0 0 At STD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po -2707 1024 $EndPAD $PAD Sh "CASE" R 571 787 0 0 0 Dr 0 0 0 At STD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po -2707 -2244 $EndPAD $PAD Sh "CASE" R 571 787 0 0 0 Dr 0 0 0 At STD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 2707 -2244 $EndPAD $EndMODULE MICROSD-500901 @@ -5411,35 +5461,35 @@ $PAD Sh "13" C 1646 1646 0 0 1800 Dr 1252 0 0 At STD N 0CC0FFFF -Ne 159 "N-000332" +Ne 171 "N-000349" Po 2250 0 $EndPAD $PAD Sh "13" C 984 984 0 0 1800 Dr 640 0 0 At STD N 0CC0FFFF -Ne 159 "N-000332" +Ne 171 "N-000349" Po 3100 -1200 $EndPAD $PAD Sh "14" C 1646 1646 0 0 1800 Dr 1252 0 0 At STD N 0CC0FFFF -Ne 159 "N-000332" +Ne 171 "N-000349" Po -2250 0 $EndPAD $PAD Sh "14" C 984 984 0 0 1800 Dr 640 0 0 At STD N 0CC0FFFF -Ne 159 "N-000332" +Ne 171 "N-000349" Po -3100 -1200 $EndPAD $PAD Sh "1" R 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 161 "N-000335" +Ne 173 "N-000351" Po -1750 -2500 $EndPAD $PAD @@ -5453,28 +5503,28 @@ $PAD Sh "5" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 153 "GND" +Ne 163 "GND" Po 250 -2500 $EndPAD $PAD Sh "7" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 160 "N-000334" +Ne 172 "N-000350" Po 1250 -2500 $EndPAD $PAD Sh "2" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 156 "N-000323" +Ne 167 "N-000342" Po -1250 -3500 $EndPAD $PAD Sh "4" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 153 "GND" +Ne 163 "GND" Po -250 -3500 $EndPAD $PAD @@ -5488,7 +5538,7 @@ $PAD Sh "8" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 163 "N-000338" +Ne 170 "N-000348" Po 1750 -3500 $EndPAD $PAD @@ -5502,7 +5552,7 @@ $PAD Sh "10" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 162 "N-000337" +Ne 169 "N-000347" Po -1150 -5400 $EndPAD $PAD @@ -5516,7 +5566,7 @@ $PAD Sh "12" C 540 540 0 0 1800 Dr 350 0 0 At STD N 0CC0FFFF -Ne 157 "N-000325" +Ne 166 "N-000337" Po 2150 -5400 $EndPAD $EndMODULE SD-48025 @@ -5552,28 +5602,28 @@ $PAD Sh "2" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 151 "/USB/USBA_SPD" +Ne 149 "/FPGA_Spartan6/USBA_SPD" Po -511 -1112 $EndPAD $PAD Sh "3" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 150 "/USB/USBA_RCV" +Ne 160 "/USB/USBA_RCV" Po -255 -1112 $EndPAD $PAD Sh "4" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 139 "/FPGA_Spartan6/USBA_VP" +Ne 162 "/USB/USBA_VP" Po 0 -1112 $EndPAD $PAD Sh "5" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 152 "/USB/USBA_VM" +Ne 161 "/USB/USBA_VM" Po 255 -1112 $EndPAD $PAD @@ -5587,35 +5637,35 @@ $PAD Sh "7" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 767 -1112 $EndPAD $PAD Sh "8" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 767 1112 $EndPAD $PAD Sh "9" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 138 "/FPGA_Spartan6/USBA_OE_N" +Ne 159 "/USB/USBA_OE_N" Po 511 1112 $EndPAD $PAD Sh "10" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 167 "N-000348" +Ne 175 "N-000359" Po 255 1112 $EndPAD $PAD Sh "11" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 164 "N-000344" +Ne 179 "N-000368" Po 0 1112 $EndPAD $PAD @@ -5665,7 +5715,7 @@ $PAD Sh "2" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 27 "/DDR_Banks/M1_DQ0" +Ne 29 "/DDR_Banks/M1_DQ0" Po -3838 2176 $EndPAD $PAD @@ -5679,35 +5729,35 @@ $PAD Sh "4" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 101 "/FPGA_Spartan6/M1_DQ1" +Ne 30 "/DDR_Banks/M1_DQ1" Po -3326 2176 $EndPAD $PAD Sh "5" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 104 "/FPGA_Spartan6/M1_DQ2" +Ne 34 "/DDR_Banks/M1_DQ2" Po -3070 2176 $EndPAD $PAD Sh "6" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -2814 2176 $EndPAD $PAD Sh "7" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 32 "/DDR_Banks/M1_DQ3" +Ne 105 "/FPGA_Spartan6/M1_DQ3" Po -2558 2176 $EndPAD $PAD Sh "8" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 105 "/FPGA_Spartan6/M1_DQ4" +Ne 106 "/FPGA_Spartan6/M1_DQ4" Po -2303 2176 $EndPAD $PAD @@ -5721,28 +5771,28 @@ $PAD Sh "10" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 106 "/FPGA_Spartan6/M1_DQ5" +Ne 107 "/FPGA_Spartan6/M1_DQ5" Po -1791 2176 $EndPAD $PAD Sh "11" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 107 "/FPGA_Spartan6/M1_DQ6" +Ne 108 "/FPGA_Spartan6/M1_DQ6" Po -1535 2176 $EndPAD $PAD Sh "12" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -1279 2176 $EndPAD $PAD Sh "13" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 108 "/FPGA_Spartan6/M1_DQ7" +Ne 35 "/DDR_Banks/M1_DQ7" Po -1023 2176 $EndPAD $PAD @@ -5763,7 +5813,7 @@ $PAD Sh "16" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 33 "/DDR_Banks/M1_LDQS" +Ne 112 "/FPGA_Spartan6/M1_LDQS" Po -255 2176 $EndPAD $PAD @@ -5798,28 +5848,28 @@ $PAD Sh "21" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 35 "/DDR_Banks/M1_WE#" +Ne 39 "/DDR_Banks/M1_WE#" Po 1023 2176 $EndPAD $PAD Sh "22" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 24 "/DDR_Banks/M1_CAS#" +Ne 26 "/DDR_Banks/M1_CAS#" Po 1279 2176 $EndPAD $PAD Sh "23" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 112 "/FPGA_Spartan6/M1_RAS#" +Ne 36 "/DDR_Banks/M1_RAS#" Po 1535 2176 $EndPAD $PAD Sh "24" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 1791 2176 $EndPAD $PAD @@ -5833,42 +5883,42 @@ $PAD Sh "26" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 22 "/DDR_Banks/M1_BA0" +Ne 100 "/FPGA_Spartan6/M1_BA0" Po 2302 2176 $EndPAD $PAD Sh "27" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 23 "/DDR_Banks/M1_BA1" +Ne 101 "/FPGA_Spartan6/M1_BA1" Po 2558 2176 $EndPAD $PAD Sh "28" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 93 "/FPGA_Spartan6/M1_A10" +Ne 92 "/FPGA_Spartan6/M1_A10" Po 2814 2176 $EndPAD $PAD Sh "29" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 92 "/FPGA_Spartan6/M1_A0" +Ne 22 "/DDR_Banks/M1_A0" Po 3070 2176 $EndPAD $PAD Sh "30" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 17 "/DDR_Banks/M1_A1" +Ne 91 "/FPGA_Spartan6/M1_A1" Po 3326 2176 $EndPAD $PAD Sh "31" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 19 "/DDR_Banks/M1_A2" +Ne 94 "/FPGA_Spartan6/M1_A2" Po 3582 2176 $EndPAD $PAD @@ -5889,7 +5939,7 @@ $PAD Sh "34" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 4094 -2176 $EndPAD $PAD @@ -5903,49 +5953,49 @@ $PAD Sh "36" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 20 "/DDR_Banks/M1_A5" +Ne 97 "/FPGA_Spartan6/M1_A5" Po 3582 -2176 $EndPAD $PAD Sh "37" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 21 "/DDR_Banks/M1_A6" +Ne 98 "/FPGA_Spartan6/M1_A6" Po 3326 -2176 $EndPAD $PAD Sh "38" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 97 "/FPGA_Spartan6/M1_A7" +Ne 24 "/DDR_Banks/M1_A7" Po 3070 -2176 $EndPAD $PAD Sh "39" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 98 "/FPGA_Spartan6/M1_A8" +Ne 99 "/FPGA_Spartan6/M1_A8" Po 2814 -2176 $EndPAD $PAD Sh "40" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 99 "/FPGA_Spartan6/M1_A9" +Ne 25 "/DDR_Banks/M1_A9" Po 2558 -2176 $EndPAD $PAD Sh "41" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 18 "/DDR_Banks/M1_A11" +Ne 93 "/FPGA_Spartan6/M1_A11" Po 2303 -2176 $EndPAD $PAD Sh "42" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 94 "/FPGA_Spartan6/M1_A12" +Ne 23 "/DDR_Banks/M1_A12" Po 2047 -2176 $EndPAD $PAD @@ -5959,42 +6009,42 @@ $PAD Sh "44" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 26 "/DDR_Banks/M1_CLK#" +Ne 28 "/DDR_Banks/M1_CLK#" Po 1535 -2176 $EndPAD $PAD Sh "45" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 25 "/DDR_Banks/M1_CKE" +Ne 0 "" Po 1279 -2176 $EndPAD $PAD Sh "46" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 100 "/FPGA_Spartan6/M1_CLK" +Ne 27 "/DDR_Banks/M1_CLK" Po 1023 -2176 $EndPAD $PAD Sh "47" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 34 "/DDR_Banks/M1_UDM" +Ne 37 "/DDR_Banks/M1_UDM" Po 767 -2176 $EndPAD $PAD Sh "48" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 511 -2176 $EndPAD $PAD Sh "49" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 154 "N-000057" +Ne 164 "N-000057" Po 255 -2176 $EndPAD $PAD @@ -6008,14 +6058,14 @@ $PAD Sh "51" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 113 "/FPGA_Spartan6/M1_UDQS" +Ne 38 "/DDR_Banks/M1_UDQS" Po -255 -2176 $EndPAD $PAD Sh "52" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -511 -2176 $EndPAD $PAD @@ -6050,28 +6100,28 @@ $PAD Sh "57" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 28 "/DDR_Banks/M1_DQ10" +Ne 102 "/FPGA_Spartan6/M1_DQ10" Po -1791 -2176 $EndPAD $PAD Sh "58" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -2047 -2176 $EndPAD $PAD Sh "59" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 29 "/DDR_Banks/M1_DQ11" +Ne 103 "/FPGA_Spartan6/M1_DQ11" Po -2303 -2176 $EndPAD $PAD Sh "60" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 102 "/FPGA_Spartan6/M1_DQ12" +Ne 31 "/DDR_Banks/M1_DQ12" Po -2558 -2176 $EndPAD $PAD @@ -6085,35 +6135,35 @@ $PAD Sh "62" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 30 "/DDR_Banks/M1_DQ13" +Ne 104 "/FPGA_Spartan6/M1_DQ13" Po -3070 -2176 $EndPAD $PAD Sh "63" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 103 "/FPGA_Spartan6/M1_DQ14" +Ne 32 "/DDR_Banks/M1_DQ14" Po -3326 -2176 $EndPAD $PAD Sh "64" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -3582 -2176 $EndPAD $PAD Sh "65" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 31 "/DDR_Banks/M1_DQ15" +Ne 33 "/DDR_Banks/M1_DQ15" Po -3838 -2176 $EndPAD $PAD Sh "66" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -4094 -2176 $EndPAD $EndMODULE TSOP-66 @@ -6142,7 +6192,7 @@ $PAD Sh "2" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 76 "/FPGA_Spartan6/M0_DQ0" +Ne 11 "/DDR_Banks/M0_DQ0" Po -3838 2176 $EndPAD $PAD @@ -6156,35 +6206,35 @@ $PAD Sh "4" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 77 "/FPGA_Spartan6/M0_DQ1" +Ne 80 "/FPGA_Spartan6/M0_DQ1" Po -3326 2176 $EndPAD $PAD Sh "5" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 83 "/FPGA_Spartan6/M0_DQ2" +Ne 85 "/FPGA_Spartan6/M0_DQ2" Po -3070 2176 $EndPAD $PAD Sh "6" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -2814 2176 $EndPAD $PAD Sh "7" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 84 "/FPGA_Spartan6/M0_DQ3" +Ne 86 "/FPGA_Spartan6/M0_DQ3" Po -2558 2176 $EndPAD $PAD Sh "8" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 85 "/FPGA_Spartan6/M0_DQ4" +Ne 87 "/FPGA_Spartan6/M0_DQ4" Po -2303 2176 $EndPAD $PAD @@ -6198,28 +6248,28 @@ $PAD Sh "10" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 86 "/FPGA_Spartan6/M0_DQ5" +Ne 88 "/FPGA_Spartan6/M0_DQ5" Po -1791 2176 $EndPAD $PAD Sh "11" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 12 "/DDR_Banks/M0_DQ6" +Ne 89 "/FPGA_Spartan6/M0_DQ6" Po -1535 2176 $EndPAD $PAD Sh "12" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -1279 2176 $EndPAD $PAD Sh "13" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 87 "/FPGA_Spartan6/M0_DQ7" +Ne 14 "/DDR_Banks/M0_DQ7" Po -1023 2176 $EndPAD $PAD @@ -6240,7 +6290,7 @@ $PAD Sh "16" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 14 "/DDR_Banks/M0_LDQS" +Ne 90 "/FPGA_Spartan6/M0_LDQS" Po -255 2176 $EndPAD $PAD @@ -6268,35 +6318,35 @@ $PAD Sh "20" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 89 "/FPGA_Spartan6/M0_LDM" +Ne 17 "/DDR_Banks/M0_LDM" Po 767 2176 $EndPAD $PAD Sh "21" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 16 "/DDR_Banks/M0_WE#" +Ne 21 "/DDR_Banks/M0_WE#" Po 1023 2176 $EndPAD $PAD Sh "22" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 72 "/FPGA_Spartan6/M0_CAS#" +Ne 77 "/FPGA_Spartan6/M0_CAS#" Po 1279 2176 $EndPAD $PAD Sh "23" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 90 "/FPGA_Spartan6/M0_RAS#" +Ne 18 "/DDR_Banks/M0_RAS#" Po 1535 2176 $EndPAD $PAD Sh "24" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 1791 2176 $EndPAD $PAD @@ -6310,49 +6360,49 @@ $PAD Sh "26" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 10 "/DDR_Banks/M0_BA0" +Ne 9 "/DDR_Banks/M0_BA0" Po 2302 2176 $EndPAD $PAD Sh "27" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 71 "/FPGA_Spartan6/M0_BA1" +Ne 76 "/FPGA_Spartan6/M0_BA1" Po 2558 2176 $EndPAD $PAD Sh "28" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 7 "/DDR_Banks/M0_A10" +Ne 68 "/FPGA_Spartan6/M0_A10" Po 2814 2176 $EndPAD $PAD Sh "29" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 6 "/DDR_Banks/M0_A0" +Ne 66 "/FPGA_Spartan6/M0_A0" Po 3070 2176 $EndPAD $PAD Sh "30" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 62 "/FPGA_Spartan6/M0_A1" +Ne 67 "/FPGA_Spartan6/M0_A1" Po 3326 2176 $EndPAD $PAD Sh "31" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 65 "/FPGA_Spartan6/M0_A2" +Ne 70 "/FPGA_Spartan6/M0_A2" Po 3582 2176 $EndPAD $PAD Sh "32" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 66 "/FPGA_Spartan6/M0_A3" +Ne 71 "/FPGA_Spartan6/M0_A3" Po 3838 2176 $EndPAD $PAD @@ -6366,63 +6416,63 @@ $PAD Sh "34" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 4094 -2176 $EndPAD $PAD Sh "35" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 67 "/FPGA_Spartan6/M0_A4" +Ne 72 "/FPGA_Spartan6/M0_A4" Po 3838 -2176 $EndPAD $PAD Sh "36" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 8 "/DDR_Banks/M0_A5" +Ne 7 "/DDR_Banks/M0_A5" Po 3582 -2176 $EndPAD $PAD Sh "37" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 68 "/FPGA_Spartan6/M0_A6" +Ne 73 "/FPGA_Spartan6/M0_A6" Po 3326 -2176 $EndPAD $PAD Sh "38" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 69 "/FPGA_Spartan6/M0_A7" +Ne 74 "/FPGA_Spartan6/M0_A7" Po 3070 -2176 $EndPAD $PAD Sh "39" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 9 "/DDR_Banks/M0_A8" +Ne 75 "/FPGA_Spartan6/M0_A8" Po 2814 -2176 $EndPAD $PAD Sh "40" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 70 "/FPGA_Spartan6/M0_A9" +Ne 8 "/DDR_Banks/M0_A9" Po 2558 -2176 $EndPAD $PAD Sh "41" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 63 "/FPGA_Spartan6/M0_A11" +Ne 6 "/DDR_Banks/M0_A11" Po 2303 -2176 $EndPAD $PAD Sh "42" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 64 "/FPGA_Spartan6/M0_A12" +Ne 69 "/FPGA_Spartan6/M0_A12" Po 2047 -2176 $EndPAD $PAD @@ -6436,42 +6486,42 @@ $PAD Sh "44" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 75 "/FPGA_Spartan6/M0_CLK#" +Ne 79 "/FPGA_Spartan6/M0_CLK#" Po 1535 -2176 $EndPAD $PAD Sh "45" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 73 "/FPGA_Spartan6/M0_CKE" +Ne 10 "/DDR_Banks/M0_CKE" Po 1279 -2176 $EndPAD $PAD Sh "46" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 74 "/FPGA_Spartan6/M0_CLK" +Ne 78 "/FPGA_Spartan6/M0_CLK" Po 1023 -2176 $EndPAD $PAD Sh "47" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 15 "/DDR_Banks/M0_UDM" +Ne 19 "/DDR_Banks/M0_UDM" Po 767 -2176 $EndPAD $PAD Sh "48" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 511 -2176 $EndPAD $PAD Sh "49" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 155 "N-000058" +Ne 165 "N-000058" Po 255 -2176 $EndPAD $PAD @@ -6485,14 +6535,14 @@ $PAD Sh "51" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 91 "/FPGA_Spartan6/M0_UDQS" +Ne 20 "/DDR_Banks/M0_UDQS" Po -255 -2176 $EndPAD $PAD Sh "52" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -511 -2176 $EndPAD $PAD @@ -6506,7 +6556,7 @@ $PAD Sh "54" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 88 "/FPGA_Spartan6/M0_DQ8" +Ne 15 "/DDR_Banks/M0_DQ8" Po -1023 -2176 $EndPAD $PAD @@ -6520,35 +6570,35 @@ $PAD Sh "56" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 13 "/DDR_Banks/M0_DQ9" +Ne 16 "/DDR_Banks/M0_DQ9" Po -1535 -2176 $EndPAD $PAD Sh "57" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 11 "/DDR_Banks/M0_DQ10" +Ne 81 "/FPGA_Spartan6/M0_DQ10" Po -1791 -2176 $EndPAD $PAD Sh "58" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -2047 -2176 $EndPAD $PAD Sh "59" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 78 "/FPGA_Spartan6/M0_DQ11" +Ne 12 "/DDR_Banks/M0_DQ11" Po -2303 -2176 $EndPAD $PAD Sh "60" R 137 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 79 "/FPGA_Spartan6/M0_DQ12" +Ne 82 "/FPGA_Spartan6/M0_DQ12" Po -2558 -2176 $EndPAD $PAD @@ -6562,35 +6612,35 @@ $PAD Sh "62" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 80 "/FPGA_Spartan6/M0_DQ13" +Ne 83 "/FPGA_Spartan6/M0_DQ13" Po -3070 -2176 $EndPAD $PAD Sh "63" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 81 "/FPGA_Spartan6/M0_DQ14" +Ne 13 "/DDR_Banks/M0_DQ14" Po -3326 -2176 $EndPAD $PAD Sh "64" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -3582 -2176 $EndPAD $PAD Sh "65" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 82 "/FPGA_Spartan6/M0_DQ15" +Ne 84 "/FPGA_Spartan6/M0_DQ15" Po -3838 -2176 $EndPAD $PAD Sh "66" R 138 275 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -4094 -2176 $EndPAD $EndMODULE TSOP-66 @@ -6611,14 +6661,14 @@ $PAD Sh "1" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 166 "N-000347" +Ne 177 "N-000362" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6639,14 +6689,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 159 "N-000332" +Ne 171 "N-000349" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6667,14 +6717,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 157 "N-000325" +Ne 166 "N-000337" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 43 "/Ethernet_Phy/ETH_LED1" +Ne 44 "/Ethernet_Phy/ETH_LED1" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6695,14 +6745,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 162 "N-000337" +Ne 169 "N-000347" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 42 "/Ethernet_Phy/ETH_LED0" +Ne 43 "/Ethernet_Phy/ETH_LED0" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6730,7 +6780,7 @@ $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 163 "N-000338" +Ne 170 "N-000348" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6758,7 +6808,7 @@ $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 160 "N-000334" +Ne 172 "N-000350" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6786,7 +6836,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 156 "N-000323" +Ne 167 "N-000342" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6814,7 +6864,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 161 "N-000335" +Ne 173 "N-000351" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6835,14 +6885,14 @@ $PAD Sh "1" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 158 "N-000331" +Ne 168 "N-000343" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6863,7 +6913,7 @@ $PAD Sh "1" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 55 "/FPGA_Spartan6/ETH_MDIO" +Ne 60 "/FPGA_Spartan6/ETH_MDIO" Po -176 0 $EndPAD $PAD @@ -6891,14 +6941,14 @@ $PAD Sh "1" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 166 "N-000347" +Ne 177 "N-000362" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6919,14 +6969,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 159 "N-000332" +Ne 171 "N-000349" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6954,7 +7004,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -6982,7 +7032,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7010,7 +7060,7 @@ $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7031,14 +7081,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 37 "/Ethernet_Phy/ETH_A3.3V" +Ne 41 "/Ethernet_Phy/ETH_A3.3V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7059,14 +7109,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 36 "/Ethernet_Phy/ETH_A1.8V" +Ne 40 "/Ethernet_Phy/ETH_A1.8V" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7094,7 +7144,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7122,7 +7172,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7150,7 +7200,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7178,7 +7228,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7199,14 +7249,14 @@ $PAD Sh "1" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 167 "N-000348" +Ne 175 "N-000359" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7227,14 +7277,14 @@ $PAD Sh "1" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 164 "N-000344" +Ne 179 "N-000368" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7262,7 +7312,7 @@ $PAD Sh "2" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7290,7 +7340,7 @@ $PAD Sh "2" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7318,7 +7368,7 @@ $PAD Sh "2" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7339,14 +7389,14 @@ $PAD Sh "1" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 37 "/Ethernet_Phy/ETH_A3.3V" +Ne 41 "/Ethernet_Phy/ETH_A3.3V" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7374,7 +7424,7 @@ $PAD Sh "2" R 197 354 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -7395,7 +7445,7 @@ $PAD Sh "1" R 355 984 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 173 "N-000361" +Ne 183 "N-000375" Po -570 0 $EndPAD $PAD @@ -7428,56 +7478,56 @@ $PAD Sh "1" R 470 470 0 0 1800 Dr 360 0 0 At STD N 0CC0FFFF -Ne 165 "N-000346" +Ne 176 "N-000360" Po 0 -2362 $EndPAD $PAD Sh "2" C 470 470 0 0 1800 Dr 360 0 0 At STD N 0CC0FFFF -Ne 167 "N-000348" +Ne 175 "N-000359" Po 0 -1575 $EndPAD $PAD Sh "3" C 470 470 0 0 1800 Dr 360 0 0 At STD N 0CC0FFFF -Ne 164 "N-000344" +Ne 179 "N-000368" Po 0 -787 $EndPAD $PAD Sh "3" C 470 470 0 0 1800 Dr 360 0 0 At STD N 0CC0FFFF -Ne 164 "N-000344" +Ne 179 "N-000368" Po 0 0 $EndPAD $PAD Sh "S1" C 670 670 0 0 1800 Dr 532 0 0 At STD N 0CC0FFFF -Ne 166 "N-000347" +Ne 177 "N-000362" Po 1077 287 $EndPAD $PAD Sh "S2" C 670 670 0 0 1800 Dr 532 0 0 At STD N 0CC0FFFF -Ne 166 "N-000347" +Ne 177 "N-000362" Po -1077 287 $EndPAD $PAD Sh "S3" C 670 670 0 0 1800 Dr 532 0 0 At STD N 0CC0FFFF -Ne 166 "N-000347" +Ne 177 "N-000362" Po 1077 -2468 $EndPAD $PAD Sh "S4" C 670 670 0 0 1800 Dr 532 0 0 At STD N 0CC0FFFF -Ne 166 "N-000347" +Ne 177 "N-000362" Po -1077 -2468 $EndPAD $EndMODULE USB-48204 @@ -7505,7 +7555,7 @@ $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 155 "N-000058" +Ne 165 "N-000058" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7526,14 +7576,14 @@ $PAD Sh "1" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 155 "N-000058" +Ne 165 "N-000058" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7554,14 +7604,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 154 "N-000057" +Ne 164 "N-000057" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7589,7 +7639,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 154 "N-000057" +Ne 164 "N-000057" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7617,7 +7667,7 @@ $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 155 "N-000058" +Ne 165 "N-000058" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7638,14 +7688,14 @@ $PAD Sh "1" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 155 "N-000058" +Ne 165 "N-000058" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7673,7 +7723,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 154 "N-000057" +Ne 164 "N-000057" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7701,7 +7751,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7729,7 +7779,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7757,7 +7807,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7785,7 +7835,7 @@ $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7813,7 +7863,7 @@ $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7841,35 +7891,35 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 $MODULE 0402 -Po 65674 34398 1800 0 4C5FF890 4C61CFA2 ~~ +Po 66142 34646 2700 0 4C5FF890 4C61CFA2 ~~ Li 0402 Sc 4C61CFA2 AR /4C421DD3/4C61CFA2 Op 0 0 0 At SMD -T0 0 150 200 200 1800 40 M V 20 N"C30" -T1 0 -150 200 200 1800 40 M I 20 N"10nF" +T0 0 150 200 200 2700 40 M V 20 N"C30" +T1 0 -150 200 200 2700 40 M I 20 N"10nF" DS -305 -168 -305 168 50 20 DS -305 168 305 168 50 20 DS 305 168 305 -168 50 20 DS 305 -168 -305 -168 50 20 $PAD -Sh "1" R 157 236 0 0 1800 +Sh "1" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 Ne 3 "+2.5V" Po -176 0 $EndPAD $PAD -Sh "2" R 157 236 0 0 1800 +Sh "2" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7897,7 +7947,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7925,7 +7975,7 @@ $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7953,7 +8003,7 @@ $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -7981,7 +8031,7 @@ $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -8009,7 +8059,7 @@ $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -8030,14 +8080,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 154 "N-000057" +Ne 164 "N-000057" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8058,14 +8108,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 168 "N-000349" +Ne 174 "N-000358" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -8086,14 +8136,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 173 "N-000361" +Ne 183 "N-000375" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 165 "N-000346" +Ne 176 "N-000360" Po 294 0 $EndPAD $EndMODULE 0603 @@ -8114,7 +8164,7 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 171 "N-000357" +Ne 182 "N-000374" Po -294 0 $EndPAD $PAD @@ -8149,7 +8199,7 @@ $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -8170,14 +8220,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 172 "N-000359" +Ne 181 "N-000373" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8198,14 +8248,14 @@ $PAD Sh "1" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 172 "N-000359" +Ne 181 "N-000373" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8233,7 +8283,7 @@ $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8254,14 +8304,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 170 "N-000356" +Ne 180 "N-000372" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -8282,14 +8332,14 @@ $PAD Sh "1" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 169 "N-000351" +Ne 178 "N-000363" Po -294 0 $EndPAD $PAD Sh "2" R 197 354 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -8317,7 +8367,7 @@ $PAD Sh "2" R 275 510 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -8345,7 +8395,7 @@ $PAD Sh "2" R 275 510 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -8366,7 +8416,7 @@ $PAD Sh "1" R 355 984 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 171 "N-000357" +Ne 182 "N-000374" Po -570 0 $EndPAD $PAD @@ -8444,14 +8494,14 @@ $PAD Sh "7" R 137 570 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 767 -1112 $EndPAD $PAD Sh "8" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 767 1112 $EndPAD $PAD @@ -8465,14 +8515,14 @@ $PAD Sh "10" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 170 "N-000356" +Ne 180 "N-000372" Po 255 1112 $EndPAD $PAD Sh "11" R 137 570 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 169 "N-000351" +Ne 178 "N-000363" Po 0 1112 $EndPAD $PAD @@ -8514,14 +8564,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8549,7 +8599,7 @@ $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8570,14 +8620,14 @@ $PAD Sh "1" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8605,7 +8655,7 @@ $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8633,7 +8683,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8654,14 +8704,14 @@ $PAD Sh "1" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8689,7 +8739,7 @@ $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8717,7 +8767,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8738,14 +8788,14 @@ $PAD Sh "1" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po -176 0 $EndPAD $PAD Sh "2" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8773,7 +8823,7 @@ $PAD Sh "2" R 157 236 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8801,7 +8851,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8829,7 +8879,7 @@ $PAD Sh "2" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8857,7 +8907,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8885,7 +8935,7 @@ $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8913,7 +8963,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8941,7 +8991,7 @@ $PAD Sh "2" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8969,7 +9019,7 @@ $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -8997,7 +9047,7 @@ $PAD Sh "2" R 275 510 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -9018,14 +9068,14 @@ $PAD Sh "1" R 275 510 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po -373 0 $EndPAD $PAD Sh "2" R 275 510 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -9053,7 +9103,7 @@ $PAD Sh "2" R 275 510 0 0 0 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -9081,7 +9131,7 @@ $PAD Sh "2" R 275 510 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -9109,7 +9159,7 @@ $PAD Sh "2" R 275 510 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -9137,7 +9187,7 @@ $PAD Sh "2" R 275 510 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -9165,7 +9215,7 @@ $PAD Sh "2" R 275 510 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 373 0 $EndPAD $EndMODULE 0805 @@ -9193,7 +9243,7 @@ $PAD Sh "2" R 355 984 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 570 0 $EndPAD $EndMODULE 1210 @@ -9214,14 +9264,14 @@ $PAD Sh "1" R 355 984 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po -570 0 $EndPAD $PAD Sh "2" R 355 984 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 570 0 $EndPAD $EndMODULE 1210 @@ -9249,7 +9299,7 @@ $PAD Sh "2" R 355 984 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 570 0 $EndPAD $EndMODULE 1210 @@ -9277,7 +9327,7 @@ $PAD Sh "2" R 355 984 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 570 0 $EndPAD $EndMODULE 1210 @@ -9305,7 +9355,7 @@ $PAD Sh "2" R 355 984 0 0 0 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 570 0 $EndPAD $EndMODULE 1210 @@ -9333,7 +9383,7 @@ $PAD Sh "2" R 355 984 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 570 0 $EndPAD $EndMODULE 1210 @@ -9361,7 +9411,7 @@ $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -9389,7 +9439,7 @@ $PAD Sh "2" R 355 668 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 570 0 $EndPAD $EndMODULE 1206 @@ -9416,56 +9466,56 @@ $PAD Sh "8" R 200 450 0 0 2700 Dr 0 0 0 At SMD N 00888000 -Ne 174 "VCCO2" +Ne 184 "VCCO2" Po -750 -1050 $EndPAD $PAD Sh "1" R 200 450 0 0 2700 Dr 0 0 0 At SMD N 00888000 -Ne 122 "/FPGA_Spartan6/PROG_CSO" +Ne 121 "/FPGA_Spartan6/PROG_CSO" Po -750 1050 $EndPAD $PAD Sh "7" R 200 450 0 0 2700 Dr 0 0 0 At SMD N 00888000 -Ne 126 "/FPGA_Spartan6/PROG_MISO3" +Ne 125 "/FPGA_Spartan6/PROG_MISO3" Po -250 -1050 $EndPAD $PAD Sh "6" R 200 450 0 0 2700 Dr 0 0 0 At SMD N 00888000 -Ne 121 "/FPGA_Spartan6/PROG_CCLK" +Ne 120 "/FPGA_Spartan6/PROG_CCLK" Po 250 -1050 $EndPAD $PAD Sh "5" R 200 450 0 0 2700 Dr 0 0 0 At SMD N 00888000 -Ne 123 "/FPGA_Spartan6/PROG_MISO0" +Ne 122 "/FPGA_Spartan6/PROG_MISO0" Po 750 -1050 $EndPAD $PAD Sh "2" R 200 450 0 0 2700 Dr 0 0 0 At SMD N 00888000 -Ne 124 "/FPGA_Spartan6/PROG_MISO1" +Ne 123 "/FPGA_Spartan6/PROG_MISO1" Po -250 1050 $EndPAD $PAD Sh "3" R 200 450 0 0 2700 Dr 0 0 0 At SMD N 00888000 -Ne 125 "/FPGA_Spartan6/PROG_MISO2" +Ne 124 "/FPGA_Spartan6/PROG_MISO2" Po 250 1050 $EndPAD $PAD Sh "4" R 200 450 0 0 2700 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 750 1050 $EndPAD $SHAPE3D @@ -9499,7 +9549,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -9527,7 +9577,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -9555,7 +9605,7 @@ $PAD Sh "2" R 157 236 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -9583,7 +9633,7 @@ $PAD Sh "2" R 157 236 0 0 2700 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 176 0 $EndPAD $EndMODULE 0402 @@ -9611,7 +9661,7 @@ $PAD Sh "2" R 197 354 0 0 900 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po 294 0 $EndPAD $EndMODULE 0603 @@ -9639,7 +9689,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 37 "/Ethernet_Phy/ETH_A3.3V" +Ne 41 "/Ethernet_Phy/ETH_A3.3V" Po 176 0 $EndPAD $EndMODULE 0402 @@ -9667,7 +9717,7 @@ $PAD Sh "2" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 36 "/Ethernet_Phy/ETH_A1.8V" +Ne 40 "/Ethernet_Phy/ETH_A1.8V" Po 176 0 $EndPAD $EndMODULE 0402 @@ -9688,7 +9738,7 @@ $PAD Sh "1" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00440001 -Ne 36 "/Ethernet_Phy/ETH_A1.8V" +Ne 40 "/Ethernet_Phy/ETH_A1.8V" Po -176 0 $EndPAD $PAD @@ -9716,7 +9766,7 @@ $PAD Sh "1" R 157 236 0 0 1800 Dr 0 0 0 At SMD N 00888000 -Ne 153 "GND" +Ne 163 "GND" Po -176 0 $EndPAD $PAD @@ -9742,28 +9792,28 @@ $PAD Sh "1" R 118 157 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 127 "/FPGA_Spartan6/R_M1_A0" +Ne 126 "/FPGA_Spartan6/R_M1_A0" Po -295 -177 $EndPAD $PAD Sh "2" R 118 157 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 128 "/FPGA_Spartan6/R_M1_A1" +Ne 127 "/FPGA_Spartan6/R_M1_A1" Po -98 -177 $EndPAD $PAD Sh "3" R 118 157 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 129 "/FPGA_Spartan6/R_M1_A2" +Ne 128 "/FPGA_Spartan6/R_M1_A2" Po 98 -177 $EndPAD $PAD Sh "4" R 118 157 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 130 "/FPGA_Spartan6/R_M1_A3" +Ne 129 "/FPGA_Spartan6/R_M1_A3" Po 295 -177 $EndPAD $PAD @@ -9777,21 +9827,21 @@ $PAD Sh "6" R 118 157 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 19 "/DDR_Banks/M1_A2" +Ne 94 "/FPGA_Spartan6/M1_A2" Po 98 177 $EndPAD $PAD Sh "7" R 118 157 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 17 "/DDR_Banks/M1_A1" +Ne 91 "/FPGA_Spartan6/M1_A1" Po -98 177 $EndPAD $PAD Sh "8" R 118 157 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 92 "/FPGA_Spartan6/M1_A0" +Ne 22 "/DDR_Banks/M1_A0" Po -295 177 $EndPAD $EndMODULE R_PACK4-0402 @@ -9810,56 +9860,260 @@ $PAD Sh "1" R 118 157 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 133 "/FPGA_Spartan6/R_M1_CAS#" +Ne 132 "/FPGA_Spartan6/R_M1_CAS#" Po -295 -177 $EndPAD $PAD Sh "2" R 118 157 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 134 "/FPGA_Spartan6/R_M1_RAS#" +Ne 143 "/FPGA_Spartan6/R_M1_RAS#" Po -98 -177 $EndPAD $PAD Sh "3" R 118 157 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 131 "/FPGA_Spartan6/R_M1_BA0" +Ne 130 "/FPGA_Spartan6/R_M1_BA0" Po 98 -177 $EndPAD $PAD Sh "4" R 118 157 0 0 2700 Dr 0 0 0 At SMD N 00440001 -Ne 132 "/FPGA_Spartan6/R_M1_BA1" +Ne 131 "/FPGA_Spartan6/R_M1_BA1" Po 295 -177 $EndPAD $PAD Sh "5" R 118 157 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 23 "/DDR_Banks/M1_BA1" +Ne 101 "/FPGA_Spartan6/M1_BA1" Po 295 177 $EndPAD $PAD Sh "6" R 118 157 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 22 "/DDR_Banks/M1_BA0" +Ne 100 "/FPGA_Spartan6/M1_BA0" Po 98 177 $EndPAD $PAD Sh "7" R 118 157 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 112 "/FPGA_Spartan6/M1_RAS#" +Ne 36 "/DDR_Banks/M1_RAS#" Po -98 177 $EndPAD $PAD Sh "8" R 118 157 0 0 900 Dr 0 0 0 At SMD N 00440001 -Ne 24 "/DDR_Banks/M1_CAS#" +Ne 26 "/DDR_Banks/M1_CAS#" +Po -295 177 +$EndPAD +$EndMODULE R_PACK4-0402 +$MODULE R_PACK4-0402 +Po 64961 36024 900 0 4C69A686 4C69D4B5 ~~ +Li R_PACK4-0402 +Sc 4C69D4B5 +AR /4C431A63/4C69D3A3 +Op 0 0 0 +T0 117 451 197 197 900 49 M V 20 N"RP4" +T1 68 -436 157 157 900 39 M I 20 N"R_PACK4" +DS -394 -276 -394 275 59 20 +DS 394 -277 394 276 59 20 +DS -354 0 354 0 59 20 +$PAD +Sh "1" R 118 157 0 0 2700 +Dr 0 0 0 +At SMD N 00440001 +Ne 137 "/FPGA_Spartan6/R_M1_DQ4" +Po -295 -177 +$EndPAD +$PAD +Sh "2" R 118 157 0 0 2700 +Dr 0 0 0 +At SMD N 00440001 +Ne 138 "/FPGA_Spartan6/R_M1_DQ5" +Po -98 -177 +$EndPAD +$PAD +Sh "3" R 118 157 0 0 2700 +Dr 0 0 0 +At SMD N 00440001 +Ne 139 "/FPGA_Spartan6/R_M1_DQ6" +Po 98 -177 +$EndPAD +$PAD +Sh "4" R 118 157 0 0 2700 +Dr 0 0 0 +At SMD N 00440001 +Ne 140 "/FPGA_Spartan6/R_M1_DQ7" +Po 295 -177 +$EndPAD +$PAD +Sh "5" R 118 157 0 0 900 +Dr 0 0 0 +At SMD N 00440001 +Ne 35 "/DDR_Banks/M1_DQ7" +Po 295 177 +$EndPAD +$PAD +Sh "6" R 118 157 0 0 900 +Dr 0 0 0 +At SMD N 00440001 +Ne 108 "/FPGA_Spartan6/M1_DQ6" +Po 98 177 +$EndPAD +$PAD +Sh "7" R 118 157 0 0 900 +Dr 0 0 0 +At SMD N 00440001 +Ne 107 "/FPGA_Spartan6/M1_DQ5" +Po -98 177 +$EndPAD +$PAD +Sh "8" R 118 157 0 0 900 +Dr 0 0 0 +At SMD N 00440001 +Ne 106 "/FPGA_Spartan6/M1_DQ4" +Po -295 177 +$EndPAD +$EndMODULE R_PACK4-0402 +$MODULE R_PACK4-0402 +Po 64961 34055 900 0 4C69A686 4C69D4B7 ~~ +Li R_PACK4-0402 +Sc 4C69D4B7 +AR /4C431A63/4C69D3A4 +Op 0 0 0 +T0 117 451 197 197 900 49 M V 20 N"RP3" +T1 68 -436 157 157 900 39 M I 20 N"R_PACK4" +DS -394 -276 -394 275 59 20 +DS 394 -277 394 276 59 20 +DS -354 0 354 0 59 20 +$PAD +Sh "1" R 118 157 0 0 2700 +Dr 0 0 0 +At SMD N 00440001 +Ne 0 "" +Po -295 -177 +$EndPAD +$PAD +Sh "2" R 118 157 0 0 2700 +Dr 0 0 0 +At SMD N 00440001 +Ne 142 "/FPGA_Spartan6/R_M1_LDQS" +Po -98 -177 +$EndPAD +$PAD +Sh "3" R 118 157 0 0 2700 +Dr 0 0 0 +At SMD N 00440001 +Ne 141 "/FPGA_Spartan6/R_M1_LDM" +Po 98 -177 +$EndPAD +$PAD +Sh "4" R 118 157 0 0 2700 +Dr 0 0 0 +At SMD N 00440001 +Ne 144 "/FPGA_Spartan6/R_M1_WE#" +Po 295 -177 +$EndPAD +$PAD +Sh "5" R 118 157 0 0 900 +Dr 0 0 0 +At SMD N 00440001 +Ne 39 "/DDR_Banks/M1_WE#" +Po 295 177 +$EndPAD +$PAD +Sh "6" R 118 157 0 0 900 +Dr 0 0 0 +At SMD N 00440001 +Ne 111 "/FPGA_Spartan6/M1_LDM" +Po 98 177 +$EndPAD +$PAD +Sh "7" R 118 157 0 0 900 +Dr 0 0 0 +At SMD N 00440001 +Ne 112 "/FPGA_Spartan6/M1_LDQS" +Po -98 177 +$EndPAD +$PAD +Sh "8" R 118 157 0 0 900 +Dr 0 0 0 +At SMD N 00440001 +Ne 0 "" +Po -295 177 +$EndPAD +$EndMODULE R_PACK4-0402 +$MODULE R_PACK4-0402 +Po 64961 37402 900 0 4C69A686 4C69D4B9 ~~ +Li R_PACK4-0402 +Sc 4C69D4B9 +AR /4C431A63/4C69D3A9 +Op 0 0 0 +T0 117 451 197 197 900 49 M V 20 N"RP5" +T1 68 -436 157 157 900 39 M I 20 N"R_PACK4" +DS -394 -276 -394 275 59 20 +DS 394 -277 394 276 59 20 +DS -354 0 354 0 59 20 +$PAD +Sh "1" R 118 157 0 0 2700 +Dr 0 0 0 +At SMD N 00440001 +Ne 133 "/FPGA_Spartan6/R_M1_DQ0" +Po -295 -177 +$EndPAD +$PAD +Sh "2" R 118 157 0 0 2700 +Dr 0 0 0 +At SMD N 00440001 +Ne 134 "/FPGA_Spartan6/R_M1_DQ1" +Po -98 -177 +$EndPAD +$PAD +Sh "3" R 118 157 0 0 2700 +Dr 0 0 0 +At SMD N 00440001 +Ne 135 "/FPGA_Spartan6/R_M1_DQ2" +Po 98 -177 +$EndPAD +$PAD +Sh "4" R 118 157 0 0 2700 +Dr 0 0 0 +At SMD N 00440001 +Ne 136 "/FPGA_Spartan6/R_M1_DQ3" +Po 295 -177 +$EndPAD +$PAD +Sh "5" R 118 157 0 0 900 +Dr 0 0 0 +At SMD N 00440001 +Ne 105 "/FPGA_Spartan6/M1_DQ3" +Po 295 177 +$EndPAD +$PAD +Sh "6" R 118 157 0 0 900 +Dr 0 0 0 +At SMD N 00440001 +Ne 34 "/DDR_Banks/M1_DQ2" +Po 98 177 +$EndPAD +$PAD +Sh "7" R 118 157 0 0 900 +Dr 0 0 0 +At SMD N 00440001 +Ne 30 "/DDR_Banks/M1_DQ1" +Po -98 177 +$EndPAD +$PAD +Sh "8" R 118 157 0 0 900 +Dr 0 0 0 +At SMD N 00440001 +Ne 29 "/DDR_Banks/M1_DQ0" Po -295 177 $EndPAD $EndMODULE R_PACK4-0402 diff --git a/kicad/xue-rnc/xue-rnc.net b/kicad/xue-rnc/xue-rnc.net index b27fc8c..59b6c1a 100644 --- a/kicad/xue-rnc/xue-rnc.net +++ b/kicad/xue-rnc/xue-rnc.net @@ -1,4 +1,4 @@ -# EESchema Netlist Version 1.1 created Mon 16 Aug 2010 07:01:48 PM COT +# EESchema Netlist Version 1.1 created Mon 16 Aug 2010 07:34:46 PM COT ( ( /4C4227FE/4C6969AB $noname C75 100nF {Lib=C} ( 1 GND ) @@ -36,7 +36,7 @@ ( 4 +3.3V ) ( 5 /Non_volatile_memories/SD_CLK ) ( 6 GND ) - ( 7 /Non_volatile_memories/SD_DAT0 ) + ( 7 /FPGA_Spartan6/SD_DAT0 ) ( 8 /FPGA_Spartan6/SD_DAT1 ) ) ( /4C4227FE/4B76F108 $noname U5 NAND {Lib=HY27UG088G5M} @@ -45,9 +45,9 @@ ( 3 ? ) ( 4 ? ) ( 5 ? ) - ( 6 /FPGA_Spartan6/NF_RNB ) - ( 7 /FPGA_Spartan6/NF_RNB ) - ( 8 /Non_volatile_memories/NF_RE_N ) + ( 6 /Non_volatile_memories/NF_RNB ) + ( 7 /Non_volatile_memories/NF_RNB ) + ( 8 /FPGA_Spartan6/NF_RE_N ) ( 9 /Non_volatile_memories/NF_CS1_N ) ( 10 ? ) ( 11 ? ) @@ -56,7 +56,7 @@ ( 14 ? ) ( 15 ? ) ( 16 /FPGA_Spartan6/NF_CLE ) - ( 17 /FPGA_Spartan6/NF_ALE ) + ( 17 /Non_volatile_memories/NF_ALE ) ( 18 /FPGA_Spartan6/NF_WE_N ) ( 19 +3.3V ) ( 20 ? ) @@ -70,7 +70,7 @@ ( 28 ? ) ( 29 /Non_volatile_memories/NF_D0 ) ( 30 /FPGA_Spartan6/NF_D1 ) - ( 31 /Non_volatile_memories/NF_D2 ) + ( 31 /FPGA_Spartan6/NF_D2 ) ( 32 /Non_volatile_memories/NF_D3 ) ( 33 ? ) ( 34 ? ) @@ -82,8 +82,8 @@ ( 40 ? ) ( 41 /Non_volatile_memories/NF_D4 ) ( 42 /FPGA_Spartan6/NF_D5 ) - ( 43 /Non_volatile_memories/NF_D6 ) - ( 44 /FPGA_Spartan6/NF_D7 ) + ( 43 /FPGA_Spartan6/NF_D6 ) + ( 44 /Non_volatile_memories/NF_D7 ) ( 45 ? ) ( 46 ? ) ( 47 ? ) @@ -98,8 +98,8 @@ ( 7 GND ) ( 8 GND ) ( 9 ? ) - ( 10 N-000356 ) - ( 11 N-000351 ) + ( 10 N-000372 ) + ( 11 N-000363 ) ( 12 +3.3V ) ( 14 +3.3V ) ) @@ -116,23 +116,23 @@ ( 2 GND ) ) ( /4C5F1EDC/4C6552BA $noname F2 MICROSMD075F {Lib=MICROSMD075F} - ( 1 N-000357 ) + ( 1 N-000374 ) ( 2 +5V ) ) ( /4C5F1EDC/4C6552B9 $noname V4 V0402MHS03 {Lib=V0402MHS03} - ( 1 N-000356 ) + ( 1 N-000372 ) ( 2 GND ) ) ( /4C5F1EDC/4C6552B8 $noname V3 V0402MHS03 {Lib=V0402MHS03} - ( 1 N-000351 ) + ( 1 N-000363 ) ( 2 GND ) ) ( /4C5F1EDC/4C6552B7 $noname C38 4.7nF {Lib=C} - ( 1 N-000359 ) + ( 1 N-000373 ) ( 2 GND ) ) ( /4C5F1EDC/4C6552B6 $noname R15 1M {Lib=R} - ( 1 N-000359 ) + ( 1 N-000373 ) ( 2 GND ) ) ( /4C5F1EDC/4C6552B1 0603 L7 FB {Lib=INDUCTOR} @@ -140,46 +140,46 @@ ( 2 GND ) ) ( /4C5F1EDC/4C6552B0 0603 L6 FB {Lib=INDUCTOR} - ( 1 N-000357 ) + ( 1 N-000374 ) ( 2 ? ) ) ( /4C5F1EDC/4C63F252 0603 L4 FB {Lib=INDUCTOR} - ( 1 N-000361 ) - ( 2 N-000346 ) + ( 1 N-000375 ) + ( 2 N-000360 ) ) ( /4C5F1EDC/4C63F248 0603 L5 FB {Lib=INDUCTOR} - ( 1 N-000349 ) + ( 1 N-000358 ) ( 2 GND ) ) ( /4C5F1EDC/4C5F2D27 $noname R10 1M {Lib=R} - ( 1 N-000347 ) + ( 1 N-000362 ) ( 2 GND ) ) ( /4C5F1EDC/4C5F2D1E $noname C16 4.7nF {Lib=C} - ( 1 N-000347 ) + ( 1 N-000362 ) ( 2 GND ) ) ( /4C5F1EDC/4C5F2CA7 $noname V1 V0402MHS03 {Lib=V0402MHS03} - ( 1 N-000344 ) + ( 1 N-000368 ) ( 2 GND ) ) ( /4C5F1EDC/4C5F2CA3 $noname V2 V0402MHS03 {Lib=V0402MHS03} - ( 1 N-000348 ) + ( 1 N-000359 ) ( 2 GND ) ) ( /4C5F1EDC/4C5F2B55 $noname F1 MICROSMD075F {Lib=MICROSMD075F} - ( 1 N-000361 ) + ( 1 N-000375 ) ( 2 +5V ) ) ( /4C5F1EDC/4C5F23DD $noname J5 USB-48204-0001 {Lib=USB-48204-0001} - ( S1 N-000347 ) - ( S2 N-000347 ) - ( S3 N-000347 ) - ( S4 N-000347 ) - ( 1 N-000346 ) - ( 2 N-000348 ) - ( 3 N-000344 ) - ( 4 N-000349 ) + ( S1 N-000362 ) + ( S2 N-000362 ) + ( S3 N-000362 ) + ( S4 N-000362 ) + ( 1 N-000360 ) + ( 2 N-000359 ) + ( 3 N-000368 ) + ( 4 N-000358 ) ) ( /4C5F1EDC/4C5F2039 $noname C15 470nF {Lib=C} ( 1 +2.5V ) @@ -195,26 +195,56 @@ ) ( /4C5F1EDC/4C5F2025 $noname U6 MIC2550AYTS {Lib=MIC2550AYTS} ( 1 +2.5V ) - ( 2 /USB/USBA_SPD ) + ( 2 /FPGA_Spartan6/USBA_SPD ) ( 3 /USB/USBA_RCV ) - ( 4 /FPGA_Spartan6/USBA_VP ) + ( 4 /USB/USBA_VP ) ( 5 /USB/USBA_VM ) ( 7 GND ) ( 8 GND ) - ( 9 /FPGA_Spartan6/USBA_OE_N ) - ( 10 N-000348 ) - ( 11 N-000344 ) + ( 9 /USB/USBA_OE_N ) + ( 10 N-000359 ) + ( 11 N-000368 ) ( 12 +3.3V ) ( 14 +3.3V ) ) + ( /4C431A63/4C69D3A9 $noname RP5 R_PACK4 {Lib=R_PACK4} + ( 1 /FPGA_Spartan6/R_M1_DQ0 ) + ( 2 /FPGA_Spartan6/R_M1_DQ1 ) + ( 3 /FPGA_Spartan6/R_M1_DQ2 ) + ( 4 /FPGA_Spartan6/R_M1_DQ3 ) + ( 5 /FPGA_Spartan6/M1_DQ3 ) + ( 6 /DDR_Banks/M1_DQ2 ) + ( 7 /DDR_Banks/M1_DQ1 ) + ( 8 /DDR_Banks/M1_DQ0 ) + ) + ( /4C431A63/4C69D3A4 $noname RP3 R_PACK4 {Lib=R_PACK4} + ( 1 ? ) + ( 2 /FPGA_Spartan6/R_M1_LDQS ) + ( 3 /FPGA_Spartan6/R_M1_LDM ) + ( 4 /FPGA_Spartan6/R_M1_WE# ) + ( 5 /DDR_Banks/M1_WE# ) + ( 6 /FPGA_Spartan6/M1_LDM ) + ( 7 /FPGA_Spartan6/M1_LDQS ) + ( 8 ? ) + ) + ( /4C431A63/4C69D3A3 $noname RP4 R_PACK4 {Lib=R_PACK4} + ( 1 /FPGA_Spartan6/R_M1_DQ4 ) + ( 2 /FPGA_Spartan6/R_M1_DQ5 ) + ( 3 /FPGA_Spartan6/R_M1_DQ6 ) + ( 4 /FPGA_Spartan6/R_M1_DQ7 ) + ( 5 /DDR_Banks/M1_DQ7 ) + ( 6 /FPGA_Spartan6/M1_DQ6 ) + ( 7 /FPGA_Spartan6/M1_DQ5 ) + ( 8 /FPGA_Spartan6/M1_DQ4 ) + ) ( /4C431A63/4C69CEE8 $noname RP2 R_PACK4 {Lib=R_PACK4} ( 1 /FPGA_Spartan6/R_M1_CAS# ) ( 2 /FPGA_Spartan6/R_M1_RAS# ) ( 3 /FPGA_Spartan6/R_M1_BA0 ) ( 4 /FPGA_Spartan6/R_M1_BA1 ) - ( 5 /DDR_Banks/M1_BA1 ) - ( 6 /DDR_Banks/M1_BA0 ) - ( 7 /FPGA_Spartan6/M1_RAS# ) + ( 5 /FPGA_Spartan6/M1_BA1 ) + ( 6 /FPGA_Spartan6/M1_BA0 ) + ( 7 /DDR_Banks/M1_RAS# ) ( 8 /DDR_Banks/M1_CAS# ) ) ( /4C431A63/4C69C6B2 $noname RP1 R_PACK4 {Lib=R_PACK4} @@ -223,9 +253,9 @@ ( 3 /FPGA_Spartan6/R_M1_A2 ) ( 4 /FPGA_Spartan6/R_M1_A3 ) ( 5 /FPGA_Spartan6/M1_A3 ) - ( 6 /DDR_Banks/M1_A2 ) - ( 7 /DDR_Banks/M1_A1 ) - ( 8 /FPGA_Spartan6/M1_A0 ) + ( 6 /FPGA_Spartan6/M1_A2 ) + ( 7 /FPGA_Spartan6/M1_A1 ) + ( 8 /DDR_Banks/M1_A0 ) ) ( /4C431A63/4C656D9D $noname C66 470nF {Lib=C} ( 1 +2.5V ) @@ -375,36 +405,36 @@ ( P5 ? ) ( N5 +2.5V ) ( M5 ? ) - ( K5 /FPGA_Spartan6/M0_RAS# ) + ( K5 /DDR_Banks/M0_RAS# ) ( J5 +2.5V ) ( H5 /FPGA_Spartan6/M0_A2 ) ( F5 ? ) ( E5 ? ) ( D5 ? ) ( U4 ? ) - ( K21 /FPGA_Spartan6/M1_DQ6 ) + ( K21 /FPGA_Spartan6/R_M1_DQ6 ) ( H21 /FPGA_Spartan6/R_M1_RAS# ) ( G21 +2.5V ) ( F21 /FPGA_Spartan6/R_M1_A0 ) - ( D21 /DDR_Banks/M1_CKE ) + ( D21 ? ) ( C21 +2.5V ) ( B21 ? ) ( A21 ? ) ( W20 ? ) ( V20 ? ) - ( U20 /FPGA_Spartan6/M1_DQ12 ) + ( U20 /DDR_Banks/M1_DQ12 ) ( T20 ? ) - ( R20 /DDR_Banks/M1_DQ10 ) + ( R20 /FPGA_Spartan6/M1_DQ10 ) ( P20 ? ) - ( N20 /DDR_Banks/M1_DQ0 ) + ( N20 /FPGA_Spartan6/R_M1_DQ0 ) ( M20 /DDR_Banks/M1_UDM ) - ( L20 /DDR_Banks/M1_LDQS ) - ( K20 /DDR_Banks/M1_A5 ) - ( J20 /FPGA_Spartan6/M1_DQ4 ) - ( H20 /FPGA_Spartan6/M1_CLK ) + ( L20 /FPGA_Spartan6/R_M1_LDQS ) + ( K20 /FPGA_Spartan6/M1_A5 ) + ( J20 /FPGA_Spartan6/R_M1_DQ4 ) + ( H20 /DDR_Banks/M1_CLK ) ( G20 /FPGA_Spartan6/R_M1_A3 ) ( F20 /FPGA_Spartan6/M1_A4 ) - ( E20 /FPGA_Spartan6/M1_A7 ) + ( E20 /DDR_Banks/M1_A7 ) ( D20 ? ) ( C20 /FPGA_Spartan6/M1_A8 ) ( B20 ? ) @@ -414,17 +444,17 @@ ( K8 ? ) ( Y2 ? ) ( W2 +2.5V ) - ( V2 /FPGA_Spartan6/M0_DQ14 ) - ( T2 /FPGA_Spartan6/M0_UDQS ) + ( V2 /DDR_Banks/M0_DQ14 ) + ( T2 /DDR_Banks/M0_UDQS ) ( R2 +2.5V ) - ( P2 /FPGA_Spartan6/M0_DQ8 ) + ( P2 /DDR_Banks/M0_DQ8 ) ( M2 /FPGA_Spartan6/M0_DQ2 ) ( L2 +2.5V ) - ( K2 /DDR_Banks/M0_DQ6 ) - ( H2 /DDR_Banks/M0_A0 ) + ( K2 /FPGA_Spartan6/M0_DQ6 ) + ( H2 /FPGA_Spartan6/M0_A0 ) ( G2 +2.5V ) ( F2 /DDR_Banks/M0_WE# ) - ( D2 /FPGA_Spartan6/M0_CKE ) + ( D2 /DDR_Banks/M0_CKE ) ( C2 +2.5V ) ( B2 ? ) ( A2 ? ) @@ -433,12 +463,12 @@ ( V1 /FPGA_Spartan6/M0_DQ15 ) ( U1 /FPGA_Spartan6/M0_DQ13 ) ( T1 ? ) - ( R1 /FPGA_Spartan6/M0_DQ11 ) + ( R1 /DDR_Banks/M0_DQ11 ) ( P1 /DDR_Banks/M0_DQ9 ) ( N1 /FPGA_Spartan6/M0_DQ1 ) ( M1 /FPGA_Spartan6/M0_DQ3 ) ( L1 ? ) - ( K1 /FPGA_Spartan6/M0_DQ7 ) + ( K1 /DDR_Banks/M0_DQ7 ) ( J1 /FPGA_Spartan6/M0_DQ5 ) ( H1 /FPGA_Spartan6/M0_A1 ) ( G1 /FPGA_Spartan6/M0_BA1 ) @@ -447,11 +477,11 @@ ( P4 ? ) ( N4 ? ) ( M4 ? ) - ( L4 /FPGA_Spartan6/M0_LDM ) + ( L4 /DDR_Banks/M0_LDM ) ( K4 /FPGA_Spartan6/M0_CAS# ) ( J4 /FPGA_Spartan6/M0_A6 ) ( H4 /FPGA_Spartan6/M0_CLK ) - ( G4 /DDR_Banks/M0_A10 ) + ( G4 /FPGA_Spartan6/M0_A10 ) ( F4 +2.5V ) ( E4 ? ) ( C4 ? ) @@ -459,80 +489,80 @@ ( V3 ? ) ( U3 /FPGA_Spartan6/M0_DQ12 ) ( T3 ? ) - ( R3 /DDR_Banks/M0_DQ10 ) + ( R3 /FPGA_Spartan6/M0_DQ10 ) ( P3 ? ) - ( N3 /FPGA_Spartan6/M0_DQ0 ) + ( N3 /DDR_Banks/M0_DQ0 ) ( M3 /DDR_Banks/M0_UDM ) - ( L3 /DDR_Banks/M0_LDQS ) + ( L3 /FPGA_Spartan6/M0_LDQS ) ( K3 /DDR_Banks/M0_A5 ) ( J3 /FPGA_Spartan6/M0_DQ4 ) ( H3 /FPGA_Spartan6/M0_CLK# ) ( G3 /DDR_Banks/M0_BA0 ) ( F3 /FPGA_Spartan6/M0_A4 ) - ( E3 /DDR_Banks/M0_A8 ) + ( E3 /FPGA_Spartan6/M0_A8 ) ( D3 ? ) ( C3 ? ) ( B3 ? ) ( G10 +3.3V ) - ( D10 /Ethernet_Phy/ETH_MDC ) - ( C10 /Ethernet_Phy/ETH_CRS ) + ( D10 /FPGA_Spartan6/ETH_MDC ) + ( C10 /FPGA_Spartan6/ETH_CRS ) ( B10 /Ethernet_Phy/ETH_COL ) - ( A10 /Ethernet_Phy/ETH_INT ) + ( A10 /FPGA_Spartan6/ETH_INT ) ( E9 +3.3V ) ( D9 /Ethernet_Phy/ETH_TXD0 ) ( C9 /Ethernet_Phy/ETH_TXD2 ) - ( A9 /FPGA_Spartan6/ETH_TXD3 ) - ( D8 /FPGA_Spartan6/ETH_RXC ) + ( A9 /Ethernet_Phy/ETH_TXD3 ) + ( D8 /Ethernet_Phy/ETH_RXC ) ( C8 /Ethernet_Phy/ETH_TXD1 ) ( B8 /Ethernet_Phy/ETH_TXER ) ( A8 /Ethernet_Phy/ETH_TXEN ) - ( D7 /FPGA_Spartan6/ETH_TXC ) - ( C7 /Ethernet_Phy/ETH_RXDV ) + ( D7 /Ethernet_Phy/ETH_TXC ) + ( C7 /FPGA_Spartan6/ETH_RXDV ) ( B7 +3.3V ) - ( A7 /Ethernet_Phy/ETH_RXER ) - ( D6 /FPGA_Spartan6/ETH_RXD3 ) + ( A7 /FPGA_Spartan6/ETH_RXER ) + ( D6 /Ethernet_Phy/ETH_RXD3 ) ( C6 /FPGA_Spartan6/ETH_RXD2 ) ( B6 /Ethernet_Phy/ETH_RXD1 ) - ( A6 /Ethernet_Phy/ETH_RXD0 ) + ( A6 /FPGA_Spartan6/ETH_RXD0 ) ( C5 /FPGA_Spartan6/ETH_MDIO ) ( A5 /FPGA_Spartan6/ETH_RESET_N ) ( B4 +3.3V ) - ( A4 /Ethernet_Phy/ETH_CLK ) + ( A4 /FPGA_Spartan6/ETH_CLK ) ( A3 ? ) ( U19 ? ) ( T19 ? ) - ( R19 /USB/USBA_SPD ) + ( R19 /FPGA_Spartan6/USBA_SPD ) ( P19 ? ) ( B19 +3.3V ) ( B18 /FPGA_Spartan6/SD_DAT1 ) - ( A18 /Non_volatile_memories/SD_DAT0 ) + ( A18 /FPGA_Spartan6/SD_DAT0 ) ( E17 +3.3V ) ( D17 /FPGA_Spartan6/SD_CMD ) ( C17 /FPGA_Spartan6/SD_DAT3 ) ( A17 /Non_volatile_memories/SD_DAT2 ) ( E16 /Non_volatile_memories/SD_CLK ) ( C16 /Non_volatile_memories/NF_CS1_N ) - ( B16 /Non_volatile_memories/NF_RE_N ) - ( A16 /FPGA_Spartan6/NF_RNB ) + ( B16 /FPGA_Spartan6/NF_RE_N ) + ( A16 /Non_volatile_memories/NF_RNB ) ( D15 /FPGA_Spartan6/NF_CLE ) ( C15 /FPGA_Spartan6/NF_WE_N ) ( B15 +3.3V ) - ( A15 /FPGA_Spartan6/NF_ALE ) + ( A15 /Non_volatile_memories/NF_ALE ) ( G14 +3.3V ) ( D14 /Non_volatile_memories/NF_D0 ) ( C14 ? ) ( B14 ? ) ( A14 ? ) ( E13 +3.3V ) - ( C13 /Non_volatile_memories/NF_D2 ) + ( C13 /FPGA_Spartan6/NF_D2 ) ( A13 /FPGA_Spartan6/NF_D1 ) ( C12 /FPGA_Spartan6/NF_D5 ) ( B12 /Non_volatile_memories/NF_D4 ) ( A12 /Non_volatile_memories/NF_D3 ) - ( D11 /Non_volatile_memories/NF_D6 ) + ( D11 /FPGA_Spartan6/NF_D6 ) ( C11 ? ) ( B11 +3.3V ) - ( A11 /FPGA_Spartan6/NF_D7 ) + ( A11 /Non_volatile_memories/NF_D7 ) ( J16 ? ) ( H16 ? ) ( G16 ? ) @@ -540,49 +570,49 @@ ( L15 ? ) ( W22 ? ) ( V22 /DDR_Banks/M1_DQ15 ) - ( U22 /DDR_Banks/M1_DQ13 ) + ( U22 /FPGA_Spartan6/M1_DQ13 ) ( T22 ? ) - ( R22 /DDR_Banks/M1_DQ11 ) + ( R22 /FPGA_Spartan6/M1_DQ11 ) ( P22 /FPGA_Spartan6/M1_DQ9 ) - ( N22 /FPGA_Spartan6/M1_DQ1 ) - ( M22 /DDR_Banks/M1_DQ3 ) + ( N22 /FPGA_Spartan6/R_M1_DQ1 ) + ( M22 /FPGA_Spartan6/R_M1_DQ3 ) ( L22 ? ) - ( K22 /FPGA_Spartan6/M1_DQ7 ) - ( J22 /FPGA_Spartan6/M1_DQ5 ) + ( K22 /FPGA_Spartan6/R_M1_DQ7 ) + ( J22 /FPGA_Spartan6/R_M1_DQ5 ) ( H22 /FPGA_Spartan6/R_M1_CAS# ) ( G22 ? ) ( F22 /FPGA_Spartan6/R_M1_A1 ) ( E22 /FPGA_Spartan6/R_M1_A2 ) - ( D22 /FPGA_Spartan6/M1_A12 ) - ( C22 /FPGA_Spartan6/M1_A9 ) + ( D22 /DDR_Banks/M1_A12 ) + ( C22 /DDR_Banks/M1_A9 ) ( B22 ? ) ( W21 +2.5V ) - ( V21 /FPGA_Spartan6/M1_DQ14 ) - ( T21 /FPGA_Spartan6/M1_UDQS ) + ( V21 /DDR_Banks/M1_DQ14 ) + ( T21 /DDR_Banks/M1_UDQS ) ( R21 +2.5V ) ( P21 /FPGA_Spartan6/M1_DQ8 ) - ( M21 /FPGA_Spartan6/M1_DQ2 ) + ( M21 /FPGA_Spartan6/R_M1_DQ2 ) ( L21 +2.5V ) ( N19 ? ) ( M19 ? ) - ( L19 /FPGA_Spartan6/M1_LDM ) - ( K19 /DDR_Banks/M1_A6 ) + ( L19 /FPGA_Spartan6/R_M1_LDM ) + ( K19 /FPGA_Spartan6/M1_A6 ) ( J19 /DDR_Banks/M1_CLK# ) - ( H19 /DDR_Banks/M1_WE# ) + ( H19 /FPGA_Spartan6/R_M1_WE# ) ( G19 /FPGA_Spartan6/M1_A10 ) - ( F19 /DDR_Banks/M1_A11 ) + ( F19 /FPGA_Spartan6/M1_A11 ) ( E19 +2.5V ) ( D19 ? ) ( C19 ? ) ( U18 +2.5V ) - ( P18 /FPGA_Spartan6/USBA_OE_N ) + ( P18 /USB/USBA_OE_N ) ( N18 +2.5V ) ( M18 /USB/USBA_VM ) ( K18 ? ) ( J18 +2.5V ) ( H18 ? ) ( F18 ? ) - ( P17 /FPGA_Spartan6/USBA_VP ) + ( P17 /USB/USBA_VP ) ( M17 ? ) ( L17 ? ) ( K17 /FPGA_Spartan6/R_M1_BA1 ) @@ -746,9 +776,9 @@ ( AB4 ? ) ( AA4 ? ) ( F1 ? ) - ( E1 /FPGA_Spartan6/M0_A9 ) + ( E1 /DDR_Banks/M0_A9 ) ( D1 /FPGA_Spartan6/M0_A12 ) - ( C1 /FPGA_Spartan6/M0_A11 ) + ( C1 /DDR_Banks/M0_A11 ) ( B1 ? ) ( AB19 ? ) ( AA19 VCCO2 ) @@ -890,7 +920,7 @@ ( 2 +3.3V ) ) ( /4C4320F3/4C5D7ECF $noname R2 6.65K {Lib=R} - ( 1 N-000331 ) + ( 1 N-000343 ) ( 2 GND ) ) ( /4C4320F3/4C5D7E43 $noname C11 100nF {Lib=C} @@ -902,167 +932,167 @@ ( 2 GND ) ) ( /4C4320F3/4C5D7DCB $noname C12 47nF {Lib=C} - ( 1 N-000332 ) + ( 1 N-000349 ) ( 2 GND ) ) ( /4C4320F3/4C5D7DC4 $noname R9 1M {Lib=R} - ( 1 N-000332 ) + ( 1 N-000349 ) ( 2 GND ) ) ( /4C4320F3/4C432132 $noname U4 K8001 {Lib=K8001} ( 1 /FPGA_Spartan6/ETH_MDIO ) - ( 2 /Ethernet_Phy/ETH_MDC ) - ( 3 /FPGA_Spartan6/ETH_RXD3 ) + ( 2 /FPGA_Spartan6/ETH_MDC ) + ( 3 /Ethernet_Phy/ETH_RXD3 ) ( 4 /FPGA_Spartan6/ETH_RXD2 ) ( 5 /Ethernet_Phy/ETH_RXD1 ) - ( 6 /Ethernet_Phy/ETH_RXD0 ) + ( 6 /FPGA_Spartan6/ETH_RXD0 ) ( 7 +3.3V ) ( 8 GND ) - ( 9 /Ethernet_Phy/ETH_RXDV ) - ( 10 /FPGA_Spartan6/ETH_RXC ) - ( 11 /Ethernet_Phy/ETH_RXER ) + ( 9 /FPGA_Spartan6/ETH_RXDV ) + ( 10 /Ethernet_Phy/ETH_RXC ) + ( 11 /FPGA_Spartan6/ETH_RXER ) ( 12 GND ) ( 13 +1.8V ) ( 14 /Ethernet_Phy/ETH_TXER ) - ( 15 /FPGA_Spartan6/ETH_TXC ) + ( 15 /Ethernet_Phy/ETH_TXC ) ( 16 /Ethernet_Phy/ETH_TXEN ) ( 17 /Ethernet_Phy/ETH_TXD0 ) ( 18 /Ethernet_Phy/ETH_TXD1 ) ( 19 /Ethernet_Phy/ETH_TXD2 ) - ( 20 /FPGA_Spartan6/ETH_TXD3 ) + ( 20 /Ethernet_Phy/ETH_TXD3 ) ( 21 /Ethernet_Phy/ETH_COL ) - ( 22 /Ethernet_Phy/ETH_CRS ) + ( 22 /FPGA_Spartan6/ETH_CRS ) ( 23 GND ) ( 24 +3.3V ) - ( 25 /Ethernet_Phy/ETH_INT ) + ( 25 /FPGA_Spartan6/ETH_INT ) ( 26 /Ethernet_Phy/ETH_LED0 ) ( 27 /Ethernet_Phy/ETH_LED1 ) ( 28 ? ) ( 29 ? ) ( 30 ? ) ( 31 /Ethernet_Phy/ETH_A1.8V ) - ( 32 N-000338 ) - ( 33 N-000334 ) + ( 32 N-000348 ) + ( 33 N-000350 ) ( 34 ? ) ( 35 GND ) ( 36 GND ) - ( 37 N-000331 ) + ( 37 N-000343 ) ( 38 /Ethernet_Phy/ETH_A3.3V ) ( 39 GND ) - ( 40 N-000323 ) - ( 41 N-000335 ) + ( 40 N-000342 ) + ( 41 N-000351 ) ( 42 ? ) ( 43 ? ) ( 44 GND ) ( 45 ? ) - ( 46 /Ethernet_Phy/ETH_CLK ) + ( 46 /FPGA_Spartan6/ETH_CLK ) ( 47 /Ethernet_Phy/ETH_PLL1.8V ) ( 48 /FPGA_Spartan6/ETH_RESET_N ) ) ( /4C4320F3/4C5D7AFE $noname R3 49.9 {Lib=R} ( 1 +3.3V ) - ( 2 N-000335 ) + ( 2 N-000351 ) ) ( /4C4320F3/4C5D7AFC $noname R4 49.9 {Lib=R} ( 1 +3.3V ) - ( 2 N-000323 ) + ( 2 N-000342 ) ) ( /4C4320F3/4C5D7AF9 $noname R6 49.9 {Lib=R} ( 1 +3.3V ) - ( 2 N-000338 ) + ( 2 N-000348 ) ) ( /4C4320F3/4C5D7AF7 $noname R5 49.9 {Lib=R} ( 1 +3.3V ) - ( 2 N-000334 ) + ( 2 N-000350 ) ) ( /4C4320F3/4C5D71DB $noname R8 220 {Lib=R} - ( 1 N-000325 ) + ( 1 N-000337 ) ( 2 /Ethernet_Phy/ETH_LED1 ) ) ( /4C4320F3/4C5D719D $noname R7 220 {Lib=R} - ( 1 N-000337 ) + ( 1 N-000347 ) ( 2 /Ethernet_Phy/ETH_LED0 ) ) ( /4C4320F3/4C5D6F5A $noname J4 RJ45-48025 {Lib=RJ45-48025} - ( 1 N-000335 ) - ( 2 N-000323 ) + ( 1 N-000351 ) + ( 2 N-000342 ) ( 3 +3.3V ) ( 4 GND ) ( 5 GND ) ( 6 +3.3V ) - ( 7 N-000334 ) - ( 8 N-000338 ) + ( 7 N-000350 ) + ( 8 N-000348 ) ( 9 +3.3V ) - ( 10 N-000337 ) + ( 10 N-000347 ) ( 11 +3.3V ) - ( 12 N-000325 ) - ( 13 N-000332 ) - ( 14 N-000332 ) + ( 12 N-000337 ) + ( 13 N-000349 ) + ( 14 N-000349 ) ) ( /4C421DD3/4C609C8E $noname U3 MT46V32M16TG {Lib=MT46V32M16TG} ( 1 +2.5V ) ( 2 /DDR_Banks/M1_DQ0 ) ( 3 +2.5V ) - ( 4 /FPGA_Spartan6/M1_DQ1 ) - ( 5 /FPGA_Spartan6/M1_DQ2 ) + ( 4 /DDR_Banks/M1_DQ1 ) + ( 5 /DDR_Banks/M1_DQ2 ) ( 6 GND ) - ( 7 /DDR_Banks/M1_DQ3 ) + ( 7 /FPGA_Spartan6/M1_DQ3 ) ( 8 /FPGA_Spartan6/M1_DQ4 ) ( 9 +2.5V ) ( 10 /FPGA_Spartan6/M1_DQ5 ) ( 11 /FPGA_Spartan6/M1_DQ6 ) ( 12 GND ) - ( 13 /FPGA_Spartan6/M1_DQ7 ) + ( 13 /DDR_Banks/M1_DQ7 ) ( 14 ? ) ( 15 +2.5V ) - ( 16 /DDR_Banks/M1_LDQS ) + ( 16 /FPGA_Spartan6/M1_LDQS ) ( 17 ? ) ( 18 +2.5V ) ( 19 ? ) ( 20 /FPGA_Spartan6/M1_LDM ) ( 21 /DDR_Banks/M1_WE# ) ( 22 /DDR_Banks/M1_CAS# ) - ( 23 /FPGA_Spartan6/M1_RAS# ) + ( 23 /DDR_Banks/M1_RAS# ) ( 24 GND ) ( 25 ? ) - ( 26 /DDR_Banks/M1_BA0 ) - ( 27 /DDR_Banks/M1_BA1 ) + ( 26 /FPGA_Spartan6/M1_BA0 ) + ( 27 /FPGA_Spartan6/M1_BA1 ) ( 28 /FPGA_Spartan6/M1_A10 ) - ( 29 /FPGA_Spartan6/M1_A0 ) - ( 30 /DDR_Banks/M1_A1 ) - ( 31 /DDR_Banks/M1_A2 ) + ( 29 /DDR_Banks/M1_A0 ) + ( 30 /FPGA_Spartan6/M1_A1 ) + ( 31 /FPGA_Spartan6/M1_A2 ) ( 32 /FPGA_Spartan6/M1_A3 ) ( 33 +2.5V ) ( 34 GND ) ( 35 /FPGA_Spartan6/M1_A4 ) - ( 36 /DDR_Banks/M1_A5 ) - ( 37 /DDR_Banks/M1_A6 ) - ( 38 /FPGA_Spartan6/M1_A7 ) + ( 36 /FPGA_Spartan6/M1_A5 ) + ( 37 /FPGA_Spartan6/M1_A6 ) + ( 38 /DDR_Banks/M1_A7 ) ( 39 /FPGA_Spartan6/M1_A8 ) - ( 40 /FPGA_Spartan6/M1_A9 ) - ( 41 /DDR_Banks/M1_A11 ) - ( 42 /FPGA_Spartan6/M1_A12 ) + ( 40 /DDR_Banks/M1_A9 ) + ( 41 /FPGA_Spartan6/M1_A11 ) + ( 42 /DDR_Banks/M1_A12 ) ( 43 ? ) ( 44 /DDR_Banks/M1_CLK# ) - ( 45 /DDR_Banks/M1_CKE ) - ( 46 /FPGA_Spartan6/M1_CLK ) + ( 45 ? ) + ( 46 /DDR_Banks/M1_CLK ) ( 47 /DDR_Banks/M1_UDM ) ( 48 GND ) ( 49 N-000057 ) ( 50 ? ) - ( 51 /FPGA_Spartan6/M1_UDQS ) + ( 51 /DDR_Banks/M1_UDQS ) ( 52 GND ) ( 53 ? ) ( 54 /FPGA_Spartan6/M1_DQ8 ) ( 55 +2.5V ) ( 56 /FPGA_Spartan6/M1_DQ9 ) - ( 57 /DDR_Banks/M1_DQ10 ) + ( 57 /FPGA_Spartan6/M1_DQ10 ) ( 58 GND ) - ( 59 /DDR_Banks/M1_DQ11 ) - ( 60 /FPGA_Spartan6/M1_DQ12 ) + ( 59 /FPGA_Spartan6/M1_DQ11 ) + ( 60 /DDR_Banks/M1_DQ12 ) ( 61 +2.5V ) - ( 62 /DDR_Banks/M1_DQ13 ) - ( 63 /FPGA_Spartan6/M1_DQ14 ) + ( 62 /FPGA_Spartan6/M1_DQ13 ) + ( 63 /DDR_Banks/M1_DQ14 ) ( 64 GND ) ( 65 /DDR_Banks/M1_DQ15 ) ( 66 GND ) @@ -1165,7 +1195,7 @@ ) ( /4C421DD3/4C609B99 $noname U2 MT46V32M16TG {Lib=MT46V32M16TG} ( 1 +2.5V ) - ( 2 /FPGA_Spartan6/M0_DQ0 ) + ( 2 /DDR_Banks/M0_DQ0 ) ( 3 +2.5V ) ( 4 /FPGA_Spartan6/M0_DQ1 ) ( 5 /FPGA_Spartan6/M0_DQ2 ) @@ -1174,25 +1204,25 @@ ( 8 /FPGA_Spartan6/M0_DQ4 ) ( 9 +2.5V ) ( 10 /FPGA_Spartan6/M0_DQ5 ) - ( 11 /DDR_Banks/M0_DQ6 ) + ( 11 /FPGA_Spartan6/M0_DQ6 ) ( 12 GND ) - ( 13 /FPGA_Spartan6/M0_DQ7 ) + ( 13 /DDR_Banks/M0_DQ7 ) ( 14 ? ) ( 15 +2.5V ) - ( 16 /DDR_Banks/M0_LDQS ) + ( 16 /FPGA_Spartan6/M0_LDQS ) ( 17 ? ) ( 18 +2.5V ) ( 19 ? ) - ( 20 /FPGA_Spartan6/M0_LDM ) + ( 20 /DDR_Banks/M0_LDM ) ( 21 /DDR_Banks/M0_WE# ) ( 22 /FPGA_Spartan6/M0_CAS# ) - ( 23 /FPGA_Spartan6/M0_RAS# ) + ( 23 /DDR_Banks/M0_RAS# ) ( 24 GND ) ( 25 ? ) ( 26 /DDR_Banks/M0_BA0 ) ( 27 /FPGA_Spartan6/M0_BA1 ) - ( 28 /DDR_Banks/M0_A10 ) - ( 29 /DDR_Banks/M0_A0 ) + ( 28 /FPGA_Spartan6/M0_A10 ) + ( 29 /FPGA_Spartan6/M0_A0 ) ( 30 /FPGA_Spartan6/M0_A1 ) ( 31 /FPGA_Spartan6/M0_A2 ) ( 32 /FPGA_Spartan6/M0_A3 ) @@ -1202,31 +1232,31 @@ ( 36 /DDR_Banks/M0_A5 ) ( 37 /FPGA_Spartan6/M0_A6 ) ( 38 /FPGA_Spartan6/M0_A7 ) - ( 39 /DDR_Banks/M0_A8 ) - ( 40 /FPGA_Spartan6/M0_A9 ) - ( 41 /FPGA_Spartan6/M0_A11 ) + ( 39 /FPGA_Spartan6/M0_A8 ) + ( 40 /DDR_Banks/M0_A9 ) + ( 41 /DDR_Banks/M0_A11 ) ( 42 /FPGA_Spartan6/M0_A12 ) ( 43 ? ) ( 44 /FPGA_Spartan6/M0_CLK# ) - ( 45 /FPGA_Spartan6/M0_CKE ) + ( 45 /DDR_Banks/M0_CKE ) ( 46 /FPGA_Spartan6/M0_CLK ) ( 47 /DDR_Banks/M0_UDM ) ( 48 GND ) ( 49 N-000058 ) ( 50 ? ) - ( 51 /FPGA_Spartan6/M0_UDQS ) + ( 51 /DDR_Banks/M0_UDQS ) ( 52 GND ) ( 53 ? ) - ( 54 /FPGA_Spartan6/M0_DQ8 ) + ( 54 /DDR_Banks/M0_DQ8 ) ( 55 +2.5V ) ( 56 /DDR_Banks/M0_DQ9 ) - ( 57 /DDR_Banks/M0_DQ10 ) + ( 57 /FPGA_Spartan6/M0_DQ10 ) ( 58 GND ) - ( 59 /FPGA_Spartan6/M0_DQ11 ) + ( 59 /DDR_Banks/M0_DQ11 ) ( 60 /FPGA_Spartan6/M0_DQ12 ) ( 61 +2.5V ) ( 62 /FPGA_Spartan6/M0_DQ13 ) - ( 63 /FPGA_Spartan6/M0_DQ14 ) + ( 63 /DDR_Banks/M0_DQ14 ) ( 64 GND ) ( 65 /FPGA_Spartan6/M0_DQ15 ) ( 66 GND ) @@ -1703,56 +1733,56 @@ $endfootprintlist } { Pin List by Nets Net 1 "/FPGA Spartan6/PROG_CSO" "PROG_CSO" - U8 1 U1 T5 -Net 2 "/Non volatile memories/NF_RE_N" "NF_RE_N" + U8 1 +Net 2 "/FPGA Spartan6/NF_RE_N" "NF_RE_N" U1 B16 U5 8 Net 3 "/Non volatile memories/NF_CS1_N" "NF_CS1_N" - U1 C16 U5 9 -Net 4 "/FPGA Spartan6/NF_ALE" "NF_ALE" - U5 17 + U1 C16 +Net 4 "/Non volatile memories/NF_ALE" "NF_ALE" U1 A15 -Net 5 "/FPGA Spartan6/ETH_TXC" "ETH_TXC" + U5 17 +Net 5 "/Ethernet Phy/ETH_TXC" "ETH_TXC" U4 15 U1 D7 -Net 6 "/FPGA Spartan6/ETH_RXC" "ETH_RXC" - U4 10 +Net 6 "/Ethernet Phy/ETH_RXC" "ETH_RXC" U1 D8 -Net 7 "/Ethernet Phy/ETH_CLK" "ETH_CLK" + U4 10 +Net 7 "/FPGA Spartan6/ETH_CLK" "ETH_CLK" U4 46 U1 A4 -Net 8 "/USB/USBA_SPD" "USBA_SPD" - U1 R19 +Net 8 "/FPGA Spartan6/USBA_SPD" "USBA_SPD" U6 2 -Net 9 "/FPGA Spartan6/USBA_OE_N" "USBA_OE_N" + U1 R19 +Net 9 "/USB/USBA_OE_N" "USBA_OE_N" U1 P18 U6 9 Net 10 "/USB/USBA_RCV" "USBA_RCV" U6 3 U1 N16 -Net 11 "/FPGA Spartan6/USBA_VP" "USBA_VP" +Net 11 "/USB/USBA_VP" "USBA_VP" U1 P17 U6 4 Net 12 "/USB/USBA_VM" "USBA_VM" U6 5 U1 M18 Net 13 "/Ethernet Phy/ETH_COL" "ETH_COL" - U4 21 U1 B10 -Net 14 "/Ethernet Phy/ETH_CRS" "ETH_CRS" - U1 C10 + U4 21 +Net 14 "/FPGA Spartan6/ETH_CRS" "ETH_CRS" U4 22 + U1 C10 Net 15 "/Non volatile memories/SD_CLK" "SD_CLK" J1 5 U1 E16 -Net 16 "/Ethernet Phy/ETH_INT" "ETH_INT" - U4 25 +Net 16 "/FPGA Spartan6/ETH_INT" "ETH_INT" U1 A10 -Net 17 "/Ethernet Phy/ETH_MDC" "ETH_MDC" - U1 D10 + U4 25 +Net 17 "/FPGA Spartan6/ETH_MDC" "ETH_MDC" U4 2 + U1 D10 Net 18 "/FPGA Spartan6/ETH_MDIO" "ETH_MDIO" U1 C5 U4 1 @@ -1760,119 +1790,77 @@ Net 18 "/FPGA Spartan6/ETH_MDIO" "ETH_MDIO" Net 19 "/FPGA Spartan6/ETH_RESET_N" "ETH_RESET_N" U1 A5 U4 48 -Net 20 "/Ethernet Phy/ETH_RXDV" "ETH_RXDV" +Net 20 "/FPGA Spartan6/ETH_RXDV" "ETH_RXDV" U1 C7 U4 9 -Net 21 "/Ethernet Phy/ETH_RXER" "ETH_RXER" +Net 21 "/FPGA Spartan6/ETH_RXER" "ETH_RXER" U1 A7 U4 11 Net 22 "/Ethernet Phy/ETH_TXER" "ETH_TXER" - U4 14 U1 B8 + U4 14 Net 23 "/Ethernet Phy/ETH_TXEN" "ETH_TXEN" - U4 16 U1 A8 + U4 16 Net 24 "/DDR Banks/M1_UDM" "M1_UDM" U1 M20 U3 47 -Net 25 "/DDR Banks/M1_LDQS" "M1_LDQS" +Net 25 "/FPGA Spartan6/M1_LDQS" "M1_LDQS" + RP3 7 U3 16 - U1 L20 Net 26 "/FPGA Spartan6/M1_LDM" "M1_LDM" U3 20 - U1 L19 -Net 27 "/FPGA Spartan6/M1_UDQS" "M1_UDQS" + RP3 6 +Net 27 "/DDR Banks/M1_UDQS" "M1_UDQS" U1 T21 U3 51 -Net 28 "/FPGA Spartan6/M0_UDQS" "M0_UDQS" +Net 28 "/DDR Banks/M0_UDQS" "M0_UDQS" U1 T2 U2 51 -Net 29 "/FPGA Spartan6/M0_LDM" "M0_LDM" - U1 L4 +Net 29 "/DDR Banks/M0_LDM" "M0_LDM" U2 20 + U1 L4 Net 30 "/DDR Banks/M1_CAS#" "M1_CAS#" U3 22 RP2 8 -Net 31 "/DDR Banks/M1_CKE" "M1_CKE" - U3 45 - U1 D21 -Net 32 "/FPGA Spartan6/M1_CLK" "M1_CLK" - U3 46 +Net 32 "/DDR Banks/M1_CLK" "M1_CLK" U1 H20 + U3 46 Net 33 "/DDR Banks/M1_CLK#" "M1_CLK#" U3 44 U1 J19 Net 34 "GND" "GND" - C34 2 - U2 34 - C70 2 - C71 2 - U4 23 - U4 44 - U4 35 - U4 36 - C10 2 - C11 2 - R9 2 - C12 2 - C8 2 - C7 2 - C5 2 - C3 2 - C1 2 - C29 2 - C28 2 - C33 2 - C22 2 - U2 58 - C23 2 - C25 2 - C24 2 - C26 2 - C21 2 - R2 2 - U4 8 - U4 12 - U2 48 - C27 2 - C32 2 - C30 2 - C31 2 - U1 J21 - U1 N21 - U1 U21 - U1 AB1 - U1 K12 - U1 M12 - C2 2 - U1 K10 - C4 2 + U1 M14 + U1 P14 + U1 V14 + U1 E15 + U1 J15 + C75 1 C74 2 + U8 4 + C73 2 + C72 2 + J1 CASE + J1 CASE + J1 CASE + U2 6 + R14 2 + R12 2 + C20 2 + C18 2 + U2 64 + U2 66 + U2 12 + U2 52 + U2 24 + U2 34 + U5 36 + U5 13 + J1 6 + J1 COM + U1 K10 U1 M10 U1 P10 - U1 V10 - C75 1 - U1 E11 - U1 J11 - U1 L11 - U1 K14 - C72 2 - C73 2 - U1 N11 - U1 E21 - U8 4 - U1 AA17 - U1 AA13 - U1 AB22 - U1 AA9 - U1 W19 - U1 R18 - U1 L18 - U1 G18 - U1 D18 - U1 N17 - U1 B17 - U1 A1 U1 E2 U1 J2 U1 N2 @@ -1883,21 +1871,6 @@ Net 34 "GND" "GND" U1 G5 U1 L5 U1 R5 - C6 2 - C9 2 - U1 M14 - U1 P14 - U1 V14 - U1 E15 - U1 J15 - U1 AA5 - U1 W16 - U1 P12 - U1 A22 - U1 B13 - U1 J13 - U1 L13 - U1 N13 U1 E7 U1 H7 U1 U7 @@ -1906,123 +1879,177 @@ Net 34 "GND" "GND" U1 J9 U1 L9 U1 N9 - J1 CASE - J1 CASE - J1 CASE - J1 COM - J1 6 - U2 24 - U2 52 - U2 12 - U2 66 - U2 64 - C18 2 - C20 2 - R12 2 - R14 2 - U2 6 - U5 13 - U5 36 - C64 2 - C61 2 - L7 2 - C48 2 - C45 2 - C42 2 - C39 2 - C40 2 - U3 66 - C58 2 - C55 2 - C44 2 - C41 2 - C68 2 - U3 12 - U3 64 - U3 34 - U3 24 - U3 52 - C50 2 - U3 58 - U3 48 - C47 2 + U1 A1 + U1 AA5 + U1 W16 + U1 B17 + U1 N17 + U1 D18 + U1 G18 + U1 L18 + U1 R18 + U1 W19 + U1 AA9 + U1 AB22 + U1 AA13 + U1 AA17 + U1 N13 + U1 K14 + U1 K12 + U1 M12 + U1 P12 + U1 A22 + U1 B13 + U1 J13 + U1 L13 + U1 V10 + U1 E11 + U1 J11 + U1 L11 + U1 N11 + U1 E21 + U1 J21 + U1 N21 + U1 U21 + U1 AB1 + C9 2 + C6 2 + C4 2 + C2 2 + U4 8 + U4 12 + U4 23 + R2 2 + C11 2 + C10 2 + C12 2 + R9 2 + U6 7 + U6 8 + R10 2 + C16 2 + V1 2 + V2 2 + U4 44 + U4 35 + U4 36 + U4 39 + J4 5 + J4 4 + C8 2 + C7 2 + C5 2 + C3 2 + C1 2 + L5 2 + C35 2 + C36 2 + C37 2 V4 2 V3 2 C38 2 R15 2 U7 8 - L5 2 - C37 2 - C36 2 - C35 2 - C54 2 - C16 2 - C69 2 - C66 2 - V2 2 - C43 2 - C63 2 - C60 2 - C57 2 - V1 2 - U4 39 - J4 5 - J4 4 - C67 2 - R10 2 - U6 8 - U6 7 - C49 2 - C51 2 - C13 2 - C53 2 - C56 2 - C59 2 - C14 2 - U3 6 + L7 2 C15 2 + C14 2 + C13 2 U7 7 - C62 2 - C65 2 + C40 2 + C43 2 C52 2 C46 2 + C49 2 + C51 2 + C53 2 + C41 2 + C50 2 + C56 2 + C59 2 + C62 2 + C65 2 + C68 2 + C55 2 + C58 2 + C44 2 + C39 2 + C42 2 + C45 2 + C48 2 + C61 2 + C64 2 + C67 2 + C69 2 + C54 2 + C57 2 + C60 2 + C63 2 + C66 2 + C47 2 + C27 2 + C32 2 + C30 2 + C31 2 + U3 12 + C22 2 + C23 2 + C25 2 + C24 2 + C26 2 + C21 2 + C29 2 + C28 2 + U3 6 + C33 2 + U3 52 + C70 2 + U3 64 + U2 48 + C34 2 + U3 34 + U3 24 + C71 2 + U2 58 + U3 66 + U3 48 + U3 58 Net 35 "/FPGA Spartan6/M0_CLK#" "M0_CLK#" U2 44 U1 H3 Net 36 "/FPGA Spartan6/M0_CLK" "M0_CLK" U2 46 U1 H4 -Net 37 "/FPGA Spartan6/M0_CKE" "M0_CKE" +Net 37 "/DDR Banks/M0_CKE" "M0_CKE" U1 D2 U2 45 Net 38 "/FPGA Spartan6/M0_CAS#" "M0_CAS#" - U2 22 U1 K4 + U2 22 Net 39 "/DDR Banks/M1_WE#" "M1_WE#" - U1 H19 + RP3 5 U3 21 -Net 40 "/FPGA Spartan6/M1_RAS#" "M1_RAS#" +Net 40 "/DDR Banks/M1_RAS#" "M1_RAS#" RP2 7 U3 23 -Net 41 "/FPGA Spartan6/M0_RAS#" "M0_RAS#" - U2 23 +Net 41 "/DDR Banks/M0_RAS#" "M0_RAS#" U1 K5 + U2 23 Net 42 "/DDR Banks/M0_WE#" "M0_WE#" U2 21 U1 F2 -Net 43 "/DDR Banks/M0_LDQS" "M0_LDQS" - U1 L3 +Net 43 "/FPGA Spartan6/M0_LDQS" "M0_LDQS" U2 16 + U1 L3 Net 44 "/DDR Banks/M0_UDM" "M0_UDM" - U1 M3 U2 47 + U1 M3 Net 45 "/FPGA Spartan6/PROG_CCLK" "PROG_CCLK" U1 AA21 U8 6 -Net 46 "/FPGA Spartan6/NF_RNB" "NF_RNB" +Net 46 "/Non volatile memories/NF_RNB" "NF_RNB" + U5 6 U1 A16 U5 7 - U5 6 Net 47 "/FPGA Spartan6/NF_WE_N" "NF_WE_N" U1 C15 U5 18 @@ -2033,581 +2060,614 @@ Net 49 "/FPGA Spartan6/SD_CMD" "SD_CMD" U1 D17 J1 3 Net 55 "+2.5V" "+2.5V" - C51 1 - U1 L8 - U1 R10 - U1 V6 - C40 1 - C49 1 - C46 1 - U1 N8 - U1 G12 - U1 R6 - C43 1 U1 R2 U1 L2 U1 G2 - U1 M15 - U1 K15 - U1 D16 - C53 1 - U1 U11 U1 F11 - U1 H9 U1 C2 - C52 1 - U1 H15 + U1 U11 + C46 1 + U1 L16 U1 R12 - U1 W21 - C56 1 - C59 1 - C62 1 + U1 W2 + U1 U5 + U1 F6 + U1 L7 + U1 F4 + U3 55 + C68 1 C65 1 + C53 1 U1 C21 U1 G21 U1 L21 U1 R21 + C51 1 + U1 W21 + U3 1 + C49 1 U1 J18 U1 N18 - C68 1 U1 U18 - U1 W2 - U1 F4 - U1 L16 U1 E19 C63 1 + U3 15 + U1 R10 + U1 H9 + U1 N8 C60 1 + C40 1 C57 1 C54 1 - C66 1 - U1 J5 - U1 L7 - U1 F6 - U1 U5 - U1 N5 - U3 55 - U3 1 - R11 1 - C34 1 - C71 1 - C70 1 - U3 61 - C15 1 - U3 9 - U2 1 - U2 3 - U3 15 - C17 1 U3 33 + C43 1 + U1 J5 + U1 G12 + C62 1 + U1 L8 + U1 N5 + C59 1 + U1 V6 + C56 1 U3 18 - R13 1 - C19 1 + C66 1 + U1 R6 + C52 1 + U3 9 U3 3 - U6 1 - C21 1 - C26 1 - C24 1 - C25 1 - C23 1 - C22 1 + U3 61 C33 1 - C37 1 C28 1 + R11 1 C29 1 - U2 33 - U2 61 - U2 18 - U2 9 - U7 1 + C19 1 + C31 1 C30 1 C32 1 C27 1 + U7 1 + C37 1 + U2 1 + U2 3 + U2 9 + C21 1 + C26 1 + U6 1 + C24 1 + C25 1 + R13 1 + C23 1 + C22 1 + U2 61 + C34 1 + U2 18 + U1 M15 + U2 33 + U1 K15 + C71 1 + C15 1 U2 55 + U1 H15 + C17 1 + U1 D16 U2 15 - C31 1 + C70 1 Net 57 "" "" - R14 1 - R13 2 - C20 1 - C19 2 U3 49 + R13 2 + R14 1 + C19 2 + C20 1 Net 58 "" "" - R12 1 U2 49 + C17 2 R11 2 C18 1 - C17 2 + R12 1 Net 97 "+3.3V" "+3.3V" - J1 4 - C14 1 - C13 1 - C41 1 - C44 1 - C47 1 - C50 1 - U7 12 - U7 14 - C35 1 - C36 1 - L2 1 - C5 1 - C3 1 - C1 1 - U4 24 - U4 7 - U6 12 - U6 14 - R5 1 R3 1 + C50 1 + J4 11 + C47 1 R4 1 R6 1 - J4 9 - J4 6 + C72 1 + C44 1 + C73 1 + C5 1 + L2 1 J4 3 - J4 11 - R1 2 - C11 1 - C10 1 - U1 B7 + J4 6 + J4 9 + C41 1 + R5 1 + C14 1 C74 1 C75 2 - U1 B4 U1 E13 - U1 B11 - U1 G10 - U1 E9 - U1 G14 - U1 B15 - C72 1 - C73 1 - U1 E17 + U6 14 + U6 12 + U4 7 U1 B19 + U1 E17 + C11 1 U5 12 + C10 1 + U4 24 U5 19 U5 37 + C36 1 + U1 B15 + U1 G14 + J1 4 + U1 B11 + U1 G10 + C1 1 + U7 12 + C3 1 + U1 E9 + C13 1 + U1 B7 + U1 B4 + R1 2 + U7 14 + C35 1 Net 98 "VCCO2" "VCCO2" - U1 T13 + C64 1 + C61 1 + U1 V12 + U1 T9 + C69 1 + U8 8 + C55 1 + C58 1 + U1 V8 + C67 1 + U1 W5 + U1 AA15 + U1 AA11 U1 AA19 U1 AA3 - U8 8 + U1 T13 U1 AA7 - C58 1 - C61 1 - C64 1 - U1 W5 - C67 1 - U1 V12 - U1 V8 - U1 AA11 - U1 T9 U1 V16 - C55 1 - C69 1 - U1 AA15 -Net 241 "/FPGA Spartan6/R_M1_RAS#" "R_M1_RAS#" - U1 H21 - RP2 2 -Net 242 "/FPGA Spartan6/R_M1_CAS#" "R_M1_CAS#" - RP2 1 - U1 H22 +Net 238 "/FPGA Spartan6/R_M1_LDM" "R_M1_LDM" + U1 L19 + RP3 3 +Net 240 "/FPGA Spartan6/R_M1_LDQS" "R_M1_LDQS" + U1 L20 + RP3 2 +Net 241 "/FPGA Spartan6/R_M1_WE#" "R_M1_WE#" + U1 H19 + RP3 4 Net 243 "/FPGA Spartan6/R_M1_BA1" "R_M1_BA1" RP2 4 U1 K17 -Net 256 "/FPGA Spartan6/R_M1_A3" "R_M1_A3" +Net 244 "/FPGA Spartan6/R_M1_RAS#" "R_M1_RAS#" + U1 H21 + RP2 2 +Net 296 "/FPGA Spartan6/R_M1_DQ7" "R_M1_DQ7" + RP4 4 + U1 K22 +Net 297 "/FPGA Spartan6/R_M1_DQ5" "R_M1_DQ5" + RP4 2 + U1 J22 +Net 306 "/FPGA Spartan6/R_M1_BA0" "R_M1_BA0" + U1 J17 + RP2 3 +Net 313 "/FPGA Spartan6/R_M1_A3" "R_M1_A3" U1 G20 RP1 4 -Net 308 "/FPGA Spartan6/R_M1_A0" "R_M1_A0" - U1 F21 - RP1 1 -Net 318 "/FPGA Spartan6/R_M1_A1" "R_M1_A1" +Net 320 "/FPGA Spartan6/R_M1_A1" "R_M1_A1" RP1 2 U1 F22 -Net 319 "/FPGA Spartan6/R_M1_A2" "R_M1_A2" +Net 321 "/FPGA Spartan6/R_M1_A2" "R_M1_A2" U1 E22 RP1 3 -Net 321 "+1.2V" "+1.2V" - U1 K9 - C45 1 - C39 1 - C42 1 - U1 M9 - C48 1 - U1 K13 - U1 M13 - U1 P13 +Net 323 "/FPGA Spartan6/R_M1_DQ6" "R_M1_DQ6" + U1 K21 + RP4 3 +Net 324 "/FPGA Spartan6/R_M1_A0" "R_M1_A0" + RP1 1 + U1 F21 +Net 328 "+1.2V" "+1.2V" U1 J14 - U1 P11 - U1 M11 + U1 P13 U1 J12 U1 L12 U1 N12 - U1 P9 - U1 J10 U1 J8 - U1 L10 + U1 K13 U1 N10 - U1 N14 - U1 R14 - U1 L14 + U1 L10 + U1 J10 + U1 P9 + U1 M9 U1 K11 -Net 322 "/FPGA Spartan6/R_M1_BA0" "R_M1_BA0" - RP2 3 - U1 J17 -Net 323 "" "" - J4 2 - U4 40 - R4 2 -Net 324 "/Ethernet Phy/ETH_LED1" "ETH_LED1" + U1 M11 + U1 K9 + U1 P11 + U1 L14 + C39 1 + C42 1 + U1 N14 + C45 1 + C48 1 + U1 M13 + U1 R14 +Net 330 "/FPGA Spartan6/R_M1_DQ4" "R_M1_DQ4" + U1 J20 + RP4 1 +Net 331 "/FPGA Spartan6/R_M1_CAS#" "R_M1_CAS#" + U1 H22 + RP2 1 +Net 332 "/FPGA Spartan6/R_M1_DQ0" "R_M1_DQ0" + U1 N20 + RP5 1 +Net 333 "/FPGA Spartan6/R_M1_DQ1" "R_M1_DQ1" + RP5 2 + U1 N22 +Net 334 "/FPGA Spartan6/R_M1_DQ2" "R_M1_DQ2" + RP5 3 + U1 M21 +Net 335 "/FPGA Spartan6/R_M1_DQ3" "R_M1_DQ3" + RP5 4 + U1 M22 +Net 337 "" "" + R8 1 + J4 12 +Net 338 "/Ethernet Phy/ETH_LED1" "ETH_LED1" U4 27 R8 2 -Net 325 "" "" - J4 12 - R8 1 -Net 328 "/Ethernet Phy/ETH_PLL1.8V" "ETH_PLL1.8V" - C9 1 - L3 2 +Net 341 "/Ethernet Phy/ETH_PLL1.8V" "ETH_PLL1.8V" U4 47 -Net 329 "/Ethernet Phy/ETH_A1.8V" "ETH_A1.8V" - C6 1 - U4 31 - L3 1 - L1 2 -Net 330 "+1.8V" "+1.8V" - C2 1 - U4 13 - L1 1 - C4 1 -Net 331 "" "" + L3 2 + C9 1 +Net 342 "" "" + U4 40 + J4 2 + R4 2 +Net 343 "" "" R2 1 U4 37 -Net 332 "" "" - J4 14 - J4 13 - R9 1 - C12 1 -Net 333 "/Ethernet Phy/ETH_A3.3V" "ETH_A3.3V" - U4 38 +Net 344 "/Ethernet Phy/ETH_A1.8V" "ETH_A1.8V" + U4 31 + L3 1 + C6 1 + L1 2 +Net 345 "+1.8V" "+1.8V" + L1 1 + C2 1 + C4 1 + U4 13 +Net 346 "/Ethernet Phy/ETH_A3.3V" "ETH_A3.3V" C7 1 C8 1 L2 2 -Net 334 "" "" - R5 2 - U4 33 - J4 7 -Net 335 "" "" - U4 41 - R3 2 - J4 1 -Net 336 "/Ethernet Phy/ETH_LED0" "ETH_LED0" - U4 26 - R7 2 -Net 337 "" "" + U4 38 +Net 347 "" "" J4 10 R7 1 -Net 338 "" "" +Net 348 "" "" U4 32 R6 2 J4 8 -Net 344 "" "" - J5 3 - U6 11 - V1 1 - V1 1 -Net 345 "+5V" "+5V" - F2 2 - F1 2 -Net 346 "" "" +Net 349 "" "" + J4 13 + J4 14 + R9 1 + C12 1 +Net 350 "" "" + R5 2 + U4 33 + J4 7 +Net 351 "" "" + R3 2 + U4 41 + J4 1 +Net 352 "/Ethernet Phy/ETH_LED0" "ETH_LED0" + U4 26 + R7 2 +Net 358 "" "" + J5 4 + L5 1 +Net 359 "" "" + J5 2 + U6 10 + V2 1 + V2 1 +Net 360 "" "" L4 2 J5 1 -Net 347 "" "" - R10 1 +Net 361 "+5V" "+5V" + F1 2 + F2 2 +Net 362 "" "" + J5 S4 C16 1 + J5 S3 J5 S1 J5 S2 - J5 S3 - J5 S4 -Net 348 "" "" - U6 10 - J5 2 - V2 1 - V2 1 -Net 349 "" "" - L5 1 - J5 4 -Net 351 "" "" + R10 1 +Net 363 "" "" V3 1 U7 11 V3 1 -Net 356 "" "" - V4 1 +Net 368 "" "" + U6 11 + V1 1 + V1 1 + J5 3 +Net 372 "" "" V4 1 U7 10 -Net 357 "" "" + V4 1 +Net 373 "" "" + R15 1 + C38 1 +Net 374 "" "" L6 1 F2 1 -Net 359 "" "" - C38 1 - R15 1 -Net 361 "" "" +Net 375 "" "" L4 1 F1 1 -Net 362 "/FPGA Spartan6/PROG_MISO3" "PROG_MISO3" - U8 7 +Net 376 "/FPGA Spartan6/PROG_MISO3" "PROG_MISO3" U1 U13 -Net 363 "/FPGA Spartan6/PROG_MISO2" "PROG_MISO2" - U1 U14 + U8 7 +Net 377 "/FPGA Spartan6/PROG_MISO2" "PROG_MISO2" U8 3 -Net 364 "/FPGA Spartan6/PROG_MISO1" "PROG_MISO1" - U8 2 + U1 U14 +Net 378 "/FPGA Spartan6/PROG_MISO1" "PROG_MISO1" U1 AA20 -Net 365 "/FPGA Spartan6/PROG_MISO0" "PROG_MISO0" + U8 2 +Net 379 "/FPGA Spartan6/PROG_MISO0" "PROG_MISO0" U1 AB20 U8 5 -Net 366 "/FPGA Spartan6/NF_D7" "NF_D7" - U1 A11 +Net 380 "/Non volatile memories/NF_D7" "NF_D7" U5 44 -Net 367 "/Non volatile memories/NF_D6" "NF_D6" - U5 43 + U1 A11 +Net 381 "/FPGA Spartan6/NF_D6" "NF_D6" U1 D11 -Net 368 "/FPGA Spartan6/NF_D5" "NF_D5" + U5 43 +Net 382 "/FPGA Spartan6/NF_D5" "NF_D5" U1 C12 U5 42 -Net 369 "/Non volatile memories/NF_D4" "NF_D4" +Net 383 "/Non volatile memories/NF_D4" "NF_D4" U1 B12 U5 41 -Net 370 "/Non volatile memories/NF_D3" "NF_D3" - U1 A12 +Net 384 "/Non volatile memories/NF_D3" "NF_D3" U5 32 -Net 371 "/Non volatile memories/NF_D2" "NF_D2" + U1 A12 +Net 385 "/FPGA Spartan6/NF_D2" "NF_D2" U5 31 U1 C13 -Net 372 "/FPGA Spartan6/NF_D1" "NF_D1" +Net 386 "/FPGA Spartan6/NF_D1" "NF_D1" U5 30 U1 A13 -Net 373 "/Non volatile memories/NF_D0" "NF_D0" +Net 387 "/Non volatile memories/NF_D0" "NF_D0" U5 29 U1 D14 -Net 374 "/FPGA Spartan6/ETH_TXD3" "ETH_TXD3" - U1 A9 +Net 388 "/Ethernet Phy/ETH_TXD3" "ETH_TXD3" U4 20 -Net 375 "/Ethernet Phy/ETH_TXD2" "ETH_TXD2" + U1 A9 +Net 389 "/Ethernet Phy/ETH_TXD2" "ETH_TXD2" U4 19 U1 C9 -Net 376 "/Ethernet Phy/ETH_TXD1" "ETH_TXD1" +Net 390 "/Ethernet Phy/ETH_TXD1" "ETH_TXD1" U1 C8 U4 18 -Net 377 "/Ethernet Phy/ETH_TXD0" "ETH_TXD0" - U4 17 +Net 391 "/Ethernet Phy/ETH_TXD0" "ETH_TXD0" U1 D9 -Net 378 "/FPGA Spartan6/ETH_RXD3" "ETH_RXD3" + U4 17 +Net 392 "/Ethernet Phy/ETH_RXD3" "ETH_RXD3" U4 3 U1 D6 -Net 379 "/FPGA Spartan6/ETH_RXD2" "ETH_RXD2" +Net 393 "/FPGA Spartan6/ETH_RXD2" "ETH_RXD2" U1 C6 U4 4 -Net 380 "/Ethernet Phy/ETH_RXD1" "ETH_RXD1" +Net 394 "/Ethernet Phy/ETH_RXD1" "ETH_RXD1" U1 B6 U4 5 -Net 381 "/Ethernet Phy/ETH_RXD0" "ETH_RXD0" - U4 6 +Net 395 "/FPGA Spartan6/ETH_RXD0" "ETH_RXD0" U1 A6 -Net 382 "/FPGA Spartan6/M0_BA1" "M0_BA1" + U4 6 +Net 396 "/FPGA Spartan6/M0_BA1" "M0_BA1" U1 G1 U2 27 -Net 383 "/DDR Banks/M0_BA0" "M0_BA0" - U2 26 +Net 397 "/DDR Banks/M0_BA0" "M0_BA0" U1 G3 -Net 384 "/DDR Banks/M1_BA1" "M1_BA1" - U3 27 + U2 26 +Net 398 "/FPGA Spartan6/M1_BA1" "M1_BA1" RP2 5 -Net 385 "/DDR Banks/M1_BA0" "M1_BA0" - U3 26 + U3 27 +Net 399 "/FPGA Spartan6/M1_BA0" "M1_BA0" RP2 6 -Net 386 "/DDR Banks/M1_DQ15" "M1_DQ15" + U3 26 +Net 400 "/DDR Banks/M1_DQ15" "M1_DQ15" U1 V22 U3 65 -Net 387 "/FPGA Spartan6/M1_DQ14" "M1_DQ14" - U3 63 +Net 401 "/DDR Banks/M1_DQ14" "M1_DQ14" U1 V21 -Net 388 "/DDR Banks/M1_DQ13" "M1_DQ13" - U3 62 + U3 63 +Net 402 "/FPGA Spartan6/M1_DQ13" "M1_DQ13" U1 U22 -Net 389 "/FPGA Spartan6/M1_DQ12" "M1_DQ12" + U3 62 +Net 403 "/DDR Banks/M1_DQ12" "M1_DQ12" U3 60 U1 U20 -Net 390 "/DDR Banks/M1_DQ11" "M1_DQ11" +Net 404 "/FPGA Spartan6/M1_DQ11" "M1_DQ11" U3 59 U1 R22 -Net 391 "/DDR Banks/M1_DQ10" "M1_DQ10" +Net 405 "/FPGA Spartan6/M1_DQ10" "M1_DQ10" U1 R20 U3 57 -Net 392 "/FPGA Spartan6/SD_DAT3" "SD_DAT3" - U1 C17 +Net 406 "/FPGA Spartan6/SD_DAT3" "SD_DAT3" J1 2 -Net 393 "/Non volatile memories/SD_DAT2" "SD_DAT2" - U1 A17 + U1 C17 +Net 407 "/Non volatile memories/SD_DAT2" "SD_DAT2" J1 1 -Net 394 "/FPGA Spartan6/SD_DAT1" "SD_DAT1" + U1 A17 +Net 408 "/FPGA Spartan6/SD_DAT1" "SD_DAT1" J1 8 U1 B18 -Net 395 "/Non volatile memories/SD_DAT0" "SD_DAT0" +Net 409 "/FPGA Spartan6/SD_DAT0" "SD_DAT0" J1 7 U1 A18 -Net 396 "/FPGA Spartan6/M1_A7" "M1_A7" +Net 410 "/DDR Banks/M1_A7" "M1_A7" U1 E20 U3 38 -Net 397 "/DDR Banks/M1_A6" "M1_A6" - U3 37 +Net 411 "/FPGA Spartan6/M1_A6" "M1_A6" U1 K19 -Net 398 "/DDR Banks/M1_A5" "M1_A5" + U3 37 +Net 412 "/FPGA Spartan6/M1_A5" "M1_A5" U1 K20 U3 36 -Net 399 "/FPGA Spartan6/M1_A4" "M1_A4" - U3 35 +Net 413 "/FPGA Spartan6/M1_A4" "M1_A4" U1 F20 -Net 400 "/FPGA Spartan6/M1_A3" "M1_A3" - RP1 5 + U3 35 +Net 414 "/FPGA Spartan6/M1_A3" "M1_A3" U3 32 -Net 401 "/DDR Banks/M1_A2" "M1_A2" + RP1 5 +Net 415 "/FPGA Spartan6/M1_A2" "M1_A2" U3 31 RP1 6 -Net 402 "/DDR Banks/M1_A1" "M1_A1" +Net 416 "/FPGA Spartan6/M1_A1" "M1_A1" RP1 7 U3 30 -Net 403 "/FPGA Spartan6/M1_A0" "M1_A0" - U3 29 +Net 417 "/DDR Banks/M1_A0" "M1_A0" RP1 8 -Net 404 "/FPGA Spartan6/M0_A12" "M0_A12" + U3 29 +Net 418 "/FPGA Spartan6/M0_A12" "M0_A12" U2 42 U1 D1 -Net 405 "/FPGA Spartan6/M0_A11" "M0_A11" +Net 419 "/DDR Banks/M0_A11" "M0_A11" U2 41 U1 C1 -Net 406 "/DDR Banks/M0_A10" "M0_A10" +Net 420 "/FPGA Spartan6/M0_A10" "M0_A10" U1 G4 U2 28 -Net 407 "/FPGA Spartan6/M0_A9" "M0_A9" +Net 421 "/DDR Banks/M0_A9" "M0_A9" U1 E1 U2 40 -Net 408 "/DDR Banks/M0_A8" "M0_A8" - U1 E3 +Net 422 "/FPGA Spartan6/M0_A8" "M0_A8" U2 39 -Net 409 "/FPGA Spartan6/M0_A7" "M0_A7" - U2 38 + U1 E3 +Net 423 "/FPGA Spartan6/M0_A7" "M0_A7" U1 H6 -Net 410 "/FPGA Spartan6/M1_DQ9" "M1_DQ9" + U2 38 +Net 424 "/FPGA Spartan6/M1_DQ9" "M1_DQ9" U3 56 U1 P22 -Net 411 "/FPGA Spartan6/M1_DQ8" "M1_DQ8" +Net 425 "/FPGA Spartan6/M1_DQ8" "M1_DQ8" U3 54 U1 P21 -Net 412 "/FPGA Spartan6/M1_DQ7" "M1_DQ7" - U1 K22 +Net 426 "/DDR Banks/M1_DQ7" "M1_DQ7" U3 13 -Net 413 "/FPGA Spartan6/M1_DQ6" "M1_DQ6" + RP4 5 +Net 427 "/FPGA Spartan6/M1_DQ6" "M1_DQ6" U3 11 - U1 K21 -Net 414 "/FPGA Spartan6/M1_DQ5" "M1_DQ5" + RP4 6 +Net 428 "/FPGA Spartan6/M1_DQ5" "M1_DQ5" U3 10 - U1 J22 -Net 415 "/FPGA Spartan6/M1_DQ4" "M1_DQ4" - U1 J20 + RP4 7 +Net 429 "/FPGA Spartan6/M1_DQ4" "M1_DQ4" + RP4 8 U3 8 -Net 416 "/DDR Banks/M1_DQ3" "M1_DQ3" - U1 M22 +Net 430 "/FPGA Spartan6/M1_DQ3" "M1_DQ3" + RP5 5 U3 7 -Net 417 "/FPGA Spartan6/M1_DQ2" "M1_DQ2" - U1 M21 +Net 431 "/DDR Banks/M1_DQ2" "M1_DQ2" + RP5 6 U3 5 -Net 418 "/FPGA Spartan6/M1_DQ1" "M1_DQ1" +Net 432 "/DDR Banks/M1_DQ1" "M1_DQ1" U3 4 - U1 N22 -Net 419 "/DDR Banks/M1_DQ0" "M1_DQ0" + RP5 7 +Net 433 "/DDR Banks/M1_DQ0" "M1_DQ0" U3 2 - U1 N20 -Net 420 "/FPGA Spartan6/M1_A12" "M1_A12" + RP5 8 +Net 434 "/DDR Banks/M1_A12" "M1_A12" U3 42 U1 D22 -Net 421 "/DDR Banks/M1_A11" "M1_A11" - U3 41 +Net 435 "/FPGA Spartan6/M1_A11" "M1_A11" U1 F19 -Net 422 "/FPGA Spartan6/M1_A10" "M1_A10" - U3 28 + U3 41 +Net 436 "/FPGA Spartan6/M1_A10" "M1_A10" U1 G19 -Net 423 "/FPGA Spartan6/M1_A9" "M1_A9" - U1 C22 + U3 28 +Net 437 "/DDR Banks/M1_A9" "M1_A9" U3 40 -Net 424 "/FPGA Spartan6/M1_A8" "M1_A8" + U1 C22 +Net 438 "/FPGA Spartan6/M1_A8" "M1_A8" U3 39 U1 C20 -Net 425 "/FPGA Spartan6/M0_DQ3" "M0_DQ3" - U2 7 +Net 439 "/FPGA Spartan6/M0_DQ3" "M0_DQ3" U1 M1 -Net 426 "/FPGA Spartan6/M0_DQ2" "M0_DQ2" + U2 7 +Net 440 "/FPGA Spartan6/M0_DQ2" "M0_DQ2" U2 5 U1 M2 -Net 427 "/FPGA Spartan6/M0_DQ1" "M0_DQ1" - U2 4 +Net 441 "/FPGA Spartan6/M0_DQ1" "M0_DQ1" U1 N1 -Net 428 "/FPGA Spartan6/M0_DQ0" "M0_DQ0" - U2 2 + U2 4 +Net 442 "/DDR Banks/M0_DQ0" "M0_DQ0" U1 N3 -Net 429 "/FPGA Spartan6/M0_A6" "M0_A6" - U2 37 + U2 2 +Net 443 "/FPGA Spartan6/M0_A6" "M0_A6" U1 J4 -Net 430 "/DDR Banks/M0_A5" "M0_A5" + U2 37 +Net 444 "/DDR Banks/M0_A5" "M0_A5" U2 36 U1 K3 -Net 431 "/FPGA Spartan6/M0_A4" "M0_A4" +Net 445 "/FPGA Spartan6/M0_A4" "M0_A4" U2 35 U1 F3 -Net 432 "/FPGA Spartan6/M0_A3" "M0_A3" +Net 446 "/FPGA Spartan6/M0_A3" "M0_A3" U2 32 U1 K6 -Net 433 "/FPGA Spartan6/M0_A2" "M0_A2" - U2 31 +Net 447 "/FPGA Spartan6/M0_A2" "M0_A2" U1 H5 -Net 434 "/FPGA Spartan6/M0_A1" "M0_A1" - U2 30 + U2 31 +Net 448 "/FPGA Spartan6/M0_A1" "M0_A1" U1 H1 -Net 435 "/DDR Banks/M0_A0" "M0_A0" - U1 H2 + U2 30 +Net 449 "/FPGA Spartan6/M0_A0" "M0_A0" U2 29 -Net 436 "/FPGA Spartan6/M0_DQ15" "M0_DQ15" + U1 H2 +Net 450 "/FPGA Spartan6/M0_DQ15" "M0_DQ15" U1 V1 U2 65 -Net 437 "/FPGA Spartan6/M0_DQ14" "M0_DQ14" +Net 451 "/DDR Banks/M0_DQ14" "M0_DQ14" U2 63 U1 V2 -Net 438 "/FPGA Spartan6/M0_DQ13" "M0_DQ13" +Net 452 "/FPGA Spartan6/M0_DQ13" "M0_DQ13" U2 62 U1 U1 -Net 439 "/FPGA Spartan6/M0_DQ12" "M0_DQ12" +Net 453 "/FPGA Spartan6/M0_DQ12" "M0_DQ12" U2 60 U1 U3 -Net 440 "/FPGA Spartan6/M0_DQ11" "M0_DQ11" - U1 R1 +Net 454 "/DDR Banks/M0_DQ11" "M0_DQ11" U2 59 -Net 441 "/DDR Banks/M0_DQ10" "M0_DQ10" - U2 57 + U1 R1 +Net 455 "/FPGA Spartan6/M0_DQ10" "M0_DQ10" U1 R3 -Net 442 "/DDR Banks/M0_DQ9" "M0_DQ9" - U2 56 + U2 57 +Net 456 "/DDR Banks/M0_DQ9" "M0_DQ9" U1 P1 -Net 443 "/FPGA Spartan6/M0_DQ8" "M0_DQ8" + U2 56 +Net 457 "/DDR Banks/M0_DQ8" "M0_DQ8" U2 54 U1 P2 -Net 444 "/FPGA Spartan6/M0_DQ7" "M0_DQ7" - U2 13 +Net 458 "/DDR Banks/M0_DQ7" "M0_DQ7" U1 K1 -Net 445 "/DDR Banks/M0_DQ6" "M0_DQ6" - U1 K2 + U2 13 +Net 459 "/FPGA Spartan6/M0_DQ6" "M0_DQ6" U2 11 -Net 446 "/FPGA Spartan6/M0_DQ5" "M0_DQ5" - U2 10 + U1 K2 +Net 460 "/FPGA Spartan6/M0_DQ5" "M0_DQ5" U1 J1 -Net 447 "/FPGA Spartan6/M0_DQ4" "M0_DQ4" - U2 8 + U2 10 +Net 461 "/FPGA Spartan6/M0_DQ4" "M0_DQ4" U1 J3 + U2 8 } #End diff --git a/kicad/xue-rnc/xue-rnc.pro b/kicad/xue-rnc/xue-rnc.pro index 3106361..520bb52 100644 --- a/kicad/xue-rnc/xue-rnc.pro +++ b/kicad/xue-rnc/xue-rnc.pro @@ -1,4 +1,4 @@ -update=Mon 16 Aug 2010 07:03:12 PM COT +update=Mon 16 Aug 2010 07:35:46 PM COT version=1 last_client=pcbnew [common] diff --git a/kicad/xue-rnc/xue-rnc.sch b/kicad/xue-rnc/xue-rnc.sch index 5edb333..9ae66c8 100644 --- a/kicad/xue-rnc/xue-rnc.sch +++ b/kicad/xue-rnc/xue-rnc.sch @@ -1,4 +1,4 @@ -EESchema Schematic File Version 2 date Mon 16 Aug 2010 07:03:17 PM COT +EESchema Schematic File Version 2 date Mon 16 Aug 2010 07:34:39 PM COT LIBS:power LIBS:r_pack2 LIBS:v0402mhs03