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Commit Graph

11 Commits

Author SHA1 Message Date
Andres Calderon
5197a47953 ddr address and data has been conected to the FPGA 2010-08-04 20:50:31 -05:00
Andres Calderon
3e25e8dec9 ddr mobile replaced by ddr 2010-08-03 21:23:17 -05:00
Andres Calderon
1e0102079e 60fbga_ddr.mod added 2010-08-03 20:50:59 -05:00
Andres Calderon
d6bbd2dcba 60fbga_ddr.fpd added 2010-08-03 20:37:33 -05:00
Andres Calderon
a29352d997 micron_ddr_512Mb.lib fixed 2010-08-03 17:42:11 -05:00
Andres Calderon
55284358c3 micron_ddr_512Mb models added 2010-08-03 17:31:15 -05:00
Andres Calderon
1580e66a1e only one wire connected 2010-07-28 06:48:02 -05:00
Andres Calderon
939c04d645 some ethernet phy conections 2010-07-27 20:11:18 -05:00
Andres Calderon
d79faef060 some ethernet phy conections 2010-07-27 20:09:20 -05:00
Andres Calderon
a8cbac05c9 chie renamed to xue 2010-07-24 14:02:57 -05:00
Andres Calderon
d6f7c20935 initial import 2010-07-24 06:58:53 -05:00