Sorta does something
This commit is contained in:
parent
826084b927
commit
bf5f6c16fc
@ -1,6 +1,6 @@
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# Generated from CLion C/C++ Code Style settings
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# Generated from CLion C/C++ Code Style settings
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BasedOnStyle: LLVM
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BasedOnStyle: LLVM
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AccessModifierOffset: -2
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AccessModifierOffset: 0
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AlignAfterOpenBracket: Align
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AlignAfterOpenBracket: Align
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AlignConsecutiveAssignments: None
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AlignConsecutiveAssignments: None
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AlignOperands: Align
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AlignOperands: Align
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@ -38,7 +38,7 @@ CompactNamespaces: false
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ContinuationIndentWidth: 8
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ContinuationIndentWidth: 8
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IndentCaseLabels: true
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IndentCaseLabels: true
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IndentPPDirectives: None
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IndentPPDirectives: None
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IndentWidth: 2
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IndentWidth: 4
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KeepEmptyLinesAtTheStartOfBlocks: true
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KeepEmptyLinesAtTheStartOfBlocks: true
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MaxEmptyLinesToKeep: 2
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MaxEmptyLinesToKeep: 2
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NamespaceIndentation: All
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NamespaceIndentation: All
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@ -63,4 +63,4 @@ SpacesInContainerLiterals: false
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SpacesInParentheses: false
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SpacesInParentheses: false
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SpacesInSquareBrackets: false
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SpacesInSquareBrackets: false
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TabWidth: 4
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TabWidth: 4
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UseTab: ForContinuationAndIndentation
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UseTab: Always
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@ -75,7 +75,7 @@ Revision: $Rev: 21386 $
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// Up-channel 1: SystemView
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// Up-channel 1: SystemView
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//
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//
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#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS
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#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS
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#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3)
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#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (1) // Max. number of up-buffers (T->H) available on this target (Default: 3)
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#endif
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#endif
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//
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//
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// Most common case:
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// Most common case:
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@ -83,11 +83,11 @@ Revision: $Rev: 21386 $
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// Down-channel 1: SystemView
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// Down-channel 1: SystemView
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//
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//
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#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS
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#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS
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#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3)
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#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (1) // Max. number of down-buffers (H->T) available on this target (Default: 3)
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#endif
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#endif
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#ifndef BUFFER_SIZE_UP
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#ifndef BUFFER_SIZE_UP
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#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k)
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#define BUFFER_SIZE_UP (128) // Size of the buffer for terminal output of target, up to host (Default: 1k)
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#endif
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#endif
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#ifndef BUFFER_SIZE_DOWN
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#ifndef BUFFER_SIZE_DOWN
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162
main.c
162
main.c
@ -17,6 +17,8 @@
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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*/
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#include <stdio.h>
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#include <libopencm3/cm3/nvic.h>
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#include <libopencm3/cm3/nvic.h>
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/stm32/rcc.h>
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#include <libopencm3/stm32/gpio.h>
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#include <libopencm3/stm32/gpio.h>
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@ -24,6 +26,23 @@
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#include <SEGGER_RTT.h>
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#include <SEGGER_RTT.h>
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#define DHT_PORT GPIOB
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#define DHT_PIN GPIO0
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enum DHT11_STATE {
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DHT11_STOP, // Stop statemachine
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DHT11_BEGIN_START, // We drive DATA Low for min 18ms
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DHT11_END_START, // We drive DATA High and set it to input
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DHT11_RESPONSE, // Wait for DHT to drive DATA Low
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DHT11_DATA,
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DHT11_END
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};
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int g_dht11_state = DHT11_STOP;
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int g_dht_i = 0;
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uint16_t g_dht_vals[100] = {0};
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static void delay(int count)
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static void delay(int count)
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{
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{
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for (int i=0; i < count; i++) {
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for (int i=0; i < count; i++) {
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@ -44,7 +63,7 @@ static void gpio_setup(void)
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// GPIOA_CRH = (GPIO_CNF_OUTPUT_PUSHPULL << (((5 - 8) * 4) + 2));
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// GPIOA_CRH = (GPIO_CNF_OUTPUT_PUSHPULL << (((5 - 8) * 4) + 2));
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// GPIOA_CRH |= (GPIO_MODE_OUTPUT_2_MHZ << ((5 - 8) * 4));
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// GPIOA_CRH |= (GPIO_MODE_OUTPUT_2_MHZ << ((5 - 8) * 4));
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/* Using API functions: */
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/* Using API functions: */
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gpio_set_mode(GPIOB, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, GPIO0);
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gpio_set_mode(DHT_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, DHT_PIN);
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gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO1);
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gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO1);
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gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO2);
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gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO2);
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}
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}
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@ -52,109 +71,148 @@ static void gpio_setup(void)
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static void tim_setup(void)
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static void tim_setup(void)
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{
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{
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nvic_enable_irq(NVIC_TIM3_IRQ);
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nvic_enable_irq(NVIC_TIM3_IRQ);
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nvic_set_priority(NVIC_TIM3_IRQ, 1); // interupts will not work without it???
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nvic_set_priority(NVIC_TIM3_IRQ, 1); // interrupts will not work without it???
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rcc_periph_clock_enable(RCC_TIM3);
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rcc_periph_clock_enable(RCC_TIM3);
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rcc_periph_reset_pulse(RST_TIM3);
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rcc_periph_reset_pulse(RST_TIM3);
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timer_set_mode(TIM3, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
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timer_set_mode(TIM3, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
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timer_set_prescaler(TIM3, 1152); // set timer tickrate to 500khz
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timer_set_prescaler(TIM3, (rcc_apb1_frequency*2) / 1000000 - 1); // set timer tickrate to 1mhz
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//timer_set_oc_value(TIM3, TIM_OC1, 0x1000);
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timer_set_period(TIM3, 0xffff);
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timer_set_period(TIM3, 0xffff);
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timer_one_shot_mode(TIM3);
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//timer_one_shot_mode(TIM3);
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timer_ic_set_input(TIM3, TIM_IC3, TIM_IC_IN_TI3);
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timer_ic_set_input(TIM3, TIM_IC3, TIM_IC_IN_TI3);
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//timer_ic_set_filter(TIM3, TIM_IC3, 0b1111); // does not do anything ????
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//timer_ic_set_polarity(TIM3, TIM_IC3, TIM_IC_FALLING); // TIM_IC_RISING
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//timer_ic_set_polarity(TIM3, TIM_IC3, TIM_IC_FALLING); // TIM_IC_RISING
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//timer_ic_enable(TIM3, TIM_IC3);
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//timer_ic_enable(TIM3, TIM_IC3);
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timer_enable_counter(TIM3);
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timer_enable_irq(TIM3, TIM_DIER_UIE);
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timer_enable_irq(TIM3, TIM_DIER_UIE);
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timer_enable_irq(TIM3, TIM_DIER_CC1IE); // end start condition
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timer_enable_irq(TIM3, TIM_DIER_CC1IE); // triggered when DHT11_END_START
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timer_enable_irq(TIM3, TIM_DIER_CC3IE);
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timer_enable_irq(TIM3, TIM_DIER_CC3IE); // triggered when DHT drives DATA pin
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// start condition
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gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO0);
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gpio_clear(GPIOB, GPIO0);
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}
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}
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enum DHT11_STATE {
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DHT11_START,
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DHT11_RESPONSE,
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DHT11_BIT0,
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DHT11_BIT1,
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DHT11_END
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};
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int dht11_state = DHT11_START;
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void tim3_isr(void)
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void tim3_isr(void)
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{
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{
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// Timer overflow that should only happen if DHT11 does not answer
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if (timer_get_flag(TIM3, TIM_SR_UIF)) {
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if (timer_get_flag(TIM3, TIM_SR_UIF)) // timer reached end
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{
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timer_clear_flag(TIM3, TIM_SR_UIF);
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timer_clear_flag(TIM3, TIM_SR_UIF);
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//gpio_toggle(GPIOB, GPIO1);
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//gpio_toggle(GPIOB, GPIO2);
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gpio_toggle(GPIOB, GPIO2);
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if (g_dht11_state == DHT11_RESPONSE) {
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puts("no response");
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} else if (g_dht11_state == DHT11_DATA) {
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puts("got data");
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} else {
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puts("overflow");
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}
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g_dht11_state = DHT11_STOP;
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timer_disable_counter(TIM3);
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//timer_set_counter(TIM3, 0);
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//timer_set_counter(TIM3, 0);
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//timer_clear_flag(TIM3, TIM_SR_UIF);
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//timer_clear_flag(TIM3, TIM_SR_UIF);
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//timer_set_oc_value(TIM3, TIM_OC1, 1000);
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//timer_set_oc_value(TIM3, TIM_OC1, 1000);
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} else if (timer_get_flag(TIM3, TIM_SR_CC1IF))
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}
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{
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timer_clear_flag(TIM3, TIM_SR_CC3IF);
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// handle DHT11_END_START
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if (dht11_state == DHT11_START){
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else if (timer_get_flag(TIM3, TIM_SR_CC1IF)) {
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gpio_set(GPIOB, GPIO0);
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timer_clear_flag(TIM3, TIM_SR_CC1IF);
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gpio_set_mode(GPIOB, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, GPIO0);
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//gpio_toggle(GPIOB, GPIO2);
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if (g_dht11_state == DHT11_BEGIN_START) {
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g_dht11_state = DHT11_END_START;
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// And make the GPIO input so that we can wait for response
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gpio_set(DHT_PORT, DHT_PIN);
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gpio_set_mode(DHT_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, DHT_PIN);
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// setup timer to wait for start response from dht11
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// setup timer to wait for start response from dht11
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timer_ic_set_polarity(TIM3, TIM_IC3, TIM_IC_FALLING); // TIM_IC_RISING
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//timer_ic_set_polarity(TIM3, TIM_IC3, TIM_IC_FALLING);// TIM_IC_RISING
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timer_ic_set_polarity(TIM3, TIM_IC3, TIM_IC_RISING);// TIM_IC_RISING
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timer_ic_enable(TIM3, TIM_IC3);
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timer_ic_enable(TIM3, TIM_IC3);
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dht11_state = DHT11_START;
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}
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} else if (timer_get_flag(TIM3, TIM_SR_CC3IF)) // PB0 changed value
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{
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timer_clear_flag(TIM3, TIM_SR_CC3IF);
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timer_clear_flag(TIM3, TIM_SR_CC3IF);
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//puts("waiting for response");
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}
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gpio_toggle(GPIOB, GPIO2);
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}
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else if (timer_get_flag(TIM3, TIM_SR_CC3IF)) // PB0 changed value
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if (timer_get_flag(TIM3, TIM_SR_CC3OF))
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{
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{
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timer_clear_flag(TIM3, TIM_SR_CC3OF);
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if (g_dht11_state == DHT11_END_START) {
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g_dht11_state = DHT11_RESPONSE;
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gpio_toggle(GPIOB, GPIO2);
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//timer_ic_disable(TIM3, TIM_IC3);
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//timer_clear_flag(TIM3, TIM_SR_CC3IF);
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//timer_ic_set_polarity(TIM3, TIM_IC3, TIM_IC_FALLING);// TIM_IC_RISING
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g_dht_vals[g_dht_i++] = TIM_CCR3(TIM3); // store captured high time value
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//timer_ic_enable(TIM3, TIM_IC3);
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gpio_toggle(GPIOB, GPIO2);
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} else {
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gpio_toggle(GPIOB, GPIO2);
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g_dht11_state = DHT11_DATA;
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g_dht_vals[g_dht_i] = TIM_CCR3(TIM3) - g_dht_vals[g_dht_i-1]; // store length from last sample
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g_dht_i++;
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gpio_toggle(GPIOB, GPIO2);
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}
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}
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// if (timer_get_flag(TIM3, TIM_SR_CC3OF))
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// {
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// timer_clear_flag(TIM3, TIM_SR_CC3OF);
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// puts("we are too slow to read and clear timer input capture flags");
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// }
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}
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}
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}
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}
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static void dht_start(void)
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{
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timer_disable_counter(TIM3);
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g_dht11_state = DHT11_BEGIN_START;
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g_dht_i = 0;
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// Setup DHT11_END_START trigger on output compare 1
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timer_set_counter(TIM3, 0);
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timer_set_oc_value(TIM3, TIM_OC1, 1000*20); // 20ms
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timer_clear_flag(TIM3, TIM_SR_CC1IF);
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// Do DHT11_BEGIN_START aka drive DATA Low
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gpio_set_mode(DHT_PORT, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, DHT_PIN);
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gpio_clear(DHT_PORT, DHT_PIN);
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// And start counting
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timer_enable_counter(TIM3);
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//gpio_toggle(GPIOB, GPIO2);
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}
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static void dht_start_signal(void)
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static void dht_start_signal(void)
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{
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{
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gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO0);
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gpio_set_mode(DHT_PORT, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, DHT_PIN);
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gpio_clear(GPIOB, GPIO0);
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gpio_clear(DHT_PORT, DHT_PIN);
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delay(205000);
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delay(100000);
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//delay(30000);
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//delay(30000);
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gpio_set(GPIOB, GPIO0);
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gpio_set(DHT_PORT, DHT_PIN);
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delay(100);
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delay(100);
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gpio_set_mode(GPIOB, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, GPIO0);
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gpio_set_mode(DHT_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, DHT_PIN);
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}
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}
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int main(void)
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int main(void)
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{
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{
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int i = 0;
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int i = 0;
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SEGGER_RTT_printf(0, "Start\n");
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puts("Start");
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rcc_clock_setup_pll(&rcc_hse_configs[RCC_CLOCK_HSE8_72MHZ]);
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rcc_clock_setup_pll(&rcc_hse_configs[RCC_CLOCK_HSE8_72MHZ]);
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gpio_setup();
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gpio_setup();
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//tim_setup();
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tim_setup();
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/* Blink the LED (PA5) on the board. */
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/* Blink the LED (PA5) on the board. */
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while (1) {
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while (1) {
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/* Using API function gpio_toggle(): */
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/* Using API function gpio_toggle(): */
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gpio_toggle(GPIOB, GPIO1); /* LED on/off */
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gpio_toggle(GPIOB, GPIO1); /* LED on/off */
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delay(4000000);
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delay(10000000);
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//dht_start_signal();
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dht_start();
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i++;
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i++;
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SEGGER_RTT_printf(0, "hello: %d\n", i);
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SEGGER_RTT_printf(0, "Poll: %d\n", i);
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}
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}
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return 0;
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return 0;
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@ -22,6 +22,7 @@ source [find target/stm32f1x.cfg]
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reset_config srst_only
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reset_config srst_only
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# Search for RTT string from start of RAM
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rtt setup 0x20000000 8192 "SEGGER RTT"
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rtt setup 0x20000000 8192 "SEGGER RTT"
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rtt server start 9090 0
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rtt server start 9090 0
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