arti/dht_test
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Sorta does something

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This commit is contained in:
Arti Zirk 2021-06-28 00:13:08 +03:00
parent 826084b927
commit bf5f6c16fc
4 changed files with 541 additions and 482 deletions
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6
.clang-format
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@ -1,6 +1,6 @@
# Generated from CLion C/C++ Code Style settings
BasedOnStyle: LLVM
AccessModifierOffset: -2
AccessModifierOffset: 0
AlignAfterOpenBracket: Align
AlignConsecutiveAssignments: None
AlignOperands: Align
@ -38,7 +38,7 @@ CompactNamespaces: false
ContinuationIndentWidth: 8
IndentCaseLabels: true
IndentPPDirectives: None
IndentWidth: 2
IndentWidth: 4
KeepEmptyLinesAtTheStartOfBlocks: true
MaxEmptyLinesToKeep: 2
NamespaceIndentation: All
@ -63,4 +63,4 @@ SpacesInContainerLiterals: false
SpacesInParentheses: false
SpacesInSquareBrackets: false
TabWidth: 4
UseTab: ForContinuationAndIndentation
UseTab: Always

6
RTT/SEGGER_RTT_Conf.h
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@ -75,7 +75,7 @@ Revision: $Rev: 21386 $
// Up-channel 1: SystemView
//
#ifndef SEGGER_RTT_MAX_NUM_UP_BUFFERS
#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (3) // Max. number of up-buffers (T->H) available on this target (Default: 3)
#define SEGGER_RTT_MAX_NUM_UP_BUFFERS (1) // Max. number of up-buffers (T->H) available on this target (Default: 3)
#endif
//
// Most common case:
@ -83,11 +83,11 @@ Revision: $Rev: 21386 $
// Down-channel 1: SystemView
//
#ifndef SEGGER_RTT_MAX_NUM_DOWN_BUFFERS
#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (3) // Max. number of down-buffers (H->T) available on this target (Default: 3)
#define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS (1) // Max. number of down-buffers (H->T) available on this target (Default: 3)
#endif
#ifndef BUFFER_SIZE_UP
#define BUFFER_SIZE_UP (1024) // Size of the buffer for terminal output of target, up to host (Default: 1k)
#define BUFFER_SIZE_UP (128) // Size of the buffer for terminal output of target, up to host (Default: 1k)
#endif
#ifndef BUFFER_SIZE_DOWN

168
main.c
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@ -17,6 +17,8 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stdio.h>
#include <libopencm3/cm3/nvic.h>
#include <libopencm3/stm32/rcc.h>
#include <libopencm3/stm32/gpio.h>
@ -24,6 +26,23 @@
#include <SEGGER_RTT.h>
#define DHT_PORT GPIOB
#define DHT_PIN GPIO0
enum DHT11_STATE {
DHT11_STOP, // Stop statemachine
DHT11_BEGIN_START, // We drive DATA Low for min 18ms
DHT11_END_START, // We drive DATA High and set it to input
DHT11_RESPONSE, // Wait for DHT to drive DATA Low
DHT11_DATA,
DHT11_END
};
int g_dht11_state = DHT11_STOP;
int g_dht_i = 0;
uint16_t g_dht_vals[100] = {0};
static void delay(int count)
{
for (int i=0; i < count; i++) {
@ -44,7 +63,7 @@ static void gpio_setup(void)
// GPIOA_CRH = (GPIO_CNF_OUTPUT_PUSHPULL << (((5 - 8) * 4) + 2));
// GPIOA_CRH |= (GPIO_MODE_OUTPUT_2_MHZ << ((5 - 8) * 4));
/* Using API functions: */
gpio_set_mode(GPIOB, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, GPIO0);
gpio_set_mode(DHT_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, DHT_PIN);
gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO1);
gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO2);
}
@ -52,109 +71,148 @@ static void gpio_setup(void)
static void tim_setup(void)
{
nvic_enable_irq(NVIC_TIM3_IRQ);
nvic_set_priority(NVIC_TIM3_IRQ, 1); // interupts will not work without it???
nvic_set_priority(NVIC_TIM3_IRQ, 1); // interrupts will not work without it???
rcc_periph_clock_enable(RCC_TIM3);
rcc_periph_reset_pulse(RST_TIM3);
timer_set_mode(TIM3, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
timer_set_prescaler(TIM3, 1152); // set timer tickrate to 500khz
//timer_set_oc_value(TIM3, TIM_OC1, 0x1000);
timer_set_prescaler(TIM3, (rcc_apb1_frequency*2) / 1000000 - 1); // set timer tickrate to 1mhz
timer_set_period(TIM3, 0xffff);
timer_one_shot_mode(TIM3);
//timer_one_shot_mode(TIM3);
timer_ic_set_input(TIM3, TIM_IC3, TIM_IC_IN_TI3);
//timer_ic_set_filter(TIM3, TIM_IC3, 0b1111); // does not do anything ????
//timer_ic_set_polarity(TIM3, TIM_IC3, TIM_IC_FALLING); // TIM_IC_RISING
//timer_ic_enable(TIM3, TIM_IC3);
timer_enable_counter(TIM3);
timer_enable_irq(TIM3, TIM_DIER_UIE);
timer_enable_irq(TIM3, TIM_DIER_CC1IE); // end start condition
timer_enable_irq(TIM3, TIM_DIER_CC3IE);
timer_enable_irq(TIM3, TIM_DIER_CC1IE); // triggered when DHT11_END_START
timer_enable_irq(TIM3, TIM_DIER_CC3IE); // triggered when DHT drives DATA pin
// start condition
gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO0);
gpio_clear(GPIOB, GPIO0);
}
enum DHT11_STATE {
DHT11_START,
DHT11_RESPONSE,
DHT11_BIT0,
DHT11_BIT1,
DHT11_END
};
int dht11_state = DHT11_START;
void tim3_isr(void)
{
// Timer overflow that should only happen if DHT11 does not answer
if (timer_get_flag(TIM3, TIM_SR_UIF)) {
if (timer_get_flag(TIM3, TIM_SR_UIF)) // timer reached end
{
timer_clear_flag(TIM3, TIM_SR_UIF);
//gpio_toggle(GPIOB, GPIO1);
gpio_toggle(GPIOB, GPIO2);
//gpio_toggle(GPIOB, GPIO2);
if (g_dht11_state == DHT11_RESPONSE) {
puts("no response");
} else if (g_dht11_state == DHT11_DATA) {
puts("got data");
} else {
puts("overflow");
}
g_dht11_state = DHT11_STOP;
timer_disable_counter(TIM3);
//timer_set_counter(TIM3, 0);
//timer_clear_flag(TIM3, TIM_SR_UIF);
//timer_set_oc_value(TIM3, TIM_OC1, 1000);
} else if (timer_get_flag(TIM3, TIM_SR_CC1IF))
{
timer_clear_flag(TIM3, TIM_SR_CC3IF);
if (dht11_state == DHT11_START){
gpio_set(GPIOB, GPIO0);
gpio_set_mode(GPIOB, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, GPIO0);
}
// handle DHT11_END_START
else if (timer_get_flag(TIM3, TIM_SR_CC1IF)) {
timer_clear_flag(TIM3, TIM_SR_CC1IF);
//gpio_toggle(GPIOB, GPIO2);
if (g_dht11_state == DHT11_BEGIN_START) {
g_dht11_state = DHT11_END_START;
// And make the GPIO input so that we can wait for response
gpio_set(DHT_PORT, DHT_PIN);
gpio_set_mode(DHT_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, DHT_PIN);
// setup timer to wait for start response from dht11
timer_ic_set_polarity(TIM3, TIM_IC3, TIM_IC_FALLING); // TIM_IC_RISING
//timer_ic_set_polarity(TIM3, TIM_IC3, TIM_IC_FALLING);// TIM_IC_RISING
timer_ic_set_polarity(TIM3, TIM_IC3, TIM_IC_RISING);// TIM_IC_RISING
timer_ic_enable(TIM3, TIM_IC3);
dht11_state = DHT11_START;
}
} else if (timer_get_flag(TIM3, TIM_SR_CC3IF)) // PB0 changed value
{
timer_clear_flag(TIM3, TIM_SR_CC3IF);
if (timer_get_flag(TIM3, TIM_SR_CC3OF))
{
timer_clear_flag(TIM3, TIM_SR_CC3OF);
timer_clear_flag(TIM3, TIM_SR_CC3IF);
//puts("waiting for response");
}
gpio_toggle(GPIOB, GPIO2);
}
else if (timer_get_flag(TIM3, TIM_SR_CC3IF)) // PB0 changed value
{
if (g_dht11_state == DHT11_END_START) {
g_dht11_state = DHT11_RESPONSE;
gpio_toggle(GPIOB, GPIO2);
//timer_ic_disable(TIM3, TIM_IC3);
//timer_clear_flag(TIM3, TIM_SR_CC3IF);
//timer_ic_set_polarity(TIM3, TIM_IC3, TIM_IC_FALLING);// TIM_IC_RISING
g_dht_vals[g_dht_i++] = TIM_CCR3(TIM3); // store captured high time value
//timer_ic_enable(TIM3, TIM_IC3);
gpio_toggle(GPIOB, GPIO2);
} else {
gpio_toggle(GPIOB, GPIO2);
g_dht11_state = DHT11_DATA;
g_dht_vals[g_dht_i] = TIM_CCR3(TIM3) - g_dht_vals[g_dht_i-1]; // store length from last sample
g_dht_i++;
gpio_toggle(GPIOB, GPIO2);
}
// if (timer_get_flag(TIM3, TIM_SR_CC3OF))
// {
// timer_clear_flag(TIM3, TIM_SR_CC3OF);
// puts("we are too slow to read and clear timer input capture flags");
// }
}
}
static void dht_start(void)
{
timer_disable_counter(TIM3);
g_dht11_state = DHT11_BEGIN_START;
g_dht_i = 0;
// Setup DHT11_END_START trigger on output compare 1
timer_set_counter(TIM3, 0);
timer_set_oc_value(TIM3, TIM_OC1, 1000*20); // 20ms
timer_clear_flag(TIM3, TIM_SR_CC1IF);
// Do DHT11_BEGIN_START aka drive DATA Low
gpio_set_mode(DHT_PORT, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, DHT_PIN);
gpio_clear(DHT_PORT, DHT_PIN);
// And start counting
timer_enable_counter(TIM3);
//gpio_toggle(GPIOB, GPIO2);
}
static void dht_start_signal(void)
{
gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO0);
gpio_clear(GPIOB, GPIO0);
delay(205000);
gpio_set_mode(DHT_PORT, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, DHT_PIN);
gpio_clear(DHT_PORT, DHT_PIN);
delay(100000);
//delay(30000);
gpio_set(GPIOB, GPIO0);
gpio_set(DHT_PORT, DHT_PIN);
delay(100);
gpio_set_mode(GPIOB, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, GPIO0);
gpio_set_mode(DHT_PORT, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, DHT_PIN);
}
int main(void)
{
int i = 0;
SEGGER_RTT_printf(0, "Start\n");
puts("Start");
rcc_clock_setup_pll(&rcc_hse_configs[RCC_CLOCK_HSE8_72MHZ]);
gpio_setup();
//tim_setup();
tim_setup();
/* Blink the LED (PA5) on the board. */
while (1) {
/* Using API function gpio_toggle(): */
gpio_toggle(GPIOB, GPIO1); /* LED on/off */
delay(4000000);
//dht_start_signal();
delay(10000000);
dht_start();
i++;
SEGGER_RTT_printf(0, "hello: %d\n", i);
SEGGER_RTT_printf(0, "Poll: %d\n", i);
}
return 0;

1
openocd.cfg
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@ -22,6 +22,7 @@ source [find target/stm32f1x.cfg]
reset_config srst_only
# Search for RTT string from start of RAM
rtt setup 0x20000000 8192 "SEGGER RTT"
rtt server start 9090 0