arti/dht_test
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Remap pins for soldered version

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Arti Zirk 2023-04-30 21:38:25 +03:00
parent 32177827a1
commit dfc2cbe198
2 changed files with 7 additions and 7 deletions
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12
main.c
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@ -32,14 +32,14 @@
#define DHT_PIN GPIO0 #define DHT_PIN GPIO0
#define SEGMENT_PORT GPIOA #define SEGMENT_PORT GPIOA
#define SEGMENT_A GPIO7 #define SEGMENT_A GPIO5
#define SEGMENT_B GPIO5 #define SEGMENT_B GPIO3
#define SEGMENT_C GPIO2 #define SEGMENT_C GPIO6
#define SEGMENT_D GPIO0 #define SEGMENT_D GPIO0
#define SEGMENT_E GPIO1 #define SEGMENT_E GPIO1
#define SEGMENT_F GPIO3 #define SEGMENT_F GPIO7
#define SEGMENT_G GPIO6 #define SEGMENT_G GPIO4
#define SEGMENT_DOT GPIO4 #define SEGMENT_DOT GPIO2
#define SEGMENT_ALL GPIO0 | GPIO1 | GPIO2 | GPIO3 | GPIO4 | GPIO5 | GPIO6 | GPIO7 | GPIO4 #define SEGMENT_ALL GPIO0 | GPIO1 | GPIO2 | GPIO3 | GPIO4 | GPIO5 | GPIO6 | GPIO7 | GPIO4
#define COMMON_PORT GPIOB #define COMMON_PORT GPIOB
#define COMMON_ALL GPIO15 | GPIO14 | GPIO13 | GPIO12 | GPIO11 #define COMMON_ALL GPIO15 | GPIO14 | GPIO13 | GPIO12 | GPIO11

2
openocd.cfg
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@ -20,7 +20,7 @@ ftdi_layout_signal nSRST -ndata 0x0020 -noe 0x0040
source [find target/stm32f1x.cfg] source [find target/stm32f1x.cfg]
reset_config srst_only #reset_config srst_only
# Search for RTT string from start of RAM # Search for RTT string from start of RAM
rtt setup 0x20000000 8192 "SEGGER RTT" rtt setup 0x20000000 8192 "SEGGER RTT"