370 lines
8.7 KiB
C
370 lines
8.7 KiB
C
/**************************************************************************
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* *
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* Copyright (C) 1986-1993 Silicon Graphics, Inc. *
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* *
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* These coded instructions, statements, and computer programs contain *
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* unpublished proprietary information of Silicon Graphics, Inc., and *
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* are protected by Federal copyright law. They may not be disclosed *
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* to third parties or copied or duplicated in any form, in whole or *
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* in part, without the prior written consent of Silicon Graphics, Inc. *
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* *
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**************************************************************************/
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/*
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* Counter/Timer functions
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*/
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#ident "$Revision: 1.22 $"
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#include "sys/types.h"
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#include "sys/param.h"
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#include "sys/ktime.h"
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#include "sys/cpu.h"
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#include "sys/sbd.h"
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#include "sys/immu.h"
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#include "sys/pda.h"
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#include "sys/errno.h"
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#include "sys/systm.h"
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#include "sys/cmn_err.h"
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#include <sys/hwperftypes.h>
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#include <sys/hwperfmacros.h>
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/*
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* Clock routines.
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*
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* The input frequency to COUNTER 2 (MASTER) is: 3.6864Mhz. This works
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* out to a period of 271.26736111.....nano-sec, which you can
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* see is not a whole number.
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*
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* On the IP20/IP22, the input frequency to counter 2 is 1Mhz
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* which gives much nicer numbers all around.
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*/
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#define COUNTER2_FREQ (timer_freq)
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#define MASTER_COUNT ((MASTER_FREQ/COUNTER2_FREQ))
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#define SCHED_COUNT ((COUNTER2_FREQ/HZ))
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#define PROF_COUNT ((COUNTER2_FREQ/fasthz))
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#define SLOW_COUNT 0
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#if defined(IP20) || defined(IP22) || defined(IP32) || defined(IPMHSIM)
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#define PROF_PERIOD 200 /* 1/5000 = 200 uSec */
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#else
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#define PROF_PERIOD 278 /* 1/3600 ~= 278 uSec */
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#endif
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#define MIN_INTERVAL 50
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u_int32_t t0interval, t1interval;
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u_int32_t t0timer, t1timer; /* compare values for timers */
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unsigned long cause_ip5_count;
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unsigned long cause_ip6_count;
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int _mr4kintrcnt;
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int _er4kintrcnt;
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int _lr4kintrcnt;
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int _pr4kintrcnt;
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extern void inithrestime(void);
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extern int fastick; /* computed in startkgclock() once */
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extern int fasthz; /* this paramter can be modified via lboot
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** or at run time using mpadmin()
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** it indicates the profiler clock speed
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** in ticks/sec
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*/
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extern u_int32_t get_r4k_counter(void); /* compare check */
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extern u_int32_t _get_r4k_counter(void); /* no compare check */
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extern u_int32_t set_r4k_compare(int);
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u_int32_t r4k_compare_shadow;
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void ackkgclock_r4000(void);
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void ackrtclock_r4000(void);
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/*
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* Start the real-time clock (really the programable interval clock!).
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*
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* counter 2 is the master counter, counter 0 is
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* the scheduling counter, and counter 1 is the profiling counter.
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*/
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void
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startrtclock_r4000(void)
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{
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int s = spl7();
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t0interval = SCHED_COUNT;
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t0timer = get_r4k_counter() + t0interval;
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r4k_compare_shadow = t0timer;
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set_r4k_compare(r4k_compare_shadow);
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/*
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* turning on clock(), take care of time initialization
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*/
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if (private.p_flags & PDAF_CLOCK)
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inithrestime();
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splx(s);
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}
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/*
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* Disable clocks
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*/
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static int first_call = 1;
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void
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stopclocks_r4000(void)
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{
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t0interval = 0;
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t0timer = 0xffffffff;
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t1interval = 0;
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t1timer = 0xffffffff;
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ackrtclock();
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ackkgclock();
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first_call = 0;
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}
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#ifdef DEBUG
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/*
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* Get current value of prof clock
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* We assume that the prof clock is free-running
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* We compute the # of mS that has elapsed since the last time we were called
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* Should be called with clock interrupts disabled
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* if the master period is 3600Hz (or 277.777 uS per 'tick') then
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* full wrap of the profiler will be 64K * 277.777 or 18204.439 mS
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* if the master period is 460800 (or 2.1701 uS per 'tick') then
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* full wrap of the profiler will be 64K * 2.1701 or 142.222mS
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* On IP20/IP22, the master period is 5000Hz (or 200 uS per
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* 'tick'), so the full wrap of the profiler will be 64K * 13000 mS
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*/
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extern unsigned short lastpval;
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extern int resetpdiff;
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int
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getprofclock_r4000()
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{
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register ushort count;
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register int msec = 0;
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if (private.fclock_freq != SLOW_COUNT)
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return(0);
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count = get_r4k_counter() & 0xffff;
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if (resetpdiff) {
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resetpdiff = 0;
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lastpval = count;
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return(0);
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}
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if (count < lastpval) {
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msec = ((lastpval - count) * PROF_PERIOD) / 1000;
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} else {
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msec = (((64*1024) - (count - lastpval)) * PROF_PERIOD) / 1000;
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}
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lastpval = count;
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return(msec);
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}
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#endif
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/*
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* Kgclock is used as an independent time base for statistics gathering.
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*/
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void
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startkgclock_r4000(void)
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{
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int ospl;
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int ofasthz = fasthz;
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#if !(defined(IP20) || defined(IP22) || !defined(IP32) || !defined(IPMHSIM))
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#define MIN_FASTHZ 900
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#define DEF_FASTHZ 1200
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#define MAX_FASTHZ 1800
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if (!fasthz) {
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fasthz = DEF_FASTHZ; /* default it if not set */
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} else if (fasthz != MIN_FASTHZ && fasthz != DEF_FASTHZ &&
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fasthz != MAX_FASTHZ) {
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cmn_err(CE_WARN,
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"%d Hz is not acceptable for the system fast clock.",fasthz);
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fasthz = DEF_FASTHZ;
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cmn_err(CE_CONT, "%d Hz is the alternate freq.\n",fasthz);
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}
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#else
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#define MIN_FASTHZ 500
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#define DEF_FASTHZ 1000
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#define MAX_FASTHZ 2500 /* 5000 causes the counter1 value to be 1, */
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/* which is not valid in mode 2 */
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if (!fasthz) {
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fasthz = DEF_FASTHZ; /* default it if not set */
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} else if (fasthz < MIN_FASTHZ) { /* clamp to range */
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cmn_err(CE_WARN,
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"%d Hz is too slow for the system fast clock.",fasthz);
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fasthz = MIN_FASTHZ;
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cmn_err(CE_CONT, "%d Hz will be used instead.\n",fasthz);
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} else if (fasthz > MAX_FASTHZ) {
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cmn_err(CE_WARN,
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"%d Hz is too fast for the system fast clock.",fasthz);
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fasthz = MAX_FASTHZ;
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cmn_err(CE_CONT, "%d Hz will be used instead.\n",fasthz);
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} else if ((COUNTER2_FREQ/fasthz) * fasthz != COUNTER2_FREQ) {
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/* Make sure fast rate gives us an integer divide */
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cmn_err(CE_WARN,
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"%d Hz is not an acceptable fast clock frequency.\n",
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fasthz);
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fasthz = DEF_FASTHZ;
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cmn_err(CE_CONT, "%d Hz will be used instead.\n",fasthz);
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}
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#endif
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if (!fastick || ofasthz != fasthz)
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fastick = USEC_PER_SEC/fasthz;
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/* flag for profiling clock */
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private.fclock_freq = PROF_COUNT;
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ospl = spl7();
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t1interval = PROF_COUNT;
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if (t0interval == 0) {
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t1timer = get_r4k_counter() + t1interval;
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r4k_compare_shadow = t1timer;
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set_r4k_compare(r4k_compare_shadow);
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} else {
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t1timer = t0timer;
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}
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splx (ospl);
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}
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/*
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* slowkgclock - keep running as a missed tick counter
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*/
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void
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slowkgclock_r4000(void)
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{
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int s = spl7();
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t1interval = SLOW_COUNT;
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if (t0interval == 0) {
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t1timer = get_r4k_counter() + t1interval;
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r4k_compare_shadow = t1timer;
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set_r4k_compare(r4k_compare_shadow);
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} else {
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t1timer = t0timer;
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}
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splx(s);
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private.fclock_freq = SLOW_COUNT;
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ackkgclock();
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}
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#define MAX_TIMER_DELAY 100000000
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/*ARGSUSED*/
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void
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r4kcount_intr_r4000(struct eframe_s *ep)
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{
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u_int32_t base_counter, maxinterval;
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int icount;
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int first_time = 1;
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#define ABOVE_TIME_LIMIT(a,b) \
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( ( (a) - (b) ) < ((u_int32_t) ( - ( maxinterval))) )
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#if defined(R10000)
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/*
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* If hw counters overflowed, process overflow intr.
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*/
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if (
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#if defined(R4000)
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/* the O2 uses a single kernel for R5K and R10K systems */
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IS_R10000() &&
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#endif
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hwperf_overflowed_intr()) {
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hwperf_intr(ep);
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return;
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}
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#endif /* R10000 */
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maxinterval = ((t0interval > t1interval) ? t0interval : t1interval);
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if (maxinterval == 0) { /* clocks disabled */
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set_r4k_compare(r4k_compare_shadow); /* ack interrupt */
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return;
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}
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while (1) {
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base_counter = _get_r4k_counter();
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/* check for premature interrupt */
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if (! ABOVE_TIME_LIMIT(base_counter, r4k_compare_shadow)) {
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if (first_time) {
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/* premature interrupt */
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_er4kintrcnt++;
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first_time = 0;
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set_r4k_compare(r4k_compare_shadow); /* ack interrupt */
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base_counter = get_r4k_counter();
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if (! ABOVE_TIME_LIMIT(base_counter,r4k_compare_shadow))
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return;
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} else
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return;
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}
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first_time = 0;
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/* check for missed interrupts */
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if (t0interval != 0) {
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icount = 0;
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while (ABOVE_TIME_LIMIT(base_counter,t0timer)) {
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icount++;
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t0timer += t0interval;
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}
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if (icount) {
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cause_ip5_count += icount;
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if (icount > 1)
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_mr4kintrcnt += (icount - 1);
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}
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r4k_compare_shadow = t0timer;
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}
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if (t1interval != 0) {
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icount = 0;
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while (ABOVE_TIME_LIMIT(base_counter,t1timer)) {
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icount++;
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t1timer += t1interval;
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}
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if (icount) {
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cause_ip6_count += icount;
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if (icount > 1)
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_mr4kintrcnt += (icount - 1);
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}
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if (! ABOVE_TIME_LIMIT(t1timer,t0timer))
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r4k_compare_shadow = t1timer;
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}
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set_r4k_compare(r4k_compare_shadow);
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}
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}
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#ifdef IPMHSIM
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extern int use_sableio;
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#endif /* IPMHSIM */
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void
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ackkgclock_r4000(void)
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{
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#ifndef IP32
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if (first_call)
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#ifdef IPMHSIM
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if (! use_sableio)
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#endif /* IPMHSIM */
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*(volatile char *)TIMER_ACK_ADDR = ACK_TIMER1;
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#endif
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}
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void
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ackrtclock_r4000(void)
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{
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#ifndef IP32
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if (first_call)
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#ifdef IPMHSIM
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if (! use_sableio)
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#endif /* IPMHSIM */
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*(volatile char *)TIMER_ACK_ADDR = ACK_TIMER0;
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#endif
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}
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