342 lines
8.1 KiB
C
342 lines
8.1 KiB
C
#ifndef __SYS_FPU_H__
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#define __SYS_FPU_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**************************************************************************
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* *
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* Copyright (C) 1990-1992 Silicon Graphics, Inc. *
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* *
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* These coded instructions, statements, and computer programs contain *
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* unpublished proprietary information of Silicon Graphics, Inc., and *
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* are protected by Federal copyright law. They may not be disclosed *
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* to third parties or copied or duplicated in any form, in whole or *
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* in part, without the prior written consent of Silicon Graphics, Inc. *
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* *
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**************************************************************************/
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/* ------------------------------------------------------------------ */
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/* | Copyright Unpublished, MIPS Computer Systems, Inc. All Rights | */
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/* | Reserved. This software contains proprietary and confidential | */
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/* | information of MIPS and its suppliers. Use, disclosure or | */
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/* | reproduction is prohibited without the prior express written | */
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/* | consent of MIPS. | */
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/* ------------------------------------------------------------------ */
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/* %Q% %I% %M% */
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#ident "$Revision: 5.9 $"
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/*
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* fpu.h -- fpu specific defines
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*/
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#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
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/*
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* Structure and constant definisions for floating-point instructions.
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*/
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union fpu_instr {
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unsigned int instr;
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struct {
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#ifdef _MIPSEB
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unsigned op : 6;
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unsigned base : 5;
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unsigned rt : 5;
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signed immed : 16;
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#endif /* _MIPSEB */
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#ifdef _MIPSEL
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signed immed : 16;
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unsigned rt : 5;
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unsigned base : 5;
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unsigned op : 6;
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#endif /* _MIPSEL */
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} itype;
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struct {
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#ifdef _MIPSEB
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unsigned op : 6;
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unsigned sub : 5;
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unsigned rt : 5;
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unsigned rs : 5;
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unsigned : 11;
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#endif /* _MIPSEB */
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#ifdef _MIPSEL
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unsigned : 11;
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unsigned rs : 5;
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unsigned rt : 5;
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unsigned sub : 5;
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unsigned op : 6;
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#endif /* _MIPSEL */
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} mtype;
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struct {
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#ifdef _MIPSEB
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unsigned op : 6;
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unsigned one : 1;
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unsigned fmt : 4;
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unsigned rt : 5;
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unsigned rs : 5;
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unsigned rd : 5;
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unsigned func : 6;
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#endif /* _MIPSEB */
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#ifdef _MIPSEL
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unsigned func : 6;
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unsigned rd : 5;
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unsigned rs : 5;
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unsigned rt : 5;
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unsigned fmt : 4;
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unsigned one : 1;
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unsigned op : 6;
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#endif /* _MIPSEL */
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} rtype;
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struct {
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#ifdef _MIPSEB
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unsigned op : 6;
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unsigned rr : 5;
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unsigned rt : 5;
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unsigned rs : 5;
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unsigned rd : 5;
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unsigned func : 3;
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unsigned fmt : 3;
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#endif /* _MIPSEB */
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#ifdef _MIPSEL
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unsigned fmt : 3;
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unsigned func : 3;
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unsigned rd : 5;
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unsigned rs : 5;
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unsigned rt : 5;
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unsigned rr : 5;
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unsigned op : 6;
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#endif /* _MIPSEL */
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} r4type;
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};
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#endif /* _LANGUAGE_C || _LANGUAGE_C_PLUS_PLUS */
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#define FMT_SINGLE 0
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#define FMT_DOUBLE 1
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#define FMT_EXTENDED 2
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#define FMT_QUAD 3
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#define FMT_WORD 4
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#define FMT_LONGWORD 5
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#define FMT_MAX 5
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#define FUNC_ADD 0
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#define FUNC_SUB 1
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#define FUNC_MUL 2
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#define FUNC_DIV 3
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#define FUNC_SQRT 4
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#define FUNC_ABS 5
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#define FUNC_MOV 6
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#define FUNC_NEG 7
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#define FUNC_ROUNDL 0x08
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#define FUNC_TRUNCL 0x09
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#define FUNC_CEILL 0x0a
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#define FUNC_FLOORL 0x0b
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#define FUNC_ROUND 0x0c
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#define FUNC_TRUNC 0x0d
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#define FUNC_CEIL 0x0e
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#define FUNC_FLOOR 0x0f
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#define FUNC_RECIP 0x15
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#define FUNC_RSQRT 0x16
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#define FUNC_CVTS 0x20
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#define FUNC_CVTD 0x21
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#define FUNC_CVTE 0x22
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#define FUNC_CVTQ 0x23
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#define FUNC_CVTW 0x24
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#define FUNC_CVTL 0x25
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/*
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* op codes for madd, msub, nmadd, nmsub; notice that these are
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* the same as some of the other floating point op codes, however
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* they are COP1X functions. To distinguish them in code, do
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* something like adding 64 to the op code. Then you can do
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* a switch statement with cases like
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* case FUNC_MADD+64:
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*/
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#define FUNC_MADD 0x4
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#define FUNC_MSUB 0x5
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#define FUNC_NMADD 0x6
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#define FUNC_NMSUB 0x7
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/*
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* The func field of floating-point compare opcodes are FUNC_FC with
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* some combination of conditions (COND_*).
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*/
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#define FUNC_FC 0x30
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#define COND_UN_MASK 0x1
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#define COND_EQ_MASK 0x2
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#define COND_LT_MASK 0x4
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#define COND_IN_MASK 0x8
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/*
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* The _MASK's are used to get a the specified field after it has been
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* shifted by _SHIFT and then bit patterns above can be used to test
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* the field. These are useful in assembly code.
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*/
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#define FPU_BASE_SHIFT 21
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#define FPU_BASE_MASK 0x1f
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#define FPU_FMT_SHIFT 21
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#define FPU_FMT_MASK 0xf
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#define FPU_RT_SHIFT 16
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#define FPU_RT_MASK 0x1f
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#define FPU_RT_FPRMASK 0x1e
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#define FPU_RS_SHIFT 11
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#define FPU_RS_MASK 0x1f
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#define FPU_RS_FPRMASK 0x1e
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#define FPU_RD_SHIFT 6
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#define FPU_RD_MASK 0x1f
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#define FPU_RD_FPRMASK 0x1e
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#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
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/*
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* These functions are used to get and set the floating-point control
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* registers. They are defined in the library module fp_control.s
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*/
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extern unsigned int get_fpc_csr(void);
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extern unsigned int set_fpc_csr(unsigned int);
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extern unsigned int get_fpc_irr(void);
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extern unsigned int get_fpc_eir(void);
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/*
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* Structure and constant definisions for the floating-point control
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* implementation and revision register (fpc_irr).
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*/
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union fpc_irr {
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unsigned int fi_word;
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struct {
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#ifdef _MIPSEB
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unsigned reserved : 16;
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unsigned implementation : 8;
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unsigned revision : 8;
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#endif /* _MIPSEB */
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#ifdef _MIPSEL
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unsigned revision : 8;
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unsigned implementation : 8;
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unsigned reserved : 16;
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#endif /* _MIPSEL */
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} fi_struct;
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};
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#endif /* _LANGUAGE_C || _LANGUAGE_C_PLUS_PLUS */
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/*
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* Constants for the implementation fieid of the fpc_irr structure for the
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* known implementations.
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*/
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#define IMPLEMENTATION_NONE 0 /* software */
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#define IMPLEMENTATION_R2360 1 /* board */
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#define IMPLEMENTATION_R2010 2 /* chip */
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/*
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* The constant IRR_IMP_MASK is to get at the implementation fieid of the
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* implementation and revision register. The other constants (IRR_IMP_*)
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* are constants for the known implementations.
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*/
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#define IRR_IMP_MASK 0x0000ff00
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#define IRR_IMP_NONE 0x00000000
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#define IRR_IMP_R2360 0x00000100
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#define IRR_IMP_R2010 0x00000200
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/*
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* Structure and constant definisions for the floating-point control
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* control and status register (fpc_csr).
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*/
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#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
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union fpc_csr {
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unsigned int fc_word;
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struct {
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#ifdef _MIPSEB
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unsigned fcc : 7; /* only used for mips4 */
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unsigned flush : 1;
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unsigned condition : 1;
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unsigned reserved1 : 5;
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unsigned ex_unimplemented : 1;
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unsigned ex_invalid : 1;
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unsigned ex_divide0 : 1;
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unsigned ex_overflow : 1;
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unsigned ex_underflow : 1;
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unsigned ex_inexact : 1;
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unsigned en_invalid : 1;
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unsigned en_divide0 : 1;
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unsigned en_overflow : 1;
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unsigned en_underflow : 1;
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unsigned en_inexact : 1;
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unsigned se_invalid : 1;
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unsigned se_divide0 : 1;
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unsigned se_overflow : 1;
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unsigned se_underflow : 1;
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unsigned se_inexact : 1;
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unsigned rounding_mode : 2;
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#endif /* _MIPSEB */
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#ifdef _MIPSEL
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unsigned rounding_mode : 2;
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unsigned se_inexact : 1;
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unsigned se_underflow : 1;
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unsigned se_overflow : 1;
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unsigned se_divide0 : 1;
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unsigned se_invalid : 1;
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unsigned en_inexact : 1;
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unsigned en_underflow : 1;
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unsigned en_overflow : 1;
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unsigned en_divide0 : 1;
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unsigned en_invalid : 1;
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unsigned ex_inexact : 1;
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unsigned ex_underflow : 1;
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unsigned ex_overflow : 1;
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unsigned ex_divide0 : 1;
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unsigned ex_invalid : 1;
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unsigned ex_unimplemented : 1;
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unsigned reserved1 : 5;
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unsigned condition : 1;
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unsigned flush : 1;
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unsigned fcc : 7; /* only used for mips4 */
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#endif /* _MIPSEL */
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} fc_struct;
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};
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#endif /* _LANGUAGE_C || _LANGUAGE_C_PLUS_PLUS */
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/*
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* Constants for the rounding_mode field of the fpc_csr
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*/
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#define ROUND_TO_NEAREST 0
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#define ROUND_TO_ZERO 1
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#define ROUND_TO_PLUS_INFINITY 2
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#define ROUND_TO_MINUS_INFINITY 3
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/* Masks to get at the unimplemented exception */
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#define FPCSR_FLUSH_ZERO 0x01000000
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#define FPCSR_UNIMP 0x00020000
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#define FPCSR_EXCEPTIONS 0x0003f000 /* all exceptions */
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#define FPCSR_ENABLES 0x00000f80
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#define FPCSR_FLAGS 0x0000007c
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#ifdef _LANGUAGE_ASSEMBLY
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/*
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* Assembly register names for the floating-point control registers.
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*/
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#define fpc_irr $0
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#define fpc_csr $31
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#endif /* _LANGUAGE_ASSEMBLY */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __SYS_FPU_H__ */
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