calmsacibis995
111 lines
3.9 KiB
C
111 lines
3.9 KiB
C
/**************************************************************************
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* *
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* Copyright (C) 1990, Silicon Graphics, Inc. *
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* *
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* These coded instructions, statements, and computer programs contain *
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* unpublished proprietary information of Silicon Graphics, Inc., and *
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* are protected by Federal copyright law. They may not be disclosed *
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* to third parties or copied or duplicated in any form, in whole or *
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* in part, without the prior written consent of Silicon Graphics, Inc. *
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* *
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**************************************************************************/
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#ident "sys/giobus.h: $Revision: 1.5 $"
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#ifndef _SYS_GIOBUS_H
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#define _SYS_GIOBUS_H
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/*
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* GIObus definitions defined in IP12.h/IP20.h/IP22.h are copied to this
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* file for Everest usage.
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*/
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/* Local IO Segment */
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#define LIO_ADDR 0x1f000000
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#define LIO_GFX_SIZE 0x00400000 /* 4 Meg for graphics boards */
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#define LIO_GIO_SIZE 0x00600000 /* 6 Meg for GIO Slots */
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/* GIO Interrupts */
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#define GIO_INTERRUPT_0 0
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#define GIO_INTERRUPT_1 1
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#define GIO_INTERRUPT_2 2
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/* GIO Slots */
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#define GIO_SLOT_0 0
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#define GIO_SLOT_1 1
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#define GIO_SLOT_GFX 2
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/* K1 seg addresses mapping to these slots */
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#if _MIPS_SIM == _ABI64
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#define GIO_SLOTGFX 0x900000001F000000
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#define GIO_SLOT0 0x900000001F400000
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#define GIO_SLOT1 0x900000001F600000
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#else
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#define GIO_SLOTGFX 0xBF000000 /* Valid only for IP22 */
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#define GIO_SLOT0 0xBF400000
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#define GIO_SLOT1 0xBF600000
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#endif
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#define GIOLEVELS 3 /* GIO 0 (FIFO), GIO 1 (GE), GIO 2 (VR) */
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#define GIOSLOTS 3 /* Graphics = 0, GIO 1 & 2 */
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/* GIO config register Address */
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#define GIO_SLOT0_ADDR 0x1fa20000 /* Slot 0 config register (w) */
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#define GIO_SLOT1_ADDR 0x1fa20004 /* Slot 1 config register (w) */
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/* GIO bus IDs
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*
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* Each GIO bus device identifies itself to the system by answering a
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* read with an "ID" value. IDs are either 8 or 32 bits long. IDs less
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* than 128 are 8 bits long, with the most significant 24 bits read from
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* the slot undefined.
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*
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* 32-bit IDs are currently divided into
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* bits 0-6 the product ID; ranges from 0x00 to 0x7F.
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* bit 7 0=GIO Product ID is 8 bits wide
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* 1=GIO Product ID is 32 bits wide.
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* bits 15-8 manufacturer's version for the product.
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* bit 16 0=GIO32 and GIO32-bis, 1=GIO64.
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* bit 17 0=no ROM present
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* 1=ROM present on this board AND next three words
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* space define the ROM.
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* bits 31-18 up to manufacturer.
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* Note that this may change in future 32-bit IDs
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*
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* IDs above 0x50/0xd0 are for 3rd party boards.
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*
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* Contact the Developer Program to allocate new IDs, recently Rick McLeod.
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*
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* This list must match the list in system.gen.
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*/
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#define GIO_SID_MASK 0xff /* only 8 bits valid for IDs<0x80 */
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#define GIO_LID_MASK 0xff /* only 8 bits of IDs for others */
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/* Short, 8-bit IDs */
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#define GIO_ID_XPI 0x01 /* XPI low cost FDDI */
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#define GIO_ID_GTR 0x02 /* GTR TokenRing */
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/* 0x04 Synchronous ISDN */
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/* 0x06 Canon Interface */
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/* 0x08 JPEG (Double Wide) */
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/* 0x09 JPEG (Single Wide) */
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#define GIO_ID_XPI_M0 0x0a /* XPI mez. FDDI device 0 */
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#define GIO_ID_XPI_M1 0x0b /* XPI mez. FDDI device 1 */
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#define GIO_ID_EP 0x0e /* E-Plex 8-port Ethernet */
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#define GIO_ID_IVAS 0x30 /* Lyon Lamb IVAS */
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/* Long, 32-bit IDs */
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#define GIO_ID_ATM 0x85 /* ATM board */
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/* 0x87 16 bit SCSI Card */
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/* 0x8c SMPTE 259M Video */
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/* 0x8d Babblefish Compression */
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#ifdef _KERNEL
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#include <sys/hwgraph.h>
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graph_error_t hpc_hwgraph_lookup(vertex_hdl_t *);
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graph_error_t gio_hwgraph_lookup(caddr_t, vertex_hdl_t *);
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#endif
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#endif /* _SYS_GIOBUS_H */
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