192 lines
5.5 KiB
C
192 lines
5.5 KiB
C
#include "sys/sbd.h"
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#include "sys/hal2.h"
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#include "sys/hpc3.h"
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/*#define EMULATION 1*/
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void
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init_aesrx()
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/*
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* init_aesrx() configures the AES receiver that hangs off the PBUS.
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* It assumes that the call to configure the PBUS for PIO has already
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* been made.
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*
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* This function does, among other things:
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* 1. brings the chip out of reset.
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* 2. selects the memory buffer mode (mode 0).
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*
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*/
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{
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unsigned long *aesrx_cr1 = (unsigned long *) PHYS_TO_K1(AESRX_CR1);
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unsigned long *aesrx_cr2 = (unsigned long *) PHYS_TO_K1(AESRX_CR2);
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unsigned long *aesrx_ier2 = (unsigned long *) PHYS_TO_K1(AESRX_SR2);
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unsigned long readback;
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/*
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* AESRX_CR1:
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*
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* bit function
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* 0 : ~RST (set to 1 to bring out of reset)
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* 1 : UNUSED
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* 2 : B0 (selects buffer memory mode; 0 for buffer mode 0)
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* 3 : B1 (selects buffer memory mode; 0 for buffer mode 0)
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* 4 : CS2/~CS1 (selects channel status subframe; set to 0)
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* 5 : IER/~SR (set to 0 for status register enable)
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* 6 : FCEN (freq. comp. enable; set to 0)
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* 7 : FPLL (FSYNC from PLL; set to 0...get FSYNC from RXP/RXN)
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*
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* result = 0000 0001 = 0x1
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*/
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#ifdef EMULATION
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*aesrx_cr1 = 0x0; /* specifically reset the chip */
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us_delay(1);
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readback = 0xff & *aesrx_cr1;
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printf("aesrx_cr1 after resetting chip: %x\n", readback);
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*aesrx_cr1 = 0x21;
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us_delay(1);
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readback = 0xff & *aesrx_cr1;
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if (readback != 0x21) {
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printf("aesrx_cr1 didn't accept write value: %x\n", readback);
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}
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*aesrx_ier2 = 0x80;
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us_delay(1);
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readback = 0xff & *aesrx_ier2;
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if (readback != 0x80) {
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printf("aesrx_ier2 didn't accept write value: %x\n", readback);
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}
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#else
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readback = 0xff & *aesrx_cr1;
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printf("BEFORE: aesrx_cr1 = %x\n", readback);
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*aesrx_cr1 = 0x1;
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us_delay(50);
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readback = 0xff & *aesrx_cr1;
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if (readback != 0x1) {
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printf("aesrx_cr1 didn't accept write value: %x\n", readback);
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}
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readback = 0xff & *aesrx_cr1;
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printf("AFTER: aesrx_cr1 = %x\n", readback);
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#endif /*EMULATION*/
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/*
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* AESRX_CR2:
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*
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* bit function
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* 0 : SCED (1=data on falling edge of SCK; 0=rising edge)
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* 1 : MSTR (1=SCK & FSYNC are outputs)
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* 2 : FSF0 (=0)
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* 3 : FSF1 (=1)
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* 4 : SDF0 (=0)
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* 5 : SDF1 (=1)
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* 6 : SDF2 (=0)
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* 7 : ROER (1=repeat audio data on error)
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*
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* result = 1010 1011 = 0xab
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*/
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readback = 0xff & *aesrx_cr2;
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printf("BEFORE: aesrx_cr2 = %x\n", readback);
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*aesrx_cr2 = 0xab;
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us_delay(50);
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readback = 0xff & *aesrx_cr2;
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if (readback != 0xab) {
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printf("aesrx_cr2 didn't accept write value: %x\n", readback);
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}
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readback = 0xff & *aesrx_cr2;
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printf("AFTER: aesrx_cr2 = %x\n", readback);
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}
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void
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init_aestx()
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/*
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* init_aestx() configures the AES tranmitter that hangs off the PBUS.
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* It assumes that the call to configure the PBUS for PIO has already
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* been made.
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*
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* This function does, among other things:
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* 1. brings the chip out of reset.
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* 2. unmutes the chip so that audio will be transmitted.
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* 3. places the memory in the correct mode for our application.
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*
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* Note: nothing is done with the AES TX status register as it
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* contains only flags that indicate position into buffer memory
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* for channel status and user status bytes.
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*/
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{
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unsigned long *aestx_cr1 = (unsigned long *) PHYS_TO_K1(AESTX_CR1);
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unsigned long *aestx_cr2 = (unsigned long *) PHYS_TO_K1(AESTX_CR2);
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unsigned long *aestx_cr3 = (unsigned long *) PHYS_TO_K1(AESTX_CR3);
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unsigned long readback;
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/*
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* AESTX_CR2:
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*
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* bit function
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* 0 : ~RST (set to 1 to bring out of reset)
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* 1 : ~MUTE (must be set to 1 for data tranmission)
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* 2 : CRCE (channel status CRC enable...professional mode only)
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* 3 : B0 (selects buffer memory mode; 0 for buffer mode 0)
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* 4 : B1 (selects buffer memory mode; 0 for buffer mode 0)
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* 5 : V (validity bit fo current sample; set to 1?)
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* 6 : M0 (selects MCK freq.; = 0)
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* 7 : M1 (selects MCK freq.; = 1)
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*
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* result = 1000 0111 = 0x87
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*
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* go with this for the time being. XXX
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* 1000 0111 = 0x87
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*/
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*aestx_cr2 = 0x0; /* explicitly reset the TX */
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us_delay(50);
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readback = 0xff & *aestx_cr2;
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if (readback != 0x0) printf("aestx_cr2 reset failed.\n");
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*aestx_cr2 = 0x87;
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us_delay(1);
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readback = 0xff & *aestx_cr2;
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if (readback != 0x87) printf("aestx_cr2 setup failed.\n");
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/*
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* AESTX_CR1:
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*
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* bit function
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* 0 : MASK0 (set to 0)
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* 1 : MASK1 (set to 0)
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* 2 : MASK2 (set to 0)
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* 3 : xxx
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* 4 : xxx
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* 5 : xxx
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* 6 : TRNPT (transparent; for syncing output to input)
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* 7 : BKST (block start; for syncing output to input)
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*
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* result = 0000 0000 = 0x00
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*/
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*aestx_cr1 = 0x00;
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us_delay(50);
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readback = 0xff & *aestx_cr1;
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if (readback != 0x00) printf("aestx_cr1 setup failed.\n");
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/*
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* AESTX_CR3:
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*
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* bit function
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* 0 : SCED = 1
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* 1 : MSTR = 0
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* 2 : FSF0 = 0
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* 3 : FSF1 = 1
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* 4 : SDF0 = 0
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* 5 : SDF1 = 0
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* 6 : SDF2 = 0
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* 7 : xxx
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*
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* result = 0000 1001 = 0x9
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*/
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*aestx_cr3 = 0x9;
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us_delay(50);
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readback = 0xff & *aestx_cr3;
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if (readback != 0x9) printf("aestx_cr3 setup failed.\n");
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}
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