118 lines
2.9 KiB
C
118 lines
2.9 KiB
C
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#define DP_RAM_BASE 0xbf312000
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/* flash rom and misc control register */
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#define FPROM_WR_EN 0x01
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#define PSWD_CLR_EN 0x02
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#define NIC_HOLD_LO 0x04
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#define NIC_DATA 0x08
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#define RED_DIS 0x10
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#define GREEN_DIS 0x20
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#define DP_RAM_WR_EN 0x40
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#define RTC 0xbf3a0007
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#define RTC2 0xbf3a0107
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#define PC_INT_STATUS 0xbf310014
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#define PC_INT_MASK 0xbf31001c
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#define COUNTERS 0xbf340000
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#define CMP1_ALIAS 0xbf350004
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#define CMP2_ALIAS 0xbf360004
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#define CMP3_ALIAS 0xbf370004
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#define CMP1_INT_BIT 0x2000
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#define CMP2_INT_BIT 0x4000
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#define CMP3_INT_BIT 0x8000
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typedef struct pc_base_regs{
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unsigned long long ring_base;
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unsigned long long flash_prom_cntrl;
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unsigned long long mace_int_status;
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unsigned long long mace_int_mask;
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} pc_base_regs_t;
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typedef struct counters{
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unsigned long long ust;
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unsigned long long cmp1;
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unsigned long long cmp2;
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unsigned long long cmp3;
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unsigned long long aud_in_msc_ust;
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unsigned long long aud_out1_msc_ust;
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unsigned long long aud_out2_msc_ust;
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unsigned long long vid_in1_msc_ust;
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unsigned long long vid_in2_msc_ust;
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unsigned long long vid_out_msc_ust;
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}counters_t;
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#define KEYBOARD 0xbf320000
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#define MOUSE 0xbf320040
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#define EOTX_CLK_INHIBIT 0x01
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#define TX_ENABLE 0x02
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#define TX_INT_ENABLE 0x04
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#define RX_INT_ENABLE 0x08
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#define CLK_INHIBIT 0x10
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#define CLK_SIGNAL 0x01
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#define CLK_INHBT_SIG 0x02
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#define TX_IN_PROG 0x04
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#define TX_BUF_EMPTY 0x08
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#define RX_BUF_FULL 0x10
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#define RX_IN_PROG 0x20
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#define PARITY_ERR 0x40
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#define FRAME_ERR 0x80
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#define CLK_SIGNAL_RX 0x010
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#define CLK_INHBT_SIG_RX 0x020
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#define TX_IN_PROG_RX 0x040
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#define TX_BUF_EMPTY_RX 0x080
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#define RX_BUF_FULL_RX 0x100
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#define RX_IN_PROG_RX 0x200
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#define PARITY_ERR_RX 0x400
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#define FRAME_ERR_RX 0x800
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struct sync_serial{
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long long tx_buf;
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long long rx_buf;
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long long control;
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long long status;
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};
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/*
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* ISA bus definitions
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*/
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#define K1_BASE 0xA0000000
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#define PERPH_CONT_OFFSET 0x300000
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#define MACE_BASE_ADDRS 0x1F000000
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#define ISA_BUS_OFFSET 0x380000
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#define SERIAL_A_OFFSET 0x10000
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#define SERIAL_B_OFFSET 0x18000
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#define ISA_DMA_REG_OFFSET 0x10000
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#define ISA_BUS_ADDRS (K1_BASE+MACE_BASE_ADDRS+ISA_BUS_OFFSET)
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#define SERIAL_A_ADDRS ISA_BUS_ADDRS + SERIAL_A_OFFSET
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#define SERIAL_B_ADDRS ISA_BUS_ADDRS + SERIAL_B_OFFSET
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typedef struct {
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char pad1[7];
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unsigned char rbr_thr;
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char pad2[255];
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unsigned char ier;
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char pad3[255];
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unsigned char iir_fcr;
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char pad4[255];
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unsigned char lcr;
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char pad5[255];
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unsigned char mcr;
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char pad6[255];
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unsigned char lsr;
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char pad7[255];
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unsigned char msr;
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char pad8[255];
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unsigned char scr;
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}isa_ace_regs_t;
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