220 lines
6.8 KiB
C
220 lines
6.8 KiB
C
#ifndef __SYS_CRIME_GBE_H__
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#define __SYS_CRIME_GBE_H__
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/**************************************************************************
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* Copyright (C) 1994, Silicon Graphics, Inc. *
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* These coded instructions, statements, and computer programs contain *
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* unpublished proprietary information of Silicon Graphics, Inc., and *
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* are protected by Federal copyright law. They may not be disclosed *
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* to third parties or copied or duplicated in any form, in whole or *
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* in part, without the prior written consent of Silicon Graphics, Inc. *
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**************************************************************************/
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/*
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* $Revision: 1.1 $
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*/
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typedef volatile unsigned int vui;
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#define GBECHIP_ADDR 0x16000000
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#define GBE_ID 0x666
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#define GBE_GUTS \
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vui ctrlstat; /* control and status 0x0000 */\
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vui dotclock; /* dot clock parameters 0x0004 */\
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vui i2c; /* i2c interface 0x0008 */\
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vui sysclk; /* system clock PLL control 0x000c */\
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vui i2cfp; /* i2c flat panel control 0x0010 */\
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vui id; /* device id and revision 0x0014 */\
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char _pad0[ padbytes(0x10000,id) ];\
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\
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vui vt_xy; /* current dot coords (inc. blank) 0x10000 */\
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vui vt_xymax; /* maximum dot coords (inc. blank) 0x10004 */\
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vui vt_vsync; /* vsync on/off 0x10008 */\
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vui vt_hsync; /* hsync on/off 0x1000c */\
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vui vt_vblank; /* vblank on/off 0x10010 */\
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vui vt_hblank; /* hblank on/off 0x10014 */\
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vui vt_flags; /* polarity of various vt signals 0x10018 */\
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vui vt_f2rf_lock; /* f2rf and framelock y coords 0x1001c */\
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vui vt_intr01; /* intr 0,1 y coords 0x10020 */\
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vui vt_intr23; /* intr 2,3 y coords 0x10024 */\
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\
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vui fp_hdrv; /* flat panel hdrv on/off 0x10028 */\
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vui fp_vdrv; /* flat panel vdrv on/off 0x1002c */\
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vui fp_de; /* flat panel de on/off 0x10030 */\
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\
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vui vt_hpixen; /* internal horiz pixel on/off 0x10034 */\
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vui vt_vpixen; /* internal vert pixel on/off 0x10038 */\
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vui vt_hcmap; /* cmap write enable (horiz) 0x1003c */\
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vui vt_vcmap; /* cmap write enable (vert) 0x10040 */\
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\
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vui did_start_xy; /* eol/f reset values for did_xy 0x10044 */\
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vui crs_start_xy; /* eol/f reset values for crs_xy 0x10048 */\
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vui vc_start_xy; /* eol/f reset values for vc_xy 0x1004c */\
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\
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char _pad1[ padbytes(0x20000,vc_start_xy) ];\
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\
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vui ovr_width_tile; /* overlay buffer width in tiles 0x20000 */\
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vui ovr_control; /* tile list ptr and dma enable 0x20004 */\
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char _pad2[ padbytes(0x30000,ovr_control) ];\
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\
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vui frm_size_tile; /* frame buffer h/w in tiles 0x30000 */\
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vui frm_size_pixel; /* frame buffer h/w in pixels 0x30004 */\
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vui frm_control; /* tile list ptr and dma enable 0x30008 */\
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char _pad3[ padbytes(0x40000,frm_control) ];\
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\
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vui did_control; /* DID table ptr and dma enable 0x40000 */\
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char _pad4[ padbytes(0x48000,did_control) ];\
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\
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vui mode_regs[32]; /* xmap mode registers 0x48000 */\
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char _pad5[ padbytes(0x50000,mode_regs) ];\
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\
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vui cmap[4608]; /* color palette 0x50000 */\
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char _pad6[ padbytes(0x58000,cmap) ];\
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\
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vui cm_fifo; /* # empty slots in cmap fifo 0x58000 */\
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char _pad7[ padbytes(0x60000,cm_fifo) ];\
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\
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vui gmap[256]; /* gamma ramp 0x60000 */\
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char _pad8[ padbytes(0x70000,gmap) ];\
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\
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vui crs_pos; /* cursor position 0x70000 */\
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vui crs_ctl; /* cursor enable, xhair enable 0x70004 */\
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vui crs_cmap[3]; /* cursor colors 1-3 0x70008 */\
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char _pad9[ padbytes(0x78000,crs_cmap) ];\
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\
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vui crs_glyph[64]; /* cursor glyph 0x78000 */\
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char _pad10[ padbytes(0x80000, crs_glyph) ];\
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\
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/* video capture stuff 0x80000 */\
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vui vc_lr; /* x coords of capture window 0x80000 */\
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vui vc_tb; /* y coords of capture window 0x80004 */\
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vui vc_filters; /* capture filter stuff 0x80008 */\
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vui vc_control; /* misc video capture stuff 0x8000c */
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#define FOO ((struct gbechip *)(0))
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/*
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* physical gbe chip address map,
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* contains large gaps in address space,
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* about 512kb total.
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*/
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struct gbechip {
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#define padbytes(n,h) \
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(n - ((int)&(FOO->h) - (int)FOO) - sizeof(FOO->h))
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GBE_GUTS
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};
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/*
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* gbe chip virtual address map. The
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* 9 physical pages that contain gbe registers are
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* mapped contiguously into Xsgi virtual address space.
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*/
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struct gbechip_nopad {
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/* Pad to next page boundary */
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#undef padbytes
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#define padbytes(n,h) \
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((n - ((int)&(FOO->h) - (int)FOO) - sizeof(FOO->h)) % _PAGESZ)
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GBE_GUTS
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};
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#undef padbytes
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#undef FOO
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typedef struct _gbe_videotiming {
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int framerate; /* frames/sec */
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int dottime; /* picoseconds/pixel */
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/*
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* Assume each line looks like
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* horizontal {front porch, sync, back porch, visible}
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*/
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int hsync_start, hsync_length; /* in pixels */
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int hvis_start, hvis_length; /* in pixels */
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/*
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* dot clock stuff
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*/
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int m, n, l; /* clock generation parameters */
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}gbevt_t;
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/*
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* The board manager and kernel manage some gbe operations
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* via shared memory, laid out as follows.
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*/
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#define N_GBE_DID_TILES 3
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typedef struct {
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unsigned int age; /* 'when' this table became PENDING */
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int status; /* current status of this table -
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* GBE_RS_{FREE, PENDING, ACTIVE} */
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paddr_t paddr; /* physical address of memory
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* associated with resource (fb/ov
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* tile list, DID tile) */
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} gbe_resource_status;
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#define GBE_RS_FREE 0
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#define GBE_RS_PENDING 1 /* waiting to be loaded into gbe */
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#define GBE_RS_ACTIVE 2 /* currently loaded in gbe */
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/*
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* This data structure is part of the Xsgi context shadow area.
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* The normal and overlay tile lists referenced by the gbe hw
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* are stored here, and must be aligned on a 32 byte boundary.
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* The tiles used to triple buffer the DID table are
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* stored in struct crimeChunk crmGbeTables, and are mapped
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* into the server address space. The server virtual address
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* of the did tables is stored in did_tile_vaddr[].
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*/
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typedef struct _gbedata {
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tilenum_t fblist[80];
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tilenum_t ovlist[32];
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paddr_t fblistaddr; /* physical address of fblist[] */
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paddr_t ovlistaddr; /* physical address of ovlist[] */
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caddr_t did_tile_vaddr[N_GBE_DID_TILES];
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gbe_resource_status did_tables[N_GBE_DID_TILES];
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} gbedata_t;
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/*
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* XXX miscellaneous gbe stuff. Use the
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* x gbe headers when they move to gfx/kern/sys
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*/
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/*
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* gbe mode register bits
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*/
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#define GBEWT_BUF_BOT 0x1
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#define GBEWT_BUF_TOP 0x2
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#define GBE_OVR_CMAP_OFFSET 0x1100
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#define GBE_WID_TYPE_MASK 0x1C
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#define GBE_WID_TYPE_SHIFT 2
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#define GBE_TYPE_I12 (1 << GBE_WID_TYPE_SHIFT)
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#define GBE_TYPE_RGB5 (4 << GBE_WID_TYPE_SHIFT)
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#define GBE_TYPE_RGB8 (5 << GBE_WID_TYPE_SHIFT)
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#define gbeSetReg(hwpage, reg, val ) \
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(hwpage)->reg = (val);
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#define gbeSetTable(hwpage, reg, index, val) \
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(hwpage)->reg[index] = (val);
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#define GBE_CMFIFO_MASK 0x3f
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#ifdef REAL_HARDWARE
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#define gbeWaitCmapFifo(hwpage, n) \
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while (((hwpage)->cmfifo & GBE_CMFIFO_MASK) < (n));
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#else
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#define gbeWaitCmapFifo(hwpage, n)
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#endif
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#endif /* __SYS_CRIME_GBE_H__ */
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