316 lines
7.6 KiB
ArmAsm
316 lines
7.6 KiB
ArmAsm
#ident "$Id: handler.s,v 1.1 1994/07/21 00:18:09 davidl Exp $"
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/**************************************************************************
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* *
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* Copyright (C) 1993, Silicon Graphics, Inc. *
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* *
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* These coded instructions, statements, and computer programs contain *
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* unpublished proprietary information of Silicon Graphics, Inc., and *
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* are protected by Federal copyright law. They may not be disclosed *
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* to third parties or copied or duplicated in any form, in whole or *
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* in part, without the prior written consent of Silicon Graphics, Inc. *
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* *
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**************************************************************************/
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#include "sys/regdef.h"
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#include "sys/fpregdef.h"
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#include "sys/asm.h"
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#include "sys/sbd.h"
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#include "saioctl.h"
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#include "pdiag.h"
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#include "monitor.h"
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.globl warm_reset
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.globl _test_return
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.text
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.align 2
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/*
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* void InstallHandler(int *HandlerPtr())
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*
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* Install the user exception handler for all types of exception.
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*
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* Note: The exception vector is always reset to zero on exception.
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*/
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LEAF(InstallHandler)
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move VectorReg,a0 # Install the vector in VectorReg
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j ra
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END(InstallHandler)
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/*
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* void RemoveHandler(void)
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*
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* Remove (clear) the global exception vector.
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*/
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LEAF(RemoveHandler)
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move VectorReg,zero
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j ra
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END(RemoveHandler)
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/*------------------------------------------------------------------------+
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| Routine : void _bev_handler (int excpt_type) |
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| Function : This is a general exception vector in PROM space. UTLB and |
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| genenratl exception vector to here when the BEV bit in the status reg |
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| is set to 1. |
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+------------------------------------------------------------------------*/
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LEAF(_bev_handler)
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.set noreorder
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.set noat
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la Bevhndlr, _bev_handler # always capture Bev exception
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beq VectorReg, zero, 1f # any user handler installed?
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nop
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j VectorReg
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move VectorReg, zero # (BDSLOT) clear vector on exception
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.set at
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1:
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/*
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* Immediately read C0/BC states into s0-s6 so that they are close
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* to the true states in which the exception occured.
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*/
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mfc0 s0, C0_SR
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mfc0 s1, C0_EPC
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mfc0 s2, C0_CAUSE
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move s3, ra
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mfc0 s5, C0_BADVADDR
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#ifndef SABLE
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mfc0 s4, C0_ECC
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#endif
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mfc0 s6, C0_CACHE_ERR
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mfc0 s7, C0_ERROR_EPC
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.set reorder
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_disp_imsg:
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bne ExceptReg, EXCEPT_UTLB, 1f # type of exception (may be bogus)
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la a0, utlb_msg
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j _disp_code
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1:
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bne ExceptReg, EXCEPT_XTLB, 1f
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la a0, xtlb_msg
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j _disp_code
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1:
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bne ExceptReg, EXCEPT_CACHE, 1f
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la a0, cache_err_msg
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jal puts
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j _disp_regs
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1:
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la a0, excpt_msg # general exception msg
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_disp_code:
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jal puts # display header message
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move t0, s2 # determine the cause and
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andi t0, 0x03c # display the type of exception.
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la a0, excpt_code
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addu a0, t0
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lw a0, (a0)
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jal puts
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_disp_regs:
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PRINT("\n STATUS : 0x")
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PUTHEX(s0)
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PRINT(" EPC : 0x")
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PUTHEX(s1)
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PRINT("\n CAUSE : 0x")
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PUTHEX(s2)
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PRINT(" R31/RA : 0x")
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PUTHEX(s3)
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PRINT("\n ECC : 0x")
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PUTHEX(s4)
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PRINT(" CACHE_ERR : 0x")
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PUTHEX(s6)
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PRINT("\n ERROR EPC : 0x")
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PUTHEX(s7)
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PRINT("\n PRID : 0x")
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.set noreorder
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mfc0 t0, C0_PRID
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nop
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.set reorder
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PUTHEX(t0)
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PRINT(" BADVADDR : 0x")
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PUTHEX(s5)
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/*
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* PRINT FPA status registers if SR_CU1 set
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*/
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and t0, s0, SR_CU1
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beq t0, zero, 1f # SR_CU1 set?
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PRINT("\n FPA/REV: 0x")
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.set noreorder
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cfc1 t0, zero
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nop
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.set reorder
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PUTHEX(t0)
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PRINT(" FPA/CSR : 0x")
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.set noreorder
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cfc1 t0, fcr31
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nop
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.set reorder
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PUTHEX(t0)
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1:
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/*
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* Clear some error/status bits in C0_SR
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*/
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and t0, s0, SR_CU1|SR_BEV
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or t0, SR_BEV # enable BEV vector
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.set noreorder
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mtc0 t0, C0_SR
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mtc0 zero, C0_CAUSE # clear cause register
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nop
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.set reorder
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la a0, _crlf
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jal puts
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la a0, _crlf
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jal puts
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jal date # print current time
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jal _pause # pause until a key entered
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li a0, _CNFGSTATUS
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jal lw_nvram
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and t0, v0, TAFLAG_MASK # check if any test active
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beq t0, zero, 1f # if NO, do warm reset
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li v0,1 # set v0 to 1 as error indicator
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.set noreorder
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j _test_return
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c0 C0_RFE
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.set reorder
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1:
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.set noreorder
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j warm_reset # else return to RunTests()
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c0 C0_RFE
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.set reorder
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END(_bev_handler)
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/*
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* void _intr_jmp(void)
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*
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* Ctrl-C is hard wired to here from putchar()
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*/
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LEAF(_intr_jmp)
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li a0, _CNFGSTATUS
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jal lw_nvram
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and t0, v0, TAFLAG_MASK # check if any test active
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beq t0, zero, 1f # if NO, do warm reset
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la a0, _crlf
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jal puts
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la a0, _crlf
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jal puts
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li a0, _MODNAME # print current module name
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jal lw_nvram
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move a0, v0
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jal puts
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PRINT(" - ABORTED by Ctl-C. Laps = ")
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li a0, _PASSCNT # print pass count
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jal lw_nvram
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PUTUDEC(v0)
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PRINT(" Total Errors = ")
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li a0, _ERRORCNT
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jal lw_nvram # get previous error count
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PUTUDEC(v0)
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la a0, _crlf
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jal puts
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1:
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j warm_reset # just do warm_reset
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END(_intr_jmp)
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/*------------------------------------------------------------------------+
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| test messages |
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+------------------------------------------------------------------------*/
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.data
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.align 2
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.globl excpt_code
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excpt_code:
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.word ext_int
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.word mod_int
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.word tlbl_int
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.word tlbs_int
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.word adel_int
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.word ades_int
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.word ibe_int
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.word dbe_int
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.word sys_int
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.word bp_int
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.word ri_int
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.word cpu_int
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.word ovf_int
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.word trap_int
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.word vcei_int
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.word fpe_int
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.word excpt_16
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.word excpt_17
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.word excpt_18
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.word excpt_19
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.word excpt_20
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.word excpt_21
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.word excpt_22
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.word watch_int
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.word excpt_24
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.word excpt_25
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.word excpt_26
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.word excpt_27
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.word excpt_28
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.word excpt_29
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.word excpt_30
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.word vced_int
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.align 2
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utlb_msg: .asciiz "\n\nUTLB-Miss Exception: "
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xtlb_msg: .asciiz "\n\nXTLB_Miss Exception: "
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cache_err_msg: .asciiz "\n\nCACHE ERROR Exception: "
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excpt_msg: .asciiz "\n\nUnexpected Exception: "
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ext_int: .asciiz "0 - INT: External Interrupt"
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mod_int: .asciiz "1 - MOD: TLB Modification Exception"
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tlbl_int: .asciiz "2 - RMISS: TLB Miss Exception (load/I-fetch)"
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tlbs_int: .asciiz "3 - WMISS: TLB Miss Exception (store)"
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adel_int: .asciiz "4 - RADE: Address Error Exception (load/I-fetch)"
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ades_int: .asciiz "5 - WADE: Address Error Exception (store)"
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ibe_int: .asciiz "6 - IBE: Bus Error Exception (I-fetch)"
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dbe_int: .asciiz "7 - DBE: Bus Error Exception (data load/store)"
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sys_int: .asciiz "8 - SYSCALL: SysCall Exception"
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bp_int: .asciiz "9 - BREAK: Break Point Exception"
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ri_int: .asciiz "10 - RI: Reserved Instruction Exception"
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cpu_int: .asciiz "11 - CpU: Coprocessor Unusable"
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ovf_int: .asciiz "12 - OV: Arithmetic Overflow"
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trap_int: .asciiz "13 - TRAP: Trap Exception (MIPS II)"
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vcei_int: .asciiz "14 - VCEI: Virtual Coherency Exception Instruction"
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fpe_int: .asciiz "15 - FPE: Floating Point exception (R4000)"
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excpt_16: .asciiz "16 - Reserved Exception Code"
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excpt_17: .asciiz "17 - Reserved Exception Code"
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excpt_18: .asciiz "18 - Reserved Exception Code"
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excpt_19: .asciiz "19 - Reserved Exception Code"
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excpt_20: .asciiz "20 - Reserved Exception Code"
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excpt_21: .asciiz "21 - Reserved Exception Code"
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excpt_22: .asciiz "22 - Reserved Exception Code"
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watch_int: .asciiz "23 - WATCH: WatchHi/WatchLo address referenced"
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excpt_24: .asciiz "24 - Reserved Exception Code"
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excpt_25: .asciiz "25 - Reserved Exception Code"
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excpt_26: .asciiz "26 - Reserved Exception Code"
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excpt_27: .asciiz "27 - Reserved Exception Code"
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excpt_28: .asciiz "28 - Reserved Exception Code"
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excpt_29: .asciiz "29 - Reserved Exception Code"
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excpt_30: .asciiz "30 - Reserved Exception Code"
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vced_int: .asciiz "31 - Virtual Coherency Exception Data(R4000)"
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