289 lines
7.9 KiB
C
289 lines
7.9 KiB
C
#ifndef __IDE_GODZILLA_H__
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#define __IDE_GODZILLA_H__
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/*
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* d_godzilla.h
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*
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* IDE godzilla header (common for godzilla chip set)
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*
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* Copyright 1995, Silicon Graphics, Inc.
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* ALL RIGHTS RESERVED
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*
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* UNPUBLISHED -- Rights reserved under the copyright laws of the United
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* States. Use of a copyright notice is precautionary only and does not
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* imply publication or disclosure.
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*
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* U.S. GOVERNMENT RESTRICTED RIGHTS LEGEND:
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* Use, duplication or disclosure by the Government is subject to restrictions
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* as set forth in FAR 52.227.19(c)(2) or subparagraph (c)(1)(ii) of the Rights
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* in Technical Data and Computer Software clause at DFARS 252.227-7013 and/or
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* in similar or successor clauses in the FAR, or the DOD or NASA FAR
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* Supplement. Contractor/manufacturer is Silicon Graphics, Inc.,
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* 2011 N. Shoreline Blvd. Mountain View, CA 94039-7311.
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*
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* THE CONTENT OF THIS WORK CONTAINS CONFIDENTIAL AND PROPRIETARY
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* INFORMATION OF SILICON GRAPHICS, INC. ANY DUPLICATION, MODIFICATION,
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* DISTRIBUTION, OR DISCLOSURE IN ANY FORM, IN WHOLE, OR IN PART, IS STRICTLY
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* PROHIBITED WITHOUT THE PRIOR EXPRESS WRITTEN PERMISSION OF SILICON
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* GRAPHICS, INC.
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*/
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#ident "ide/godzilla/include/d_godzilla.h: $Revision: 1.36 $"
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#if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
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typedef struct _Test_Info {
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char *TestStr;
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char *ErrStr;
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} _Test_Info;
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/*
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* Godzilla Register Read-Write Modes
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*/
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#define GZ_READ_ONLY 0x0
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#define GZ_READ_WRITE 0x1
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#define GZ_WRITE_ONLY 0x2
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#define GZ_NO_ACCESS 0x3
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/*
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* Modes of operation in modify register macros
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*/
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#define CLR_MODE 0x0
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#define SET_MODE 0x1
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#define D_EOLIST -1
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/*
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* FRU definitions: now all in d_frus.h
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*/
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/*
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* Multi-purpose masks
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*/
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#define MASK_8 0x00000000000000ff
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#define MASK_16 0x000000000000ffff
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#define MASK_32 0x00000000ffffffff
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/*
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* flags
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*/
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/* for hb_chkout function */
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#define CHK_HEART 1
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#define DONT_CHK_HEART 0
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#define CHK_BRIDGE 1
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#define DONT_CHK_BRIDGE 0
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#define CHK_XBOW 1
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#define DONT_CHK_XBOW 0
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/* for hb_reset function */
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#define RES_HEART 1
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#define DONT_RES_HEART 0
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#define RES_BRIDGE 1
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#define DONT_RES_BRIDGE 0
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#define RES_XBOW 1
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#define DONT_RES_XBOW 0
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/* for hb_status function */
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#define HEART_STAT 1
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#define BRIDGE_STAT 1
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/*
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* Variables used by all tests
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*/
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#if DEFINE_ERROR_DATA /* set in ide/godzilla/uif/status.c before include */
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bool_t d_exit_on_error = 0;
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__uint64_t d_errors = 0;
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#else
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extern bool_t d_exit_on_error;
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extern __uint64_t d_errors;
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#endif /* DEFINE_ERROR_DATA */
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/* functions */
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extern int report_pass_or_fail( _Test_Info *Test, __uint32_t errors);
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extern __uint64_t pio_reg_mod_32(__uint32_t, __uint32_t, int);
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extern __uint64_t pio_reg_mod_64(__uint32_t, __uint32_t, int);
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extern __uint64_t br_reg_mod_64(__uint32_t, __uint32_t, int);
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extern void _send_bootp_msg(char *msg);
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/* NOTES: */
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/* the registers can be either heart or bridge registers, */
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/* The address of a Bridge on a SN0 system may require the full */
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/* 64-bit address, so using the COMPAT space here is not desired */
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#if !defined(MFG_DBGPROM)
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#define PIO_REG_WR_64(address, mask, value) \
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*(volatile __uint64_t *)PHYS_TO_K1(address) = (heartreg_t) ((value) & (mask))
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#define PIO_REG_RD_64(address, mask, value) \
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value = *(volatile __uint64_t *)(PHYS_TO_K1(address)) & (mask)
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#define PIO_REG_WR_32(address, mask, value) \
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*(volatile __uint32_t *)PHYS_TO_K1(address) = ((value) & (mask))
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#define PIO_REG_RD_32(address, mask, value) \
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value = *(volatile __uint32_t *)(PHYS_TO_K1(address)) & (mask)
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#define PIO_REG_WR_16(address, mask, value) \
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*(volatile unsigned short *)PHYS_TO_K1(address) = ((value) & (mask))
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#define PIO_REG_WR_8(address, mask, value) \
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*(volatile unsigned char *)PHYS_TO_K1(address) = ((value) & (mask))
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#define PIO_REG_RD_16(address, mask, value) \
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value = *(volatile unsigned short *)(PHYS_TO_K1(address)) & (mask)
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#define PIO_REG_RD_8(address, mask, value) \
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value = *(volatile unsigned char *)(PHYS_TO_K1(address)) & (mask)
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#else /* MFG_DBGPROM */
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/*
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* The Mfg DBGPROM is very verbose and displays I/O reads and
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* writes.
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*/
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#define PIO_REG_WR_64(address, mask, value) \
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{ \
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msg_printf( SUM, " WR 64 Address[0x%016llX] < ", \
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(unsigned long long)PHYS_TO_K1(address) ); \
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*(volatile __uint64_t *)PHYS_TO_K1(address) = (heartreg_t) ((value) & (mask)); \
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msg_printf( SUM, "0x%016llX\n", \
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(unsigned long long)((value) & (mask)) );\
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}
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#define PIO_REG_RD_64(address, mask, value) \
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{ \
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msg_printf( SUM, " RD 64 Address[0x%016llX] > " , \
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(unsigned long long)PHYS_TO_K1(address) ); \
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value = *(volatile __uint64_t *)(PHYS_TO_K1(address)) & (mask); \
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msg_printf( SUM, "0x%016llX\n" , \
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(unsigned long long)((value) & (mask)) );\
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}
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#define PIO_REG_WR_32(address, mask, value) \
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{ \
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msg_printf( SUM, " WR 32 Address[0x%016llX] < ", \
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(unsigned long long)PHYS_TO_K1(address) ); \
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*(volatile __uint32_t *)PHYS_TO_K1(address) = ((value) & (mask)); \
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msg_printf( SUM, "0x%08llX\n", \
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(unsigned long long)((value) & (mask)) );\
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}
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#define PIO_REG_RD_32(address, mask, value) \
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{ \
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msg_printf( SUM, " RD 32 Address[0x%016llX] > " , \
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(unsigned long long)PHYS_TO_K1(address) ); \
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value = *(volatile __uint32_t *)(PHYS_TO_K1(address)) & (mask); \
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msg_printf( SUM, "0x%08llX\n" , \
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(unsigned long long)((value) & (mask)) );\
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}
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#define PIO_REG_WR_16(address, mask, value) \
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{ \
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msg_printf( SUM, " WR 16 Address[0x%016llX] < ", \
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(unsigned long long)PHYS_TO_K1(address) ); \
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*(volatile unsigned short *)PHYS_TO_K1(address) = ((value) & (mask)); \
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msg_printf( SUM, "0x%04llX\n", \
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(unsigned long long)((value) & (mask)) );\
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}
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#define PIO_REG_WR_8(address, mask, value) \
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{ \
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msg_printf( SUM, " WR 8 Address[0x%016llX] < ", \
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(unsigned long long)PHYS_TO_K1(address) ); \
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*(volatile unsigned char *)PHYS_TO_K1(address) = ((value) & (mask)); \
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msg_printf( SUM, "0x%02llX\n", \
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(unsigned long long)((value) & (mask)) );\
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}
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#define PIO_REG_RD_16(address, mask, value) \
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{ \
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msg_printf( SUM, " RD 16 Address[0x%016llX] > " , \
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(unsigned long long)PHYS_TO_K1(address) ); \
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value = *(volatile unsigned short *)(PHYS_TO_K1(address)) & (mask); \
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msg_printf( SUM, "0x%04llX\n" , \
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(unsigned long long)((value) & (mask)) );\
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}
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#define PIO_REG_RD_8(address, mask, value) \
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{ \
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msg_printf( SUM, " RD 8 Address[0x%016llX] > " , \
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(unsigned long long)PHYS_TO_K1(address) ); \
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value = *(volatile unsigned char *)(PHYS_TO_K1(address)) & (mask); \
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msg_printf( SUM, "0x%02llX\n" , \
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(unsigned long long)((value) & (mask)) );\
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}
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#endif /* !MFG_DBGPROM */
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#define REPORT_PASS_OR_FAIL( Test, errors) return(report_pass_or_fail( (Test), (errors)) )
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/* If you add/remove something from the table CPU_Test_err (util/cpu_globals.c) you
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* need to modify this to reflect changes.
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*/
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enum {
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CPU_ERR_BRIDGE_0000=0,
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CPU_ERR_BRIDGE_0001,
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CPU_ERR_BRIDGE_0002,
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CPU_ERR_BRIDGE_0003,
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CPU_ERR_BRIDGE_0004,
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CPU_ERR_BRIDGE_0005,
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CPU_ERR_ECC_0000,
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CPU_ERR_ETHERNET_0000,
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CPU_ERR_ETHERNET_0001,
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CPU_ERR_ETHERNET_0002,
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CPU_ERR_HXB_0000,
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CPU_ERR_HXB_0001,
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CPU_ERR_HXB_0002,
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CPU_ERR_HEART_0000,
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CPU_ERR_HEART_0001,
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CPU_ERR_HEART_0002,
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CPU_ERR_HEART_0003,
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CPU_ERR_HEART_0004,
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CPU_ERR_HEART_0005,
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CPU_ERR_HEART_0006,
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CPU_ERR_HAB_0000,
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CPU_ERR_HAB_0001, /* obsolete */
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CPU_ERR_HAB_0002, /* obsolete */
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CPU_ERR_HAB_0003,
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CPU_ERR_IOC3_0000,
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CPU_ERR_IOC3_0001,
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CPU_ERR_IOC3_0002,
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CPU_ERR_RTC_0000,
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CPU_ERR_MEM_0000,
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CPU_ERR_PCI_0000,
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CPU_ERR_PCI_0001,
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CPU_ERR_PCI_0002,
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CPU_ERR_PCI_0003,
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CPU_ERR_PCI_0004,
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CPU_ERR_PCI_0005,
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CPU_ERR_PCI_0006,
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CPU_ERR_PCI_0007,
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CPU_ERR_PCI_0008,
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CPU_ERR_RAD_0000,
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CPU_ERR_RAD_0001,
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CPU_ERR_RAD_0002,
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CPU_ERR_RAD_0003,
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CPU_ERR_SCSI_0000,
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CPU_ERR_SCSI_0001,
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CPU_ERR_HEART_XBOW_0000,
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CPU_ERR_XBOW_0000,
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CPU_ERR_XBOW_0001,
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CPU_END_OF_LIST
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};
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#endif /* C || C++ */
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#endif /* __IDE_GODZILLA_H__ */
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