103 lines
4.1 KiB
C
103 lines
4.1 KiB
C
/**************************************************************************
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* *
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* Copyright (C) 1995, Silicon Graphics, Inc. *
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* *
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* These coded instructions, statements, and computer programs contain *
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* unpublished proprietary information of Silicon Graphics, Inc., and *
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* are protected by Federal copyright law. They may not be disclosed *
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* to third parties or copied or duplicated in any form, in whole or *
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* in part, without the prior written consent of Silicon Graphics, Inc. *
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* *
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**************************************************************************/
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#ident "ide/godzilla/include/d_xbow.h: $Revision: 1.11 $"
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/*
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* IDE xbow tests header
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*/
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/*
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*/
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#ifndef __IDE_XBOW_H__
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#define __IDE_XBOW_H__
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/*
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* Xbow Register Read-Write Masks
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* (values from working specs, Jan 96)
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*/
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#define XBOW_WID_ID_MASK XBOWCONST 0xffffffff
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#define XBOW_WID_STAT_MASK XBOWCONST 0xff800027
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#define XBOW_WID_ERR_UPPER_MASK XBOWCONST 0x0000ffff
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#define XBOW_WID_ERR_LOWER_MASK XBOWCONST 0xffffffff
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#define XBOW_WID_CONTROL_MASK XBOWCONST 0x00000026 /* bits1,2,5 only*/
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#define XBOW_WID_REQ_TO_MASK XBOWCONST 0x000fffff /* packet timeout*/
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#define XBOW_WID_INT_UPPER_MASK XBOWCONST 0xff0fffff
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#define XBOW_WID_INT_LOWER_MASK XBOWCONST 0xffffffff
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#define XBOW_WID_ERR_CMDWORD_MASK XBOWCONST 0xffffffff
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#define XBOW_WID_LLP_MASK XBOWCONST 0x03ffffff
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#define XBOW_WID_ARB_RELOAD_MASK XBOWCONST 0x0000003f
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#define XBOW_WID_PERF_CTR_A_MASK XBOWCONST 0x00700000 /* mask undef val*/
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#define XBOW_WID_PERF_CTR_B_MASK XBOWCONST 0x00700000 /* mask undef val*/
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#define XBOW_WID_NIC_MASK XBOWCONST 0x000ffffe /* NIC-DATA=x*/
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#define XBOW_WID_NIC_RW_MASK XBOWCONST 0x000ffc00 /* NIC RW bit mask*/
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/* link values: same for all 8 */
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#define XB_LINK_IBUF_FLUSH_MASK XBOWCONST 0xffffffff
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#define XB_LINK_CTRL_MASK XBOWCONST 0xbfff01ff
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#define XB_LINK_STATUS_MASK XBOWCONST 0xffffffff /* mask bit 31 that varies from link to link ("link alive" bit) */
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#define XB_LINK_AUX_STATUS_MASK XBOWCONST 0x0000006f /* mask bit 4 that varies from link to link ("16/8 bit link" bit) */
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#define XB_LINK_ARB_UPPER_MASK XBOWCONST 0xffffffff
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#define XB_LINK_ARB_LOWER_MASK XBOWCONST 0xffffffff
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#define XBOW_WID_STAT_DEFAULT XBOWCONST 0x00000000
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#define XBOW_WID_REQ_TO_DEFAULT XBOWCONST 0x000fffff
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#define XB_LINK_STATUS_DEFAULT XBOWCONST 0x80000000
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/* misc masks */
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#define D_XBOW_WID_ID_REV_NUM_MASK XBOWCONST 0xf0000000
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#define D_XBOW_WID_INT_UPPER_ADDR XBOWCONST 0x0000ffff
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#define D_XBOW_WID_INT_UPPER_TARGID XBOWCONST 0x000f0000
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#define D_XBOW_WID_INT_UPPER_INTVECT XBOWCONST 0xff000000
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/* other constants */
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#define XBOW_ACC_REGS_MAX 0x3 /* # of cases to generate an access error */
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#define D_UPPER_ADDR_SHIFT 32 /* to shift address to get upper address */
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#define D_XBOW_WID_REQ_TO XBOW_WID_REQ_TO_DEFAULT /* set to default for now */
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#define D_XBOW_ID XBOWCONST 0x00000001 /* w/o rev # */
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#define D_XBOW_WID_STAT XBOW_WID_STAT_DEFAULT
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#define XBOW_WID0_BITS_CLR ( XB_WID_STAT_WIDGET0_INTR \
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| XB_WID_STAT_REG_ACC_ERR \
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| XB_WID_STAT_XTALK_ERR)
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/*
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* macro definitions
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* Read/Write like from/to XBOW.
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*/
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#define XB_REG_WR_32(address, mask, value) \
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PIO_REG_WR_32((address+XBOW_BASE), mask, value);
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#define XB_REG_RD_32(address, mask, value) \
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PIO_REG_RD_32((address+XBOW_BASE), mask, value);
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/*
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* register structure for Xbow register tests
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*/
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typedef struct _Xbow_Regs {
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char *name; /* name of the register */
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__uint32_t address; /* address (really offset,can be 32b) */
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int mode; /* read / write only or read & write */
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__uint32_t mask; /* read-write mask */
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__uint32_t def; /* default value */
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} Xbow_Regs;
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typedef struct _Xbow_Regs_Access {
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char *name; /* name of the register */
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__uint64_t register_addr; /* register physical address */
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__uint32_t access_mode; /* access mode on the register */
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} Xbow_Regs_Access;
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#endif /* __IDE_XBOW_H__ */
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