6 lines
251 B
C
6 lines
251 B
C
#define CACH_PI 0x0 /* specifies primary inst. cache */
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#define CACH_PD 0x1 /* primary data cache */
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#define CACH_SI 0x2 /* secondary instruction cache */
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#define CACH_SD 0x3 /* secondary data cache */
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