60 lines
1.6 KiB
ArmAsm
60 lines
1.6 KiB
ArmAsm
#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _MIPS_SIM_ABI32)
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/*
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* |-----------------------------------------------------------|
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* | Copyright (c) 1991 MIPS Computer Systems, Inc. |
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* | All Rights Reserved |
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* |-----------------------------------------------------------|
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* | Restricted Rights Legend |
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* | Use, duplication, or disclosure by the Government is |
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* | subject to restrictions as set forth in |
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* | subparagraph (c)(1)(ii) of the Rights in Technical |
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* | Data and Computer Software Clause of DFARS 52.227-7013. |
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* | MIPS Computer Systems, Inc. |
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* | 950 DeGuigne Drive |
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* | Sunnyvale, CA 94086 |
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* |-----------------------------------------------------------|
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*/
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/* $Header: /proj/irix6.5.7m/isms/stand/arcs/lib/libsc/ml/RCS/llmul.s,v 1.3 1995/11/20 08:51:24 jeffs Exp $ */
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#include "ml.h"
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#include <regdef.h>
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/* long long __ll_mul (long long a, long long b) */
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#ifdef _MIPSEL
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# define RLSW v0
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# define RMSW v1
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# define ALSW a0
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# define AMSW a1
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# define BLSW a2
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# define BMSW a3
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#else /* _MIPSEB */
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# define RMSW v0
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# define RLSW v1
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# define AMSW a0
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# define ALSW a1
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# define BMSW a2
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# define BLSW a3
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#endif
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.text
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/* note that result of AMSW * BMSW overflows 64bits, so it is ignored. */
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.globl __ll_mul
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.ent __ll_mul
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__ll_mul:
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.frame sp, 0, ra
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multu ALSW, BLSW
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mflo RLSW
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mfhi RMSW
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multu AMSW, BLSW
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mflo t0
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addu RMSW, t0
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multu ALSW, BMSW
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mflo t0
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addu RMSW, t0
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j ra
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.end __ll_mul
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#endif
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