55 lines
1.1 KiB
ArmAsm
55 lines
1.1 KiB
ArmAsm
#ident "lib/libsk/ml/IP22asm.s: $Revision: 1.13 $"
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/*
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* IP22asm.s - IP22 specific assembly language functions
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*/
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#include "ml.h"
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#include <asm.h>
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#include <regdef.h>
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#include <sys/sbd.h>
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#include <sys/cpu.h>
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/*
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* wbflush() -- spin until write buffer empty
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*/
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LEAF(wbflush)
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XLEAF(flushbus)
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lw zero,PHYS_TO_COMPATK1(CPUCTRL0)
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j ra
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END(wbflush)
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/*
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* old_sr = spl(new_sr) -- set the interrupt level (really the sr)
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* returns previous sr
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*/
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LEAF(spl)
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.set noreorder
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mfc0 v0,C0_SR
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li t0,~SR_IMASK
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and t0,v0,t0
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or t0,t0,a0
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mtc0 t0,C0_SR
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.set reorder
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j ra
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END(spl)
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/*
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*
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* writemcreg (reg, val)
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*
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* Basically this does *(volatile uint *)(PHYS_TO_K1(reg)) = val;
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* a0 - physical register address
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* a1 - value to write
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*
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* This was a workaround for a bug in the first rev MC chip, which is not
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* in fullhouse, but we make still need a routine by this name.
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*/
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LEAF(writemcreg)
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or a0,K1BASE # a0 = PHYS_TO_K1(a0)
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sw a1,(a0) # write val in a1 to MC register *a0
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j ra
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END(writemcreg)
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